Connor Abbott cf0cfd572e freedreno/a6xx: VPC_SO_NCOMP is actually VPC_SO_BUFFER_STRIDE ... This answers the question in a comment in turnip, and fixes some GL46 tests and piglit tests. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17494>		2022-07-12 17:57:07 +00:00
..
a2xx.xml	freedreno/a2xx: add RB perfcounter 1-3	2021-01-16 19:10:22 +00:00
a3xx.xml	freedreno: rename Z_TEST_ENABLE->Z_READ_ENABLE, Z_ENABLE->Z_TEST_ENABLE	2021-08-19 10:25:58 +00:00
a4xx.xml	a4xx: add emission of compute state, and compute dispatch	2022-03-05 03:21:05 -05:00
a5xx.xml	freedreno: Rename the "SIZE" regs for interpolateAtOffset to "CENTERRHW"	2022-07-11 16:56:05 +00:00
a6xx.xml	freedreno/a6xx: VPC_SO_NCOMP is actually VPC_SO_BUFFER_STRIDE	2022-07-12 17:57:07 +00:00
a6xx_gmu.xml	freedreno/a6xx: Add a few registers	2021-05-16 18:47:55 +00:00
a7xx.xml	freedreno/registers: add a7xx registers for drm/msm kernel driver	2022-07-01 15:11:28 +00:00
adreno_common.xml	freedreno/registers: add a7xx registers for drm/msm kernel driver	2022-07-01 15:11:28 +00:00
adreno_control_regs.xml	freedreno/registers: Add a few a6xx regs and notes	2021-05-31 23:34:43 +00:00
adreno_pipe_regs.xml	freedreno/afuc: Add pipe reg name decoding	2021-05-31 23:34:43 +00:00
adreno_pm4.xml	tu,freedreno: Refactored START/STOP events for pipeline stats	2022-07-08 11:14:18 +03:00
meson.build	freedreno/registers: add some missing regs to build	2020-08-07 23:20:38 +00:00
ocmem.xml	…