KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

freedreno/registers: Handle typed registers with fields 

When a bitset is "inline" it should act as-if the its fields were
inserted into the register itself. However when initializing the
register's bitfield we weren't doing a deep copy of the inline bitfield,
so if the register defined additional fields then they would get added
to the original inline bitfield and any further registers with the same
type would get them. Fix this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9493>
This commit is contained in:
Connor Abbott 2021-03-09 16:00:15 +01:00 committed by Marge Bot
parent 8d55a1e112
commit 9a5596d679
1 changed files with 7 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/freedreno/registers/gen_header.py
View File

@ -105,7 +105,7 @@ class Bitset(object):
self.name = name
self.inline = False
if template:
self.fields = template.fields
self.fields = template.fields[:]
else:
self.fields = []
@ -358,7 +358,12 @@ class Parser(object):
def parse_reg(self, attrs, bit_size):
if "type" in attrs and attrs["type"] in self.bitsets:
self.current_bitset = self.bitsets[attrs["type"]]
bitset = self.bitsets[attrs["type"]]
if bitset.inline:
self.current_bitset = Bitset(attrs["name"], bitset)
self.current_bitset.inline = True
else:
self.current_bitset = bitset
else:
self.current_bitset = Bitset(attrs["name"], None)
self.current_bitset.inline = True