Commit Graph

104872 Commits

Author SHA1 Message Date
Juan A. Suarez Romero eefc77e691 docs: add sha256 checksums for 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 686eab66420eec742338c1b75e499367e103e82b)
2018-09-21 13:06:14 +02:00
Juan A. Suarez Romero 17fbb1ef74 docs: add release notes for 18.2.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 3c8c851fe46b1924d84b04c49c60885452c4fbe2)
2018-09-21 13:06:12 +02:00
Samuel Pitoiset 674fcfaecc radv: only enable shaderInt16 on GFX9+ and LLVM7+
The throughput is similar to 32-bit integers on GFX8 and
AMDVLK does not expose 16-bit integers on pre Vega as well.
On GFX9+, only LLVM 7+ has support.

This fixes a bunch of CTS crashes on GFX9/LLVM 6.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-09-21 10:56:17 +02:00
Marek Olšák 945e9cdb2b docs/features: add EXT_direct_state_access features
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-09-21 03:01:58 -04:00
Bas Nieuwenhuizen 0a77e70d10 radv: Fix driver UUID SHA1 init.
Was missing the init, found by Emil.

Fixes: d17443a459 "radv: Use build ID if available for cache UUID."
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-09-20 23:38:38 +02:00
Charmaine Lee 64731e7c5e svga: fix uninitialized fields in DefineDepthStencilView/DefineStreamOutput
This patch fixes uninitialized fields in DefineDepthStencilView and
DefineStreamOutput commands that are not relevant in SM4 device.

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-09-20 13:20:10 -06:00
Brian Paul 7f4e6f4c97 r300g: add PIPE_SHADER_CAP_SCALAR_ISA switch case to silence warning
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-09-20 13:20:10 -06:00
Brian Paul 198c50f487 st/mesa: silenced unhanded enum warning in st_glsl_to_tgsi.cpp
Add ir_intrinsic_begin_fragment_shader_ordering switch case to
silence warning

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-09-20 13:20:10 -06:00
Brian Paul 35ea66a68e mesa: use GLsizeiptrARB, GLintptrARB in bufferobj.c
The function pointer declarations in dd.h for the BufferData() and
BufferSubData() use the ARB-suffixed datatypes.  This patch changes
the buffer_data_fallback() and buffer_sub_data_fallback() functions
to use those datatypes too.

This fixes a build warning when building 32-bit libraries.  Evidently,
GLsizeiptrARB and GLsizeiptr are defined differently in that situation.

All all implementations of these driver hooks use the ARB-suffixed
types.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-09-20 13:20:10 -06:00
Neha Bhende 708d34d41a svga: Enable Opengl 3.3 compatibility profile
With this patch, svga driver will start advertising OpenGL 3.3
compatibility profile.

Tested with some mesa demos, piglit and glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2018-09-20 13:20:10 -06:00
Neha Bhende ede805dd19 svga: Apply texcoord scale factors only if there is sampler view
We need to convert unnormalized texcoords to normalized texcoords
when we are sampling from texture. We don't need this conversion
if there is no sampler view.

Tested with piglit, glretrace

Fixes vmware bug 2101970

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2018-09-20 13:20:10 -06:00
Charmaine Lee 1dcf377a76 svga: fix texture array layer index in transfer map
In gallium, the layer index of a texture array to be mapped
is specified in the z component, whereas in svga device, the
index is specified in a separate argument.
Currently in svga_texture_transfer_map(), we explicitly modify
the z value in the base transfer map to 0 so the layer offset will not be
applied twice, but this causes problem when state tracker later
refers to the base transfer map and expects the slice index to be
specified in z (commit 463b0ea1f6).

To fix the problem, this patch makes a local copy of the box in
svga_transfer and modifies the z value in this copy instead.

Fixes spec@khr_texture_compression-astc piglit test crashes.
Fixes regression in the dma path with commit 1fdd3dd94a.

Tested with mtt glretrace, piglit on Windows VM and Linux VM.

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-09-20 13:20:10 -06:00
Dylan Baker 18a6e426f3 Revert "utils/u_math: break dependency on gallium/utils"
This reverts commit 0abce6d770.

Which broke the windows build.
2018-09-20 10:36:33 -07:00
Caio Marcelo de Oliveira Filho 2567ad28bb i965: remove outdated comment about TCS passthrough
Since commit 75881bed9e "i965: Rework the TCS passthrough shader to
use NIR." the created nir_shader is not dummy, and it is compiled by
the backend like the others.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-09-20 09:58:55 -07:00
Christoph Haag b01834b56c meson: add option to statically link llvm
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-09-20 06:08:50 -07:00
Dylan Baker 0abce6d770 utils/u_math: break dependency on gallium/utils
Currently u_math needs gallium utils for cpu detection.  Most of what
u_math uses out of u_cpu_detection is duplicated in src/mesa/x86
(surprise!), so I've just reworked it as much as possible to use the
x86/common_x86_features.h macros instead of the gallium ones. The mesa
implementation is a header only approach, with no external dependencies.
There is one small function that was copied over, as promoting
u_cpu_detection is itself a fairly hefty undertaking, as it depends on
u_debug, and this fixes the bug for now.

bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107870
Tested-by: Vinson Lee <vlee@freedesktop.org>
2018-09-20 05:52:23 -07:00
Emil Velikov b8b3517a49 egl/android: rework device probing
Unlike the other platforms, here we aim do guess if the device that we
somewhat arbitrarily picked, is supported or not.

In particular: when a vendor is _not_ requested we loop through all
devices, picking the first one which can create a DRI screen.

When a vendor is requested - we use that and do _not_ fall-back to any
other device.

The former seems a bit fiddly, but considering EGL_EXT_explicit_device and
EGL_MESA_query_renderer are MIA, this is the best we can do for the
moment.

With those (proposed) extensions userspace will be able to create a
separate EGL display for each device, query device details and make the
conscious decision which one to use.

v2:
 - update droid_open_device_drm_gralloc()
 - set the dri2_dpy->fd before using it
 - return a EGLBoolean for droid_{probe,open}_device*
 - do not warn on droid_load_driver failure (Tomasz)
 - plug mem leak on dri2_create_screen failure (Tomasz)
 - fixup function name typo (Tomasz, Rob)

v3:
 - add forward declaration for droid_load_driver()
Fixes the HAVE_DRM_GRALLOC build (Mauro)
 - split dup() assignment and check in separate lines (Tomasz, Eric)
 - make droid_load_driver() static (Tomasz)
 - drop unused prop_set variable (Tomasz)

v4:
 - rebase
 - fwd declarationi should be for droid_probe_device()

Cc: Robert Foss <robert.foss@collabora.com>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Tested-by: Tomasz Figa <tfiga@chromium.org>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
2018-09-20 10:15:38 +01:00
Danylo Piliaiev 18be7403a1 glsl: Add an assert when cloning ir_dereference_record with invalid field
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-09-20 08:30:11 +10:00
Danylo Piliaiev 6f3c7374b1 glsl: Avoid propagating incompatible type of initializer
do_assignment validated assigment but when rhs type was not compatible
it proceeded without issues and returned error_emitted = false.
On the other hand process_initializer expected do_assignment to always
return compatible type and never fail.

As a result when variable was initialized with incompatible type
the type of variable changed to the incompatible one.
This manifested in unnecessary error messages and in one case in crash.

Example GLSL:
 vec4 tmp = vec2(0.0);
 tmp.z -= 1.0;

Past error messages:
 initializer of type vec2 cannot be assigned to variable of type vec4
 invalid swizzle / mask `z'
 type mismatch
 operands to arithmetic operators must be numeric

After this patch:
 initializer of type vec2 cannot be assigned to variable of type vec4

In the other case when we initialize variable with incompatible struct,
accessing variable's field leaded to a crash. Example:
 uniform struct {float field;} data;
 ...
 vec4 tmp = data;
 tmp.x -= 1.0;

After the patch there is only error line without a crash:
 initializer of type #anon_struct cannot be assigned to variable of
  type vec4

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107547
2018-09-20 08:30:11 +10:00
Michal Srb 194bf0a2e0 st/dri: don't set queryDmaBufFormats/queryDmaBufModifiers if the driver does not implement it
This is equivalent to commit a65db0ad1c, but for dri_kms_init_screen. Without
this gbm_dri_is_format_supported always returns false.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104926
Fixes: e14fe41e0b ("st/dri: implement createImageFromRenderbuffer(2)")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Adam Williamson <adamwill@fedoraproject.org>
2018-09-19 15:20:04 -04:00
Jason Ekstrand c811af767e anv/so_memcpy: Don't consider src/dst_offset when computing block size
The only thing that matters is the size since we never specify any
offsets in terms of blocks.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-09-19 09:38:04 -05:00
Jakob Bornecrantz 09171705d5 Revert "mesa: only update framebuffer-state for clears"
This reverts commit fb86365148.
2018-09-19 15:21:26 +01:00
Samuel Pitoiset 121f226471 radv: use a 64-bit unsigned integer when allocating a descriptor pool
pool->size is a 64-bit unsigned integer too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-09-19 13:36:12 +02:00
Samuel Pitoiset 35656823b9 radv: enable VK_SUBGROUP_FEATURE_ARITHMETIC_BIT
All CTS pass on Polaris/Vega with LLVM 6, 7 and master, so
I think it's safe to enable the feature.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-09-19 13:36:10 +02:00
Samuel Pitoiset febdc13a6c radv: do not support blitting surfaces with depth and stencil
Fixes:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest

And all friends that try to blit a surface with different
depth and stencil formats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-09-19 13:36:07 +02:00
Erik Faye-Lund fb86365148 mesa: only update framebuffer-state for clears
If we update the program-state etc, we risk compiling needless shaders,
which can cost quite a bit of performance.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-19 11:52:53 +02:00
Juan A. Suarez Romero 0c82e3603e nir: add initializer data to fix MSVC compile error
CC: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 82799a5d1b8 ("nir: Add a small pass to rematerialize derefs
per-block")
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2018-09-19 11:46:44 +02:00
Jason Ekstrand 976046a8d8 nir: Add some asserts that we don't put derefs in phis
The lcssa and phis_to_regs passes are used by various NIR optimizations
that modify the CFG.  Putting a couple of asserts will help ensure that
we don't accidentally put derefs in phis as part of an optimization
pass.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2018-09-19 02:00:49 -05:00
Jason Ekstrand 864c780566 nir/opt_if: Re-materialize derefs in use blocks before peeling loops
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107879
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
2018-09-19 02:00:49 -05:00
Jason Ekstrand 0796c3934e nir/loop_unroll: Re-materialize derefs in use blocks before unrolling
When we're about to re-arrange a bunch of blocks, it's a good idea to
make sure that we don't have deref uses crossing block boundaries.
Otherwise we may end up with a deref going through a phi and that would
be bad.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
2018-09-19 01:59:40 -05:00
Jason Ekstrand 7d1d1208c2 nir: Add a small pass to rematerialize derefs per-block
This pass re-materializes deref instructions on a per-block basis to
ensure that every use of a deref occurs in the same block as the
instruction which uses it.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
2018-09-19 01:59:40 -05:00
Kenneth Feng 4490fce166 amd: Add Picasso device id
No changes here compared to Raven.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
2018-09-18 18:05:17 -04:00
Bas Nieuwenhuizen 95bb7d82ca Revert "radv: fix descriptor pool allocation size"
This reverts commit 90819abb56.

This logic was wrong, the original code is correct. The direct
impact is that we allocate up to approximately a squared amount
of memory compared to what we should allocate.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-09-18 22:51:42 +02:00
Samuel Pitoiset c9dbe52f84 radv: implement VK_EXT_conservative_rasterization
Only supported by GFX9+.

The conservativeraster Sascha demo seems to work as expected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-09-18 13:28:01 +02:00
Samuel Pitoiset 450a325858 radv: do not re-create the sampler for every blits in CmdBlitImage()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-09-18 13:27:59 +02:00
Samuel Pitoiset 3871dd7a92 radv: allow to force anisotropy via RADV_TEX_ANISO
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-09-18 13:27:58 +02:00
Timothy Arceri b54a2311a9 mesa: enable EXT_framebuffer_object in core profile
Since user defined names are not allowed in core profile
we remove the allow_user_names bool and just check if
we have a core profile like all other buffer/texture
object handling code does.

This extension is required by "Wolfenstein: The Old Blood"
and is exposed in core in the Nvidia binary driver.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:58:24 +10:00
Timothy Arceri 02843ed768 mesa: move legacy dri config option texture_depth
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri f958ea6eff mesa: move legacy dri config option fthrottle_mode
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 4b1a81ef9d mesa: move legacy dri config option def_max_anisotropy
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 6164d59bcc mesa: move legacy dri config option no_neg_lod_bias
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 6d1890fa07 mesa: move legacy dri config option round_mode
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 3a1d09fd55 mesa: remove unused dri option float_depth
This seems to have only been used by DRI1 drivers which were
removed with e4344161bd.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 91e76ce493 mesa: move legacy dri config option dither_mode
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 2d7dc9591d mesa: move legacy dri config option color_reduction
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 408d41a413 mesa: move legacy TCL dri config options
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:43:05 +10:00
Timothy Arceri 024abd3534 util: use force_compat_profile for Wolfenstein The Old Blood
This game is looking for some odd extension after creating a core
context such as ARB_vertex_program and EXT_framebuffer_object.

Rather then enabling these in core this forces the game to use
compat. This allows the game to run and seems to work without
issues. All other id tech games/engines use a compat profile.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:34:54 +10:00
Timothy Arceri 64ec50d52f mesa/st: add force_compat_profile option to driconfig
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-09-18 19:34:54 +10:00
Timothy Arceri 7a992fcfa0 Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"
This reverts commit bc65dcab3b.

This was manually reverted. Reverting stops the menu hanging in
some id tech games such as RAGE and Wolfenstein The New Order.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
2018-09-18 19:21:32 +10:00
Eric Anholt 4e1af6808c v3d: Switch from FLUSH_ALL_STATE to FLUSH for ending our bin CLs.
The HW for FLUSH_ALL_STATE isn't validated, since the closed driver only
uses FLUSH.  Now that we don't have any new state at the end of our bin
CLs, follow their lead.
2018-09-17 16:35:45 -07:00