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dri: Remove all DRI1 drivers 

Acked-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Marek Olšák <maraeo@gmail.com>
Acked-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Acked-by: Jakob Bornecrantz <jakob@vmware.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Build-Tested-by: Jakob Bornecrantz <jakob@vmware.com>
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
This commit is contained in:
Ian Romanick 2011-08-24 15:21:58 -07:00
parent 117042b46f
commit e4344161bd
237 changed files with 17 additions and 85828 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
configs/freebsd-dri
View File

@ -47,6 +47,5 @@ DRIVER_DIRS = dri
DRM_SOURCE_PATH=$(TOP)/../drm
DRI_DIRS = i810 i915 i965 mach64 mga r128 r200 r300 radeon tdfx \
unichrome savage sis
DRI_DIRS = i915 i965 r200 r300 radeon

3
configs/linux-dri
View File

@ -62,8 +62,7 @@ GALLIUM_WINSYS_DIRS = sw sw/xlib drm/vmware drm/intel drm/i965
GALLIUM_TARGET_DIRS =
GALLIUM_STATE_TRACKERS_DIRS = egl
DRI_DIRS = i810 i915 i965 mach64 mga nouveau r128 r200 r300 r600 radeon \
savage sis tdfx unichrome swrast
DRI_DIRS = i915 i965 nouveau r200 r300 r600 radeon swrast
INTEL_LIBS = $(shell pkg-config --libs libdrm_intel)
INTEL_CFLAGS = $(shell pkg-config --cflags libdrm_intel)

2
configs/linux-dri-debug
View File

@ -11,6 +11,4 @@ ARCH_FLAGS = -DDEBUG
#DRI_DIRS = i915tex i915
#DRI_DIRS = i965
#DRI_DIRS = radeon r200 r300
#DRI_DIRS = unichrome sis
#DRI_DIRS = i810 mga r128 tdfx

2
configs/linux-dri-ppc
View File

@ -13,5 +13,5 @@ MESA_ASM_SOURCES = $(PPC_SOURCES)
# Build only the drivers for cards that exist on PowerPC. At some point MGA
# will be added, but not yet.
DRI_DIRS = mach64 r128 r200 r300 radeon tdfx
DRI_DIRS = r200 r300 radeon

6
configs/linux-dri-x86-64
View File

@ -16,9 +16,5 @@ LIB_DIR = lib64
# Library/program dependencies
EXTRA_LIB_PATH=-L/usr/X11R6/lib64
# sis is missing because it has not been converted to use
# the new interface. i810 are missing because there is no x86-64
# system where they could *ever* be used.
#
DRI_DIRS = i915 i965 mach64 mga r128 r200 r300 radeon savage tdfx unichrome
DRI_DIRS = i915 i965 r200 r300 radeon

3
configs/linux-dri-xcb
View File

@ -52,5 +52,4 @@ GL_LIB_DEPS = $(EXTRA_LIB_PATH) -lX11 -lXext -lXxf86vm -lm -lpthread -ldl \
SRC_DIRS = glx gallium mesa glu
DRIVER_DIRS = dri
DRI_DIRS = i810 i915 mach64 mga r128 r200 r300 radeon \
savage sis tdfx unichrome
DRI_DIRS = i915 r200 r300 radeon

19
configure.ac
View File

@ -1161,25 +1161,20 @@ if test "x$enable_dri" = xyes; then
case "$host_cpu" in
x86_64)
# sis is missing because they have not be converted to use
# the new interface. i810 are missing because there is no
# x86-64 system where they could *ever* be used.
if test "x$DRI_DIRS" = "xyes"; then
DRI_DIRS="i915 i965 mach64 mga nouveau r128 r200 r300 r600 \
radeon savage tdfx unichrome swrast"
DRI_DIRS="i915 i965 nouveau r200 r300 r600 radeon swrast"
fi
;;
powerpc*)
# Build only the drivers for cards that exist on PowerPC.
# At some point MGA will be added, but not yet.
if test "x$DRI_DIRS" = "xyes"; then
DRI_DIRS="mach64 r128 r200 r300 r600 radeon tdfx swrast"
DRI_DIRS="r200 r300 r600 radeon swrast"
fi
;;
sparc*)
# Build only the drivers for cards that exist on sparc`
# Build only the drivers for cards that exist on sparc
if test "x$DRI_DIRS" = "xyes"; then
DRI_DIRS="mach64 r128 r200 r300 r600 radeon swrast"
DRI_DIRS="r200 r300 r600 radeon swrast"
fi
;;
esac
@ -1189,8 +1184,7 @@ if test "x$enable_dri" = xyes; then
DEFINES="$DEFINES -DIN_DRI_DRIVER -DHAVE_ALIAS"
if test "x$DRI_DIRS" = "xyes"; then
DRI_DIRS="i810 i915 i965 mach64 mga nouveau r128 r200 r300 r600 \
radeon tdfx unichrome savage sis swrast"
DRI_DIRS="i915 i965 nouveau r200 r300 r600 radeon swrast"
fi
;;
gnu*)
@ -1210,8 +1204,7 @@ if test "x$enable_dri" = xyes; then
# default drivers
if test "x$DRI_DIRS" = "xyes"; then
DRI_DIRS="i810 i915 i965 mach64 mga nouveau r128 r200 r300 r600 radeon \
savage sis tdfx unichrome swrast"
DRI_DIRS="i915 i965 nouveau r200 r300 r600 radeon swrast"
fi
DRI_DIRS=`echo "$DRI_DIRS" | $SED 's/ */ /g'`

12
docs/install.html
View File

@ -176,22 +176,10 @@ lrwxrwxrwx 1 brian users 23 Mar 26 07:53 libOSMesa.so.6 -> libOSM
If you built the DRI hardware drivers, you'll also see the DRI drivers:
</p>
<pre>
-rwxr-xr-x 1 brian users 15607851 Jul 21 12:11 ffb_dri.so
-rwxr-xr-x 1 brian users 15148747 Jul 21 12:11 i810_dri.so
-rwxr-xr-x 1 brian users 14497814 Jul 21 12:11 i830_dri.so
-rwxr-xr-x 1 brian users 16895413 Jul 21 12:11 i915_dri.so
-rwxr-xr-x 1 brian users 11320803 Jul 21 12:11 mach64_dri.so
-rwxr-xr-x 1 brian users 11418014 Jul 21 12:12 mga_dri.so
-rwxr-xr-x 1 brian users 11064426 Jul 21 12:12 r128_dri.so
-rwxr-xr-x 1 brian users 11849858 Jul 21 12:12 r200_dri.so
-rwxr-xr-x 1 brian users 16050488 Jul 21 12:11 r300_dri.so
-rwxr-xr-x 1 brian users 11757388 Jul 21 12:12 radeon_dri.so
-rwxr-xr-x 1 brian users 11232304 Jul 21 12:13 s3v_dri.so
-rwxr-xr-x 1 brian users 11062970 Jul 21 12:13 savage_dri.so
-rwxr-xr-x 1 brian users 11214212 Jul 21 12:13 sis_dri.so
-rwxr-xr-x 1 brian users 11368736 Jul 21 12:13 tdfx_dri.so
-rwxr-xr-x 1 brian users 10598868 Jul 21 12:13 trident_dri.so
-rwxr-xr-x 1 brian users 10997120 Jul 21 12:13 unichrome_dri.so
</pre>
<p>

2
docs/libGL.txt
View File

@ -33,7 +33,7 @@ When libGL.so initializes itself it uses the DRI to determine the
appropriate hardware driver for each screen on the local X display.
The hardware drivers are expected to be in the /usr/X11R6/lib/modules/dri/
directory. Drivers are named with the convention <name>_dri.so where
<name> is a driver such as "tdfx", "i810", "gamma", etc.
<name> is a driver such as "radeon", "i965", "nouveau", etc.
The LIBGL_DRIVERS_DIR environment variable may be used to specify a
different DRI modules directory, overriding /usr/X11R6/lib/modules/dri/.

11
include/pci_ids/pci_id_driver_map.h
View File

@ -7,14 +7,6 @@
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
#endif
#if !defined(DRIVER_MAP_DRI2_ONLY) && !defined(DRIVER_MAP_GALLIUM_ONLY)
static const int i810_chip_ids[] = {
#define CHIPSET(chip, desc, misc) chip,
#include "pci_ids/i810_pci_ids.h"
#undef CHIPSET
};
#endif
static const int i915_chip_ids[] = {
#define CHIPSET(chip, desc, misc) chip,
#include "pci_ids/i915_pci_ids.h"
@ -59,9 +51,6 @@ static const struct {
const int *chip_ids;
int num_chips_ids;
} driver_map[] = {
#if !defined(DRIVER_MAP_DRI2_ONLY) && !defined(DRIVER_MAP_GALLIUM_ONLY)
{ 0x8086, "i810", i810_chip_ids, ARRAY_SIZE(i810_chip_ids) },
#endif
{ 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
{ 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
#ifndef DRIVER_MAP_GALLIUM_ONLY

2
src/glx/dri_common.c
View File

@ -91,7 +91,7 @@ ErrorMessageF(const char *f, ...)
* directories specified by the \c LIBGL_DRIVERS_PATH environment variable in
* order to find the driver.
*
* \param driverName - a name like "tdfx", "i810", "mga", etc.
* \param driverName - a name like "i965", "radeon", "nouveau", etc.
*
* \returns
* A handle from \c dlopen, or \c NULL if driver file not found.

4
src/glx/dri_glx.c
View File

@ -94,7 +94,7 @@ static const struct glx_context_vtable dri_context_vtable;
/*
* Given a display pointer and screen number, determine the name of
* the DRI driver for the screen. (I.e. "r128", "tdfx", etc).
* the DRI driver for the screen (i.e., "i965", "radeon", "nouveau", etc).
* Return True for success, False for failure.
*/
static Bool
@ -384,7 +384,7 @@ CallCreateNewScreen(Display *dpy, int scrn, struct dri_screen *psc,
goto handle_error;
}
/* Get device name (like "tdfx") and the ddx version numbers.
/* Get device name (like "radeon") and the ddx version numbers.
* We'll check the version in each DRI driver's "createNewScreen"
* function. */
if (!XF86DRIGetClientDriverName(dpy, scrn,

30
src/mesa/drivers/dri/i810/Makefile
View File

@ -1,30 +0,0 @@
# src/mesa/drivers/dri/i810/Makefile
TOP = ../../../../..
include $(TOP)/configs/current
LIBNAME = i810_dri.so
include ../Makefile.defines
DRIVER_SOURCES = \
i810context.c \
i810ioctl.c \
i810render.c \
i810screen.c \
i810span.c \
i810state.c \
i810tex.c \
i810texmem.c \
i810texstate.c \
i810tris.c \
i810vb.c
C_SOURCES = \
$(COMMON_SOURCES) \
$(DRIVER_SOURCES)
ASM_SOURCES =
include ../Makefile.targets

630
src/mesa/drivers/dri/i810/i810_3d_reg.h
View File

@ -1,630 +0,0 @@
#ifndef I810_3D_REG_H
#define I810_3D_REG_H
#include "i810_reg.h"
/* Registers not used in the X server
*/
#define I810_NOP_ID 0x2094
#define I810_NOP_ID_MASK ((1<<22)-1)
/* 3D instructions
*/
/* GFXRENDERSTATE_PV_PIXELIZATION_RULE, p149
*
* Format:
* 0: GFX_OP_PV_RULE | PV_*
*
*/
#define GFX_OP_PV_RULE ((0x3<<29)|(0x7<<24))
#define PV_SMALL_TRI_FILTER_ENABLE (0x1<<11)
#define PV_UPDATE_PIXRULE (0x1<<10)
#define PV_PIXRULE_ENABLE (0x1<<9)
#define PV_UPDATE_LINELIST (0x1<<8)
#define PV_LINELIST_MASK (0x3<<6)
#define PV_LINELIST_PV0 (0x0<<6)
#define PV_LINELIST_PV1 (0x1<<6)
#define PV_UPDATE_TRIFAN (0x1<<5)
#define PV_TRIFAN_MASK (0x3<<3)
#define PV_TRIFAN_PV0 (0x0<<3)
#define PV_TRIFAN_PV1 (0x1<<3)
#define PV_TRIFAN_PV2 (0x2<<3)
#define PV_UPDATE_TRISTRIP (0x1<<2)
#define PV_TRISTRIP_MASK (0x3<<0)
#define PV_TRISTRIP_PV0 (0x0<<0)
#define PV_TRISTRIP_PV1 (0x1<<0)
#define PV_TRISTRIP_PV2 (0x2<<0)
/* GFXRENDERSTATE_SCISSOR_ENABLE, p146
*
* Format:
* 0: GFX_OP_SCISSOR | SC_*
*/
#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
#define SC_UPDATE_SCISSOR (0x1<<1)
#define SC_ENABLE_MASK (0x1<<0)
#define SC_ENABLE (0x1<<0)
/* GFXRENDERSTATE_SCISSOR_INFO, p147
*
* Format:
* 0: GFX_OP_SCISSOR_INFO
* 1: SCI_MIN_*
* 2: SCI_MAX_*
*/
#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
#define SCI_YMIN_MASK (0xffff<<16)
#define SCI_XMIN_MASK (0xffff<<0)
#define SCI_YMAX_MASK (0xffff<<16)
#define SCI_XMAX_MASK (0xffff<<0)
/* GFXRENDERSTATE_DRAWING_RECT_INFO, p144
*
* Format:
* 0: GFX_OP_DRAWRECT_INFO
* 1: DR1_*
* 2: DR2_*
* 3: DR3_*
* 4: DR4_*
*/
#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
#define DR1_RECT_CLIP_ENABLE (0x0<<31)
#define DR1_RECT_CLIP_DISABLE (0x1<<31)
#define DR1_X_DITHER_BIAS_MASK (0x3<<26)
#define DR1_X_DITHER_BIAS_SHIFT 26
#define DR1_Y_DITHER_BIAS_MASK (0x3<<24)
#define DR1_Y_DITHER_BIAS_SHIFT 24
#define DR2_YMIN_MASK (0xffff<<16)
#define DR2_XMIN_MASK (0xffff<<0)
#define DR3_YMAX_MASK (0xffff<<16)
#define DR3_XMAX_MASK (0xffff<<0)
#define DR4_YORG_MASK (0x3ff<<16)
#define DR4_XORG_MASK (0x7ff<<0)
/* GFXRENDERSTATE_LINEWIDTH_CULL_SHADE_MODE, p140
*
* Format:
* 0: GFX_OP_LINEWIDTH_CULL_SHADE_MODE | LCS_*
*/
#define GFX_OP_LINEWIDTH_CULL_SHADE_MODE ((0x3<<29)|(0x2<<24))
#define LCS_UPDATE_ZMODE (0x1<<20)
#define LCS_Z_MASK (0xf<<16)
#define LCS_Z_NEVER (0x1<<16)
#define LCS_Z_LESS (0x2<<16)
#define LCS_Z_EQUAL (0x3<<16)
#define LCS_Z_LEQUAL (0x4<<16)
#define LCS_Z_GREATER (0x5<<16)
#define LCS_Z_NOTEQUAL (0x6<<16)
#define LCS_Z_GEQUAL (0x7<<16)
#define LCS_Z_ALWAYS (0x8<<16)
#define LCS_UPDATE_LINEWIDTH (0x1<<15)
#define LCS_LINEWIDTH_MASK (0x7<<12)
#define LCS_LINEWIDTH_SHIFT 12
#define LCS_LINEWIDTH_0_5 (0x1<<12)
#define LCS_LINEWIDTH_1_0 (0x2<<12)
#define LCS_LINEWIDTH_2_0 (0x4<<12)
#define LCS_LINEWIDTH_3_0 (0x6<<12)
#define LCS_UPDATE_ALPHA_INTERP (0x1<<11)
#define LCS_ALPHA_FLAT (0x1<<10)
#define LCS_ALPHA_INTERP (0x0<<10)
#define LCS_UPDATE_FOG_INTERP (0x1<<9)
#define LCS_FOG_INTERP (0x0<<8)
#define LCS_FOG_FLAT (0x1<<8)
#define LCS_UPDATE_SPEC_INTERP (0x1<<7)
#define LCS_SPEC_INTERP (0x0<<6)
#define LCS_SPEC_FLAT (0x1<<6)
#define LCS_UPDATE_RGB_INTERP (0x1<<5)
#define LCS_RGB_INTERP (0x0<<4)
#define LCS_RGB_FLAT (0x1<<4)
#define LCS_UPDATE_CULL_MODE (0x1<<3)
#define LCS_CULL_MASK (0x7<<0)
#define LCS_CULL_DISABLE (0x1<<0)
#define LCS_CULL_CW (0x2<<0)
#define LCS_CULL_CCW (0x3<<0)
#define LCS_CULL_BOTH (0x4<<0)
#define LCS_INTERP_FLAT (LCS_ALPHA_FLAT|LCS_RGB_FLAT|LCS_SPEC_FLAT)
#define LCS_UPDATE_INTERP (LCS_UPDATE_ALPHA_INTERP| \
LCS_UPDATE_RGB_INTERP| \
LCS_UPDATE_SPEC_INTERP)
/* GFXRENDERSTATE_BOOLEAN_ENA_1, p142
*
*/
#define GFX_OP_BOOL_1 ((0x3<<29)|(0x3<<24))
#define B1_UPDATE_SPEC_SETUP_ENABLE (1<<19)
#define B1_SPEC_SETUP_ENABLE (1<<18)
#define B1_UPDATE_ALPHA_SETUP_ENABLE (1<<17)
#define B1_ALPHA_SETUP_ENABLE (1<<16)
#define B1_UPDATE_CI_KEY_ENABLE (1<<15)
#define B1_CI_KEY_ENABLE (1<<14)
#define B1_UPDATE_CHROMAKEY_ENABLE (1<<13)
#define B1_CHROMAKEY_ENABLE (1<<12)
#define B1_UPDATE_Z_BIAS_ENABLE (1<<11)
#define B1_Z_BIAS_ENABLE (1<<10)
#define B1_UPDATE_SPEC_ENABLE (1<<9)
#define B1_SPEC_ENABLE (1<<8)
#define B1_UPDATE_FOG_ENABLE (1<<7)
#define B1_FOG_ENABLE (1<<6)
#define B1_UPDATE_ALPHA_TEST_ENABLE (1<<5)
#define B1_ALPHA_TEST_ENABLE (1<<4)
#define B1_UPDATE_BLEND_ENABLE (1<<3)
#define B1_BLEND_ENABLE (1<<2)
#define B1_UPDATE_Z_TEST_ENABLE (1<<1)
#define B1_Z_TEST_ENABLE (1<<0)
/* GFXRENDERSTATE_BOOLEAN_ENA_2, p143
*
*/
#define GFX_OP_BOOL_2 ((0x3<<29)|(0x4<<24))
#define B2_UPDATE_MAP_CACHE_ENABLE (1<<17)
#define B2_MAP_CACHE_ENABLE (1<<16)
#define B2_UPDATE_ALPHA_DITHER_ENABLE (1<<15)
#define B2_ALPHA_DITHER_ENABLE (1<<14)
#define B2_UPDATE_FOG_DITHER_ENABLE (1<<13)
#define B2_FOG_DITHER_ENABLE (1<<12)
#define B2_UPDATE_SPEC_DITHER_ENABLE (1<<11)
#define B2_SPEC_DITHER_ENABLE (1<<10)
#define B2_UPDATE_RGB_DITHER_ENABLE (1<<9)
#define B2_RGB_DITHER_ENABLE (1<<8)
#define B2_UPDATE_FB_WRITE_ENABLE (1<<3)
#define B2_FB_WRITE_ENABLE (1<<2)
#define B2_UPDATE_ZB_WRITE_ENABLE (1<<1)
#define B2_ZB_WRITE_ENABLE (1<<0)
/* GFXRENDERSTATE_FOG_COLOR, p144
*/
#define GFX_OP_FOG_COLOR ((0x3<<29)|(0x15<<24))
#define FOG_RED_SHIFT 16
#define FOG_GREEN_SHIFT 8
#define FOG_BLUE_SHIFT 0
#define FOG_RESERVED_MASK ((0x7<<16)|(0x3<<8)|(0x3))
/* GFXRENDERSTATE_Z_BIAS_ALPHA_FUNC_REF, p139
*/
#define GFX_OP_ZBIAS_ALPHAFUNC ((0x3<<29)|(0x14<<24))
#define ZA_UPDATE_ZBIAS (1<<22)
#define ZA_ZBIAS_SHIFT 14
#define ZA_ZBIAS_MASK (0xff<<14)
#define ZA_UPDATE_ALPHAFUNC (1<<13)
#define ZA_ALPHA_MASK (0xf<<9)
#define ZA_ALPHA_NEVER (1<<9)
#define ZA_ALPHA_LESS (2<<9)
#define ZA_ALPHA_EQUAL (3<<9)
#define ZA_ALPHA_LEQUAL (4<<9)
#define ZA_ALPHA_GREATER (5<<9)
#define ZA_ALPHA_NOTEQUAL (6<<9)
#define ZA_ALPHA_GEQUAL (7<<9)
#define ZA_ALPHA_ALWAYS (8<<9)
#define ZA_UPDATE_ALPHAREF (1<<8)
#define ZA_ALPHAREF_MASK (0xff<<0)
#define ZA_ALPHAREF_SHIFT 0
#define ZA_ALPHAREF_RESERVED (0x7<<0)
/* GFXRENDERSTATE_SRC_DST_BLEND_MONO, p136
*/
#define GFX_OP_SRC_DEST_MONO ((0x3<<29)|(0x8<<24))
#define SDM_UPDATE_MONO_ENABLE (1<<13)
#define SDM_MONO_ENABLE (1<<12)
#define SDM_UPDATE_SRC_BLEND (1<<11)
#define SDM_SRC_MASK (0xf<<6)
#define SDM_SRC_ZERO (0x1<<6)
#define SDM_SRC_ONE (0x2<<6)
#define SDM_SRC_SRC_COLOR (0x3<<6)
#define SDM_SRC_INV_SRC_COLOR (0x4<<6)
#define SDM_SRC_SRC_ALPHA (0x5<<6)
#define SDM_SRC_INV_SRC_ALPHA (0x6<<6)
#define SDM_SRC_DST_COLOR (0x9<<6)
#define SDM_SRC_INV_DST_COLOR (0xa<<6)
#define SDM_SRC_BOTH_SRC_ALPHA (0xc<<6)
#define SDM_SRC_BOTH_INV_SRC_ALPHA (0xd<<6)
#define SDM_UPDATE_DST_BLEND (1<<5)
#define SDM_DST_MASK (0xf<<0)
#define SDM_DST_ZERO (0x1<<0)
#define SDM_DST_ONE (0x2<<0)
#define SDM_DST_SRC_COLOR (0x3<<0)
#define SDM_DST_INV_SRC_COLOR (0x4<<0)
#define SDM_DST_SRC_ALPHA (0x5<<0)
#define SDM_DST_INV_SRC_ALPHA (0x6<<0)
#define SDM_DST_DST_COLOR (0x9<<0)
#define SDM_DST_INV_DST_COLOR (0xa<<0)
#define SDM_DST_BOTH_SRC_ALPHA (0xc<<0)
#define SDM_DST_BOTH_INV_SRC_ALPHA (0xd<<0)
/* GFXRENDERSTATE_COLOR_FACTOR, p134
*
* Format:
* 0: GFX_OP_COLOR_FACTOR
* 1: ARGB8888 color factor
*/
#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
/* GFXRENDERSTATE_MAP_ALPHA_BLEND_STAGES, p132
*/
#define GFX_OP_MAP_ALPHA_STAGES ((0x3<<29)|(0x1<<24))
#define MA_STAGE_SHIFT 20
#define MA_STAGE_0 (0<<20)
#define MA_STAGE_1 (1<<20)
#define MA_STAGE_2 (2<<20)
#define MA_ARG_ONE (0x0<<2)
#define MA_ARG_ALPHA_FACTOR (0x1<<2)
#define MA_ARG_ITERATED_ALPHA (0x3<<2)
#define MA_ARG_CURRENT_ALPHA (0x5<<2)
#define MA_ARG_TEX0_ALPHA (0x6<<2)
#define MA_ARG_TEX1_ALPHA (0x7<<2)
#define MA_ARG_INVERT (0x1)
#define MA_ARG_DONT_INVERT (0x0)
#define MA_UPDATE_ARG1 (1<<18)
#define MA_ARG1_SHIFT 13
#define MA_ARG1_MASK (0x1d << MA_ARG1_SHIFT)
#define MA_UPDATE_ARG2 (1<<12)
#define MA_ARG2_SHIFT 6
#define MA_ARG2_MASK (0x1d << MA_ARG2_SHIFT)
#define MA_UPDATE_OP (1<<5)
#define MA_OP_MASK (0xf)
#define MA_OP_ARG1 (0x1)
#define MA_OP_ARG2 (0x2)
#define MA_OP_MODULATE (0x3)
#define MA_OP_MODULATE_X2 (0x4)
#define MA_OP_MODULATE_X4 (0x5)
#define MA_OP_ADD (0x6)
#define MA_OP_ADD_SIGNED (0x7)
#define MA_OP_LIN_BLEND_ITER_ALPHA (0x8)
#define MA_OP_LIN_BLEND_ALPHA_FACTOR (0xa)
#define MA_OP_LIN_BLEND_TEX0_ALPHA (0x10)
#define MA_OP_LIN_BLEND_TEX1_ALPHA (0x11)
#define MA_OP_SUBTRACT (0x14)
/* GFXRENDERSTATE_MAP_COLOR_BLEND_STAGES, p129
*/
#define GFX_OP_MAP_COLOR_STAGES ((0x3<<29)|(0x0<<24))
#define MC_STAGE_SHIFT 20
#define MC_STAGE_0 (0<<20)
#define MC_STAGE_1 (1<<20)
#define MC_STAGE_2 (2<<20)
#define MC_UPDATE_DEST (1<<19)
#define MC_DEST_MASK (1<<18)
#define MC_DEST_CURRENT (0<<18)
#define MC_DEST_ACCUMULATOR (1<<18)
#define MC_ARG_ONE (0x0<<2)
#define MC_ARG_COLOR_FACTOR (0x1<<2)
#define MC_ARG_ACCUMULATOR (0x2<<2)
#define MC_ARG_ITERATED_COLOR (0x3<<2)
#define MC_ARG_SPECULAR_COLOR (0x4<<2)
#define MC_ARG_CURRENT_COLOR (0x5<<2)
#define MC_ARG_TEX0_COLOR (0x6<<2)
#define MC_ARG_TEX1_COLOR (0x7<<2)
#define MC_ARG_DONT_REPLICATE_ALPHA (0x0<<1)
#define MC_ARG_REPLICATE_ALPHA (0x1<<1)
#define MC_ARG_DONT_INVERT (0x0)
#define MC_ARG_INVERT (0x1)
#define MC_UPDATE_ARG1 (1<<17)
#define MC_ARG1_SHIFT 12
#define MC_ARG1_MASK (0x1f << MC_ARG1_SHIFT)
#define MC_UPDATE_ARG2 (1<<11)
#define MC_ARG2_SHIFT 6
#define MC_ARG2_MASK (0x1f << MC_ARG2_SHIFT)
#define MC_UPDATE_OP (1<<5)
#define MC_OP_MASK (0xf)
#define MC_OP_DISABLE (0x0)
#define MC_OP_ARG1 (0x1)
#define MC_OP_ARG2 (0x2)
#define MC_OP_MODULATE (0x3)
#define MC_OP_MODULATE_X2 (0x4)
#define MC_OP_MODULATE_X4 (0x5)
#define MC_OP_ADD (0x6)
#define MC_OP_ADD_SIGNED (0x7)
#define MC_OP_LIN_BLEND_ITER_ALPHA (0x8)
#define MC_OP_LIN_BLEND_ALPHA_FACTOR (0xa)
#define MC_OP_LIN_BLEND_TEX0_ALPHA (0x10)
#define MC_OP_LIN_BLEND_TEX1_ALPHA (0x11)
#define MC_OP_LIN_BLEND_TEX0_COLOR (0x12)
#define MC_OP_LIN_BLEND_TEX1_COLOR (0x13)
#define MC_OP_SUBTRACT (0x14)
/* GFXRENDERSTATE_MAP_PALETTE_LOAD, p128
*
* Format:
* 0: GFX_OP_MAP_PALETTE_LOAD
* 1: 16bpp color[0]
* ...
* 256: 16bpp color[255]
*/
#define GFX_OP_MAP_PALETTE_LOAD ((0x3<<29)|(0x1d<<24)|(0x82<<16)|0xff)
/* GFXRENDERSTATE_MAP_LOD_CONTROL, p127
*/
#define GFX_OP_MAP_LOD_CTL ((0x3<<29)|(0x1c<<24)|(0x4<<19))
#define MLC_MAP_ID_SHIFT 16
#define MLC_MAP_0 (0<<16)
#define MLC_MAP_1 (1<<16)
#define MLC_UPDATE_DITHER_WEIGHT (1<<10)
#define MLC_DITHER_WEIGHT_MASK (0x3<<8)
#define MLC_DITHER_WEIGHT_FULL (0x0<<8)
#define MLC_DITHER_WEIGHT_50 (0x1<<8)
#define MLC_DITHER_WEIGHT_25 (0x2<<8)
#define MLC_DITHER_WEIGHT_12 (0x3<<8)
#define MLC_UPDATE_LOD_BIAS (1<<7)
#define MLC_LOD_BIAS_MASK ((1<<7)-1)
/* GFXRENDERSTATE_MAP_LOD_LIMITS, p126
*/
#define GFX_OP_MAP_LOD_LIMITS ((0x3<<29)|(0x1c<<24)|(0x3<<19))
#define MLL_MAP_ID_SHIFT 16
#define MLL_MAP_0 (0<<16)
#define MLL_MAP_1 (1<<16)
#define MLL_UPDATE_MAX_MIP (1<<13)
#define MLL_MAX_MIP_SHIFT 5
#define MLL_MAX_MIP_MASK (0xff<<5)
#define MLL_MAX_MIP_ONE (0x10<<5)
#define MLL_UPDATE_MIN_MIP (1<<4)
#define MLL_MIN_MIP_SHIFT 0
#define MLL_MIN_MIP_MASK (0xf<<0)
/* GFXRENDERSTATE_MAP_FILTER, p124
*/
#define GFX_OP_MAP_FILTER ((0x3<<29)|(0x1c<<24)|(0x2<<19))
#define MF_MAP_ID_SHIFT 16
#define MF_MAP_0 (0<<16)
#define MF_MAP_1 (1<<16)
#define MF_UPDATE_ANISOTROPIC (1<<12)
#define MF_ANISOTROPIC_MASK (1<<10)
#define MF_ANISOTROPIC_ENABLE (1<<10)
#define MF_UPDATE_MIP_FILTER (1<<9)
#define MF_MIP_MASK (0x3<<6)
#define MF_MIP_NONE (0x0<<6)
#define MF_MIP_NEAREST (0x1<<6)
#define MF_MIP_DITHER (0x2<<6)
#define MF_MIP_LINEAR (0x3<<6)
#define MF_UPDATE_MAG_FILTER (1<<5)
#define MF_MAG_MASK (1<<3)
#define MF_MAG_LINEAR (1<<3)
#define MF_MAG_NEAREST (0<<3)
#define MF_UPDATE_MIN_FILTER (1<<2)
#define MF_MIN_MASK (1<<0)
#define MF_MIN_LINEAR (1<<0)
#define MF_MIN_NEAREST (0<<0)
/* GFXRENDERSTATE_MAP_INFO, p118
*/
#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
#define MI1_MAP_ID_SHIFT 28
#define MI1_MAP_0 (0<<28)
#define MI1_MAP_1 (1<<28)
#define MI1_FMT_MASK (0x7<<24)
#define MI1_FMT_8CI (0x0<<24)
#define MI1_FMT_8BPP (0x1<<24)
#define MI1_FMT_16BPP (0x2<<24)
#define MI1_FMT_422 (0x5<<24)
#define MI1_PF_MASK (0x3<<21)
#define MI1_PF_8CI_RGB565 (0x0<<21)
#define MI1_PF_8CI_ARGB1555 (0x1<<21)
#define MI1_PF_8CI_ARGB4444 (0x2<<21)
#define MI1_PF_8CI_AY88 (0x3<<21)
#define MI1_PF_16BPP_RGB565 (0x0<<21)
#define MI1_PF_16BPP_ARGB1555 (0x1<<21)
#define MI1_PF_16BPP_ARGB4444 (0x2<<21)
#define MI1_PF_16BPP_AY88 (0x3<<21)
#define MI1_PF_422_YCRCB_SWAP_Y (0x0<<21)
#define MI1_PF_422_YCRCB (0x1<<21)
#define MI1_PF_422_YCRCB_SWAP_UV (0x2<<21)
#define MI1_PF_422_YCRCB_SWAP_YUV (0x3<<21)
#define MI1_OUTPUT_CHANNEL_MASK (0x3<<19)
#define MI1_COLOR_CONV_ENABLE (1<<18)
#define MI1_VERT_STRIDE_MASK (1<<17)
#define MI1_VERT_STRIDE_1 (1<<17)
#define MI1_VERT_OFFSET_MASK (1<<16)
#define MI1_VERT_OFFSET_1 (1<<16)
#define MI1_ENABLE_FENCE_REGS (1<<10)
#define MI1_TILED_SURFACE (1<<9)
#define MI1_TILE_WALK_X (0<<8)
#define MI1_TILE_WALK_Y (1<<8)
#define MI1_PITCH_MASK (0xf<<0)
#define MI2_DIMENSIONS_ARE_LOG2 (1<<31)
#define MI2_DIMENSIONS_ARE_EXACT (0<<31)
#define MI2_HEIGHT_SHIFT 16
#define MI2_HEIGHT_MASK (0x1ff<<16)
#define MI2_WIDTH_SHIFT 0
#define MI2_WIDTH_MASK (0x1ff<<0)
#define MI3_BASE_ADDR_MASK (~0xf)
/* GFXRENDERSTATE_MAP_COORD_SETS, p116
*/
#define GFX_OP_MAP_COORD_SETS ((0x3<<29)|(0x1c<<24)|(0x1<<19))
#define MCS_COORD_ID_SHIFT 16
#define MCS_COORD_0 (0<<16)
#define MCS_COORD_1 (1<<16)
#define MCS_UPDATE_NORMALIZED (1<<15)
#define MCS_NORMALIZED_COORDS_MASK (1<<14)
#define MCS_NORMALIZED_COORDS (1<<14)
#define MCS_UPDATE_V_STATE (1<<7)
#define MCS_V_STATE_MASK (0x3<<4)
#define MCS_V_WRAP (0x0<<4)
#define MCS_V_MIRROR (0x1<<4)
#define MCS_V_CLAMP (0x2<<4)
#define MCS_V_WRAP_SHORTEST (0x3<<4)
#define MCS_UPDATE_U_STATE (1<<3)
#define MCS_U_STATE_MASK (0x3<<0)
#define MCS_U_WRAP (0x0<<0)
#define MCS_U_MIRROR (0x1<<0)
#define MCS_U_CLAMP (0x2<<0)
#define MCS_U_WRAP_SHORTEST (0x3<<0)
/* GFXRENDERSTATE_MAP_TEXELS, p115
*/
#define GFX_OP_MAP_TEXELS ((0x3<<29)|(0x1c<<24)|(0x0<<19))
#define MT_UPDATE_TEXEL1_STATE (1<<15)
#define MT_TEXEL1_DISABLE (0<<14)
#define MT_TEXEL1_ENABLE (1<<14)
#define MT_TEXEL1_COORD0 (0<<11)
#define MT_TEXEL1_COORD1 (1<<11)
#define MT_TEXEL1_MAP0 (0<<8)
#define MT_TEXEL1_MAP1 (1<<8)
#define MT_UPDATE_TEXEL0_STATE (1<<7)
#define MT_TEXEL0_DISABLE (0<<6)
#define MT_TEXEL0_ENABLE (1<<6)
#define MT_TEXEL0_COORD0 (0<<3)
#define MT_TEXEL0_COORD1 (1<<3)
#define MT_TEXEL0_MAP0 (0<<0)
#define MT_TEXEL0_MAP1 (1<<0)
/* GFXRENDERSTATE_VERTEX_FORMAT, p110
*/
#define GFX_OP_VERTEX_FMT ((0x3<<29)|(0x5<<24))
#define VF_TEXCOORD_COUNT_SHIFT 8
#define VF_TEXCOORD_COUNT_0 (0<<8)
#define VF_TEXCOORD_COUNT_1 (1<<8)
#define VF_TEXCOORD_COUNT_2 (2<<8)
#define VF_SPEC_FOG_ENABLE (1<<7)
#define VF_RGBA_ENABLE (1<<6)
#define VF_Z_OFFSET_ENABLE (1<<5)
#define VF_XYZ (0x1<<1)
#define VF_XYZW (0x2<<1)
#define VF_XY (0x3<<1)
#define VF_XYW (0x4<<1)
#define VERT_X_MASK (~0xf)
#define VERT_X_EDGE_V2V0 (1<<2)
#define VERT_X_EDGE_V1V2 (1<<1)
#define VERT_X_EDGE_V0V1 (1<<0)
/* Not enabled fields should not be sent to hardware:
*/
typedef struct {
union {
float x;
unsigned int edge_flags;
} x;
float y;
float z;
float z_bias;
float oow;
unsigned int argb;
unsigned int fog_spec_rgb; /* spec g and r ignored. */
float tu0;
float tv0;
float tu1;
float tv1;
} i810_full_vertex;
/* GFXCMDPARSER_BATCH_BUFFER, p105
*
* Not clear whether start address must be shifted or not. Not clear
* whether address is physical system memory, or subject to GTT
* translation. Because the address appears to be 32 bits long,
* perhaps it refers to physical system memory...
*/
#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1)
#define BB1_START_ADDR_MASK (~0x7)
#define BB1_PROTECTED (1<<0)
#define BB1_UNPROTECTED (0<<0)
#define BB2_END_ADDR_MASK (~0x7)
/* Hardware seems to barf on buffers larger than this (in strange ways)...
*/
#define MAX_BATCH (512*1024)
/* GFXCMDPARSER_Z_BUFFER_INFO, p98
*
* Base address is in GTT space, and must be 4K aligned
*/
#define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23))
#define ZB_BASE_ADDR_SHIFT 0
#define ZB_BASE_ADDR_MASK (~((1<<12)-1))
#define ZB_PITCH_512B (0x0<<0)
#define ZB_PITCH_1K (0x1<<0)
#define ZB_PITCH_2K (0x2<<0)
#define ZB_PITCH_4K (0x3<<0)
/* GFXCMDPARSER_FRONT_BUFFER_INFO, p97
*
* Format:
* 0: CMD_OP_FRONT_BUFFER_INFO | (pitch<<FB0_PITCH_SHIFT) | FB0_*
* 1: FB1_*
*/
#define CMD_OP_FRONT_BUFFER_INFO ((0x0<<29)|(0x14<<23))
#define FB0_PITCH_SHIFT 8
#define FB0_FLIP_SYNC (0<<6)
#define FB0_FLIP_ASYNC (1<<6)
#define FB0_BASE_ADDR_SHIFT 0
#define FB0_BASE_ADDR_MASK 0x03FFFFF8
/* GFXCMDPARSER_DEST_BUFFER_INFO, p96
*
* Format:
*/
#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
#define DB1_BASE_ADDR_SHIFT 0
#define DB1_BASE_ADDR_MASK 0x03FFF000
#define DB1_PITCH_512B (0x0<<0)
#define DB1_PITCH_1K (0x1<<0)
#define DB1_PITCH_2K (0x2<<0)
#define DB1_PITCH_4K (0x4<<0)
/* GFXRENDERSTATE_DEST_BUFFER_VARIABLES, p152
*
* Format:
* 0: GFX_OP_DESTBUFFER_VARS
* 1: DEST_*
*/
#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
#define DV_HORG_BIAS_MASK (0xf<<20)
#define DV_HORG_BIAS_OGL (0x0<<20)
#define DV_VORG_BIAS_MASK (0xf<<16)
#define DV_VORG_BIAS_OGL (0x0<<16)
#define DV_PF_MASK (0x7<<8)
#define DV_PF_INDEX (0x0<<8)
#define DV_PF_555 (0x1<<8)
#define DV_PF_565 (0x2<<8)
#define GFX_OP_ANTIALIAS ((0x3<<29)|(0x6<<24))
#define AA_UPDATE_EDGEFLAG (1<<13)
#define AA_ENABLE_EDGEFLAG (1<<12)
#define AA_UPDATE_POLYWIDTH (1<<11)
#define AA_POLYWIDTH_05 (1<<9)
#define AA_POLYWIDTH_10 (2<<9)
#define AA_POLYWIDTH_20 (3<<9)
#define AA_POLYWIDTH_40 (4<<9)
#define AA_UPDATE_LINEWIDTH (1<<8)
#define AA_LINEWIDTH_05 (1<<6)
#define AA_LINEWIDTH_10 (2<<6)
#define AA_LINEWIDTH_20 (3<<6)
#define AA_LINEWIDTH_40 (4<<6)
#define AA_UPDATE_BB_EXPANSION (1<<5)
#define AA_BB_EXPANSION_SHIFT 2
#define AA_UPDATE_AA_ENABLE (1<<1)
#define AA_ENABLE (1<<0)
#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
#define ST1_ENABLE (1<<16)
#define ST1_MASK (0xffff)
#define I810_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
#endif

570
src/mesa/drivers/dri/i810/i810context.c
View File

@ -1,570 +0,0 @@
/**************************************************************************
Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*
*/
#include "main/glheader.h"
#include "main/context.h"
#include "main/simple_list.h"
#include "main/imports.h"
#include "main/points.h"
#include "swrast/swrast.h"
#include "swrast_setup/swrast_setup.h"
#include "tnl/tnl.h"
#include "vbo/vbo.h"
#include "tnl/t_pipeline.h"
#include "drivers/common/driverfuncs.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810state.h"
#include "i810tex.h"
#include "i810span.h"
#include "i810tris.h"
#include "i810vb.h"
#include "i810ioctl.h"
#include "drirenderbuffer.h"
#include "utils.h"
#ifndef I810_DEBUG
int I810_DEBUG = (0);
#endif
PUBLIC const char __driConfigOptions[] = { 0 };
const GLuint __driNConfigOptions = 0;
static const GLubyte *i810GetString( struct gl_context *ctx, GLenum name )
{
static char buffer[128];
switch (name) {
case GL_VENDOR:
return (GLubyte *)"Keith Whitwell";
case GL_RENDERER: {
i810ContextPtr imesa = I810_CONTEXT(ctx);
const char * chipset;
switch (imesa->i810Screen->deviceID) {
case PCI_CHIP_I810: chipset = "i810"; break;
case PCI_CHIP_I810_DC100: chipset = "i810 DC-100"; break;
case PCI_CHIP_I810_E: chipset = "i810E"; break;
case PCI_CHIP_I815: chipset = "i815"; break;
default: chipset = "Unknown i810-class Chipset"; break;
}
(void) driGetRendererString( buffer, chipset, 0 );
return (GLubyte *) buffer;
}
default:
return 0;
}
}
static void i810BufferSize(struct gl_framebuffer *buffer, GLuint *width, GLuint *height)
{
GET_CURRENT_CONTEXT(ctx);
i810ContextPtr imesa = I810_CONTEXT(ctx);
/* Need to lock to make sure the driDrawable is uptodate. This
* information is used to resize Mesa's software buffers, so it has
* to be correct.
*/
LOCK_HARDWARE(imesa);
*width = imesa->driDrawable->w;
*height = imesa->driDrawable->h;
UNLOCK_HARDWARE(imesa);
}
/* Extension strings exported by the i810 driver.
*/
static const struct dri_extension card_extensions[] =
{
{ "GL_ARB_multitexture", NULL },
{ "GL_ARB_texture_env_add", NULL },
{ "GL_ARB_texture_env_combine", NULL },
{ "GL_ARB_texture_env_crossbar", NULL },
{ "GL_ARB_texture_mirrored_repeat", NULL },
{ "GL_EXT_stencil_wrap", NULL },
{ "GL_EXT_texture_edge_clamp", NULL },
{ "GL_EXT_texture_env_combine", NULL },
{ "GL_EXT_texture_lod_bias", NULL },
{ "GL_EXT_texture_rectangle", NULL },
{ "GL_MESA_ycbcr_texture", NULL },
{ "GL_NV_blend_square", NULL },
{ NULL, NULL }
};
extern const struct tnl_pipeline_stage _i810_render_stage;
static const struct tnl_pipeline_stage *i810_pipeline[] = {
&_tnl_vertex_transform_stage,
&_tnl_normal_transform_stage,
&_tnl_lighting_stage,
&_tnl_fog_coordinate_stage,
&_tnl_texgen_stage,
&_tnl_texture_transform_stage,
/* REMOVE: point attenuation stage */
#if 1
&_i810_render_stage, /* ADD: unclipped rastersetup-to-dma */
#endif
&_tnl_render_stage,
0,
};
static const struct dri_debug_control debug_control[] =
{
{ "fall", DEBUG_FALLBACKS },
{ "tex", DEBUG_TEXTURE },
{ "ioctl", DEBUG_IOCTL },
{ "prim", DEBUG_PRIMS },
{ "vert", DEBUG_VERTS },
{ "state", DEBUG_STATE },
{ "verb", DEBUG_VERBOSE },
{ "dri", DEBUG_DRI },
{ "dma", DEBUG_DMA },
{ "san", DEBUG_SANITY },
{ "sync", DEBUG_SYNC },
{ "sleep", DEBUG_SLEEP },
{ NULL, 0 }
};
GLboolean
i810CreateContext( gl_api api,
const struct gl_config *mesaVis,
__DRIcontext *driContextPriv,
void *sharedContextPrivate )
{
struct gl_context *ctx, *shareCtx;
i810ContextPtr imesa;
__DRIscreen *sPriv = driContextPriv->driScreenPriv;
i810ScreenPrivate *i810Screen = (i810ScreenPrivate *)sPriv->private;
I810SAREAPtr saPriv = (I810SAREAPtr)
(((GLubyte *)sPriv->pSAREA) + i810Screen->sarea_priv_offset);
struct dd_function_table functions;
/* Allocate i810 context */
imesa = (i810ContextPtr) CALLOC_STRUCT(i810_context_t);
if (!imesa) {
return GL_FALSE;
}
driContextPriv->driverPrivate = imesa;
imesa->i810Screen = i810Screen;
imesa->driScreen = sPriv;
imesa->sarea = saPriv;
imesa->glBuffer = NULL;
/* Init default driver functions then plug in our I810-specific functions
* (the texture functions are especially important)
*/
_mesa_init_driver_functions( &functions );
i810InitIoctlFuncs( &functions );
i810InitTextureFuncs( &functions );
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((i810ContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
imesa->glCtx = _mesa_create_context(API_OPENGL, mesaVis, shareCtx,
&functions, (void*) imesa);
if (!imesa->glCtx) {
FREE(imesa);
return GL_FALSE;
}
(void) memset( imesa->texture_heaps, 0, sizeof( imesa->texture_heaps ) );
make_empty_list( & imesa->swapped );
imesa->nr_heaps = 1;
imesa->texture_heaps[0] = driCreateTextureHeap( 0, imesa,
i810Screen->textureSize,
12,
I810_NR_TEX_REGIONS,
imesa->sarea->texList,
(unsigned *) & imesa->sarea->texAge, /* XXX we shouldn't cast! */
& imesa->swapped,
sizeof( struct i810_texture_object_t ),
(destroy_texture_object_t *) i810DestroyTexObj );
/* Set the maximum texture size small enough that we can guarentee
* that both texture units can bind a maximal texture and have them
* in memory at once.
*/
ctx = imesa->glCtx;
ctx->Const.MaxTextureUnits = 2;
ctx->Const.MaxTextureImageUnits = 2;
ctx->Const.MaxTextureCoordUnits = 2;
/* FIXME: driCalcualteMaxTextureLevels assumes that mipmaps are tightly
* FIXME: packed, but they're not in Intel graphics hardware.
*/
driCalculateMaxTextureLevels( imesa->texture_heaps,
imesa->nr_heaps,
& ctx->Const,
4,
11, /* max 2D texture size is 2048x2048 */
0, /* 3D textures unsupported */
0, /* cube textures unsupported. */
0, /* texture rectangles unsupported. */
12,
GL_FALSE,
0 );
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 3.0;
ctx->Const.MaxLineWidthAA = 3.0;
ctx->Const.LineWidthGranularity = 1.0;
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 3.0;
ctx->Const.MaxPointSizeAA = 3.0;
ctx->Const.PointSizeGranularity = 1.0;
/* reinitialize the context point state.
* It depend on constants in __struct gl_contextRec::Const
*/
_mesa_init_point(ctx);
ctx->Driver.GetBufferSize = i810BufferSize;
ctx->Driver.GetString = i810GetString;
/* Who owns who?
*/
ctx->DriverCtx = (void *) imesa;
imesa->glCtx = ctx;
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_vbo_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
/* Install the customized pipeline:
*/
_tnl_destroy_pipeline( ctx );
_tnl_install_pipeline( ctx, i810_pipeline );
/* Configure swrast and T&L to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_tnl_allow_pixel_fog( ctx, GL_FALSE );
_tnl_allow_vertex_fog( ctx, GL_TRUE );
/* Dri stuff
*/
imesa->hHWContext = driContextPriv->hHWContext;
imesa->driFd = sPriv->fd;
imesa->driHwLock = &sPriv->pSAREA->lock;
imesa->stipple_in_hw = 1;
imesa->RenderIndex = ~0;
imesa->dirty = I810_UPLOAD_CTX|I810_UPLOAD_BUFFERS;
imesa->upload_cliprects = GL_TRUE;
imesa->CurrentTexObj[0] = 0;
imesa->CurrentTexObj[1] = 0;
_math_matrix_ctr( &imesa->ViewportMatrix );
driInitExtensions( ctx, card_extensions, GL_TRUE );
/* XXX these should really go right after _mesa_init_driver_functions() */
i810InitStateFuncs( ctx );
i810InitTriFuncs( ctx );
i810InitSpanFuncs( ctx );
i810InitVB( ctx );
i810InitState( ctx );
#if DO_DEBUG
I810_DEBUG = driParseDebugString( getenv( "I810_DEBUG" ),
debug_control );
I810_DEBUG |= driParseDebugString( getenv( "INTEL_DEBUG" ),
debug_control );
#endif
return GL_TRUE;
}
void
i810DestroyContext(__DRIcontext *driContextPriv)
{
i810ContextPtr imesa = (i810ContextPtr) driContextPriv->driverPrivate;
assert(imesa); /* should never be null */
if (imesa) {
GLboolean release_texture_heaps;
release_texture_heaps = (imesa->glCtx->Shared->RefCount == 1);
_swsetup_DestroyContext( imesa->glCtx );
_tnl_DestroyContext( imesa->glCtx );
_vbo_DestroyContext( imesa->glCtx );
_swrast_DestroyContext( imesa->glCtx );
i810FreeVB( imesa->glCtx );
/* free the Mesa context */
imesa->glCtx->DriverCtx = NULL;
_mesa_destroy_context(imesa->glCtx);
if ( release_texture_heaps ) {
/* This share group is about to go away, free our private
* texture object data.
*/
unsigned int i;
for ( i = 0 ; i < imesa->nr_heaps ; i++ ) {
driDestroyTextureHeap( imesa->texture_heaps[ i ] );
imesa->texture_heaps[ i ] = NULL;
}
assert( is_empty_list( & imesa->swapped ) );
}
FREE(imesa);
}
}
void i810XMesaSetFrontClipRects( i810ContextPtr imesa )
{
__DRIdrawable *dPriv = imesa->driDrawable;
imesa->numClipRects = dPriv->numClipRects;
imesa->pClipRects = dPriv->pClipRects;
imesa->drawX = dPriv->x;
imesa->drawY = dPriv->y;
i810EmitDrawingRectangle( imesa );
imesa->upload_cliprects = GL_TRUE;
}
void i810XMesaSetBackClipRects( i810ContextPtr imesa )
{
__DRIdrawable *dPriv = imesa->driDrawable;
if (imesa->sarea->pf_enabled == 0 && dPriv->numBackClipRects == 0)
{
imesa->numClipRects = dPriv->numClipRects;
imesa->pClipRects = dPriv->pClipRects;
imesa->drawX = dPriv->x;
imesa->drawY = dPriv->y;
} else {
imesa->numClipRects = dPriv->numBackClipRects;
imesa->pClipRects = dPriv->pBackClipRects;
imesa->drawX = dPriv->backX;
imesa->drawY = dPriv->backY;
}
i810EmitDrawingRectangle( imesa );
imesa->upload_cliprects = GL_TRUE;
}
static void i810XMesaWindowMoved( i810ContextPtr imesa )
{
/* Determine current color drawing buffer */
switch (imesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0]) {
case BUFFER_FRONT_LEFT:
i810XMesaSetFrontClipRects( imesa );
break;
case BUFFER_BACK_LEFT:
i810XMesaSetBackClipRects( imesa );
break;
default:
/* glDrawBuffer(GL_NONE or GL_FRONT_AND_BACK): software fallback */
i810XMesaSetFrontClipRects( imesa );
}
}
GLboolean
i810UnbindContext(__DRIcontext *driContextPriv)
{
i810ContextPtr imesa = (i810ContextPtr) driContextPriv->driverPrivate;
if (imesa) {
imesa->dirty = I810_UPLOAD_CTX|I810_UPLOAD_BUFFERS;
if (imesa->CurrentTexObj[0]) imesa->dirty |= I810_UPLOAD_TEX0;
if (imesa->CurrentTexObj[1]) imesa->dirty |= I810_UPLOAD_TEX1;
}
return GL_TRUE;
}
GLboolean
i810MakeCurrent(__DRIcontext *driContextPriv,
__DRIdrawable *driDrawPriv,
__DRIdrawable *driReadPriv)
{
if (driContextPriv) {
i810ContextPtr imesa = (i810ContextPtr) driContextPriv->driverPrivate;
/* Shouldn't the readbuffer be stored also?
*/
imesa->driDrawable = driDrawPriv;
_mesa_make_current(imesa->glCtx,
(struct gl_framebuffer *) driDrawPriv->driverPrivate,
(struct gl_framebuffer *) driReadPriv->driverPrivate);
/* Are these necessary?
*/
i810XMesaWindowMoved( imesa );
}
else {
_mesa_make_current(NULL, NULL, NULL);
}
return GL_TRUE;
}
static void
i810UpdatePageFlipping( i810ContextPtr imesa )
{
struct gl_context *ctx = imesa->glCtx;
int front = 0;
/* Determine current color drawing buffer */
switch (ctx->DrawBuffer->_ColorDrawBufferIndexes[0]) {
case BUFFER_FRONT_LEFT:
front = 1;
break;
case BUFFER_BACK_LEFT:
front = 0;
break;
default:
return;
}
if ( imesa->sarea->pf_current_page == 1 )
front ^= 1;
driFlipRenderbuffers(ctx->WinSysDrawBuffer, front);
if (front) {
imesa->BufferSetup[I810_DESTREG_DI1] = imesa->i810Screen->fbOffset | imesa->i810Screen->backPitchBits;
} else {
imesa->BufferSetup[I810_DESTREG_DI1] = imesa->i810Screen->backOffset | imesa->i810Screen->backPitchBits;
}
imesa->dirty |= I810_UPLOAD_BUFFERS;
}
void i810GetLock( i810ContextPtr imesa, GLuint flags )
{
__DRIdrawable *dPriv = imesa->driDrawable;
__DRIscreen *sPriv = imesa->driScreen;
I810SAREAPtr sarea = imesa->sarea;
int me = imesa->hHWContext;
unsigned i;
drmGetLock(imesa->driFd, imesa->hHWContext, flags);
/* If the window moved, may need to set a new cliprect now.
*
* NOTE: This releases and regains the hw lock, so all state
* checking must be done *after* this call:
*/
DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
/* If we lost context, need to dump all registers to hardware.
* Note that we don't care about 2d contexts, even if they perform
* accelerated commands, so the DRI locking in the X server is even
* more broken than usual.
*/
if (sarea->ctxOwner != me) {
driUpdateFramebufferSize(imesa->glCtx, dPriv);
imesa->upload_cliprects = GL_TRUE;
imesa->dirty = I810_UPLOAD_CTX|I810_UPLOAD_BUFFERS;
if (imesa->CurrentTexObj[0]) imesa->dirty |= I810_UPLOAD_TEX0;
if (imesa->CurrentTexObj[1]) imesa->dirty |= I810_UPLOAD_TEX1;
sarea->ctxOwner = me;
}
/* Shared texture managment - if another client has played with
* texture space, figure out which if any of our textures have been
* ejected, and update our global LRU.
*/
for ( i = 0 ; i < imesa->nr_heaps ; i++ ) {
DRI_AGE_TEXTURES( imesa->texture_heaps[ i ] );
}
if (imesa->lastStamp != dPriv->lastStamp) {
i810UpdatePageFlipping( imesa );
i810XMesaWindowMoved( imesa );
imesa->lastStamp = dPriv->lastStamp;
}
}
void
i810SwapBuffers( __DRIdrawable *dPriv )
{
if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
i810ContextPtr imesa;
struct gl_context *ctx;
imesa = (i810ContextPtr) dPriv->driContextPriv->driverPrivate;
ctx = imesa->glCtx;
if (ctx->Visual.doubleBufferMode) {
_mesa_notifySwapBuffers( ctx ); /* flush pending rendering comands */
if ( imesa->sarea->pf_active ) {
i810PageFlip( dPriv );
} else {
i810CopyBuffer( dPriv );
}
}
}
else {
/* XXX this shouldn't be an error but we can't handle it for now */
_mesa_problem(NULL, "i810SwapBuffers: drawable has no context!\n");
}
}

249
src/mesa/drivers/dri/i810/i810context.h
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@ -1,249 +0,0 @@
/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef I810CONTEXT_INC
#define I810CONTEXT_INC
typedef struct i810_context_t i810Context;
typedef struct i810_context_t *i810ContextPtr;
typedef struct i810_texture_object_t *i810TextureObjectPtr;
#include "drm.h"
#include "main/mtypes.h"
#include "main/mm.h"
#include "i810screen.h"
#include "i810tex.h"
/* Reasons to disable hardware rasterization.
*/
#define I810_FALLBACK_TEXTURE 0x1
#define I810_FALLBACK_DRAW_BUFFER 0x2
#define I810_FALLBACK_READ_BUFFER 0x4
#define I810_FALLBACK_COLORMASK 0x8
#define I810_FALLBACK_SPECULAR 0x20
#define I810_FALLBACK_LOGICOP 0x40
#define I810_FALLBACK_RENDERMODE 0x80
#define I810_FALLBACK_STENCIL 0x100
#define I810_FALLBACK_BLEND_EQ 0x200
#define I810_FALLBACK_BLEND_FUNC 0x400
#ifndef PCI_CHIP_I810
#define PCI_CHIP_I810 0x7121
#define PCI_CHIP_I810_DC100 0x7123
#define PCI_CHIP_I810_E 0x7125
#define PCI_CHIP_I815 0x1132
#endif
#define IS_I810(imesa) (imesa->i810Screen->deviceID == PCI_CHIP_I810 || \
imesa->i810Screen->deviceID == PCI_CHIP_I810_DC100 || \
imesa->i810Screen->deviceID == PCI_CHIP_I810_E)
#define IS_I815(imesa) (imesa->i810Screen->deviceID == PCI_CHIP_I815)
#define I810_UPLOAD_TEX(i) (I810_UPLOAD_TEX0<<(i))
/* Use the templated vertex formats:
*/
#define TAG(x) i810##x
#include "tnl_dd/t_dd_vertex.h"
#undef TAG
typedef void (*i810_tri_func)( i810ContextPtr, i810Vertex *, i810Vertex *,
i810Vertex * );
typedef void (*i810_line_func)( i810ContextPtr, i810Vertex *, i810Vertex * );
typedef void (*i810_point_func)( i810ContextPtr, i810Vertex * );
struct i810_context_t {
GLint refcount;
struct gl_context *glCtx;
/* Texture object bookkeeping
*/
unsigned nr_heaps;
driTexHeap * texture_heaps[1];
driTextureObject swapped;
struct i810_texture_object_t *CurrentTexObj[2];
/* Bit flag to keep track of fallbacks.
*/
GLuint Fallback;
/* State for i810vb.c and i810tris.c.
*/
GLuint new_state; /* _NEW_* flags */
GLuint SetupNewInputs;
GLuint SetupIndex;
GLuint RenderIndex;
GLmatrix ViewportMatrix;
GLenum render_primitive;
GLenum reduced_primitive;
GLuint hw_primitive;
GLubyte *verts;
drmBufPtr vertex_buffer;
char *vertex_addr;
GLuint vertex_low;
GLuint vertex_high;
GLuint vertex_last_prim;
GLboolean upload_cliprects;
/* Fallback rasterization functions
*/
i810_point_func draw_point;
i810_line_func draw_line;
i810_tri_func draw_tri;
/* Hardware state
*/
GLuint dirty; /* I810_UPLOAD_* */
GLuint Setup[I810_CTX_SETUP_SIZE];
GLuint BufferSetup[I810_DEST_SETUP_SIZE];
int vertex_size;
int vertex_stride_shift;
unsigned int lastStamp;
GLboolean stipple_in_hw;
GLenum TexEnvImageFmt[2];
/* State which can't be computed completely on the fly:
*/
GLuint LcsCullMode;
GLuint LcsLineWidth;
GLuint LcsPointSize;
/* Funny mesa mirrors
*/
GLushort ClearColor;
/* DRI stuff
*/
GLuint needClip;
struct gl_framebuffer *glBuffer;
GLboolean doPageFlip;
/* These refer to the current draw (front vs. back) buffer:
*/
int drawX; /* origin of drawable in draw buffer */
int drawY;
GLuint numClipRects; /* cliprects for that buffer */
drm_clip_rect_t *pClipRects;
int lastSwap;
int texAge;
int ctxAge;
int dirtyAge;
GLboolean scissor;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
drm_context_t hHWContext;
drm_hw_lock_t *driHwLock;
int driFd;
__DRIdrawable *driDrawable;
__DRIscreen *driScreen;
i810ScreenPrivate *i810Screen;
I810SAREAPtr sarea;
};
#define I810_CONTEXT(ctx) ((i810ContextPtr)(ctx->DriverCtx))
#define GET_DISPATCH_AGE( imesa ) imesa->sarea->last_dispatch
#define GET_ENQUEUE_AGE( imesa ) imesa->sarea->last_enqueue
/* Lock the hardware and validate our state.
*/
#define LOCK_HARDWARE( imesa ) \
do { \
char __ret=0; \
DRM_CAS(imesa->driHwLock, imesa->hHWContext, \
(DRM_LOCK_HELD|imesa->hHWContext), __ret); \
if (__ret) \
i810GetLock( imesa, 0 ); \
} while (0)
/* Release the kernel lock.
*/
#define UNLOCK_HARDWARE(imesa) \
DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext);
/* This is the wrong way to do it, I'm sure. Otherwise the drm
* bitches that I've already got the heavyweight lock. At worst,
* this is 3 ioctls. The best solution probably only gets me down
* to 2 ioctls in the worst case.
*/
#define LOCK_HARDWARE_QUIESCENT( imesa ) do { \
LOCK_HARDWARE( imesa ); \
i810RegetLockQuiescent( imesa ); \
} while(0)
extern void i810GetLock( i810ContextPtr imesa, GLuint flags );
extern void i810EmitHwStateLocked( i810ContextPtr imesa );
extern void i810EmitScissorValues( i810ContextPtr imesa, int box_nr, int emit );
extern void i810EmitDrawingRectangle( i810ContextPtr imesa );
extern void i810XMesaSetBackClipRects( i810ContextPtr imesa );
extern void i810XMesaSetFrontClipRects( i810ContextPtr imesa );
#define SUBPIXEL_X -.5
#define SUBPIXEL_Y -.5
/* ================================================================
* Debugging:
*/
#define DO_DEBUG 1
#if DO_DEBUG
extern int I810_DEBUG;
#else
#define I810_DEBUG 0
#endif
#define DEBUG_TEXTURE 0x1
#define DEBUG_STATE 0x2
#define DEBUG_IOCTL 0x4
#define DEBUG_PRIMS 0x8
#define DEBUG_VERTS 0x10
#define DEBUG_FALLBACKS 0x20
#define DEBUG_VERBOSE 0x40
#define DEBUG_DRI 0x80
#define DEBUG_DMA 0x100
#define DEBUG_SANITY 0x200
#define DEBUG_SYNC 0x400
#define DEBUG_SLEEP 0x800
#endif

519
src/mesa/drivers/dri/i810/i810ioctl.c
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@ -1,519 +0,0 @@
#include <unistd.h> /* for usleep() */
#include "main/glheader.h"
#include "main/mtypes.h"
#include "main/macros.h"
#include "main/dd.h"
#include "swrast/swrast.h"
#include "main/mm.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "main/context.h"
#include "i810ioctl.h"
#include "i810state.h"
static drmBufPtr i810_get_buffer_ioctl( i810ContextPtr imesa )
{
drmI810DMA dma;
drmBufPtr buf;
int retcode, i = 0;
while (1) {
retcode = drmCommandWriteRead(imesa->driFd, DRM_I810_GETBUF,
&dma, sizeof(drmI810DMA));
if (dma.granted == 1 && retcode == 0)
break;
if (++i > 1000) {
drmCommandNone(imesa->driFd, DRM_I810_FLUSH);
i = 0;
}
}
buf = &(imesa->i810Screen->bufs->list[dma.request_idx]);
buf->idx = dma.request_idx;
buf->used = 0;
buf->total = dma.request_size;
buf->address = (drmAddress)dma.virtual;
return buf;
}
#define DEPTH_SCALE ((1<<16)-1)
static void i810Clear( struct gl_context *ctx, GLbitfield mask )
{
i810ContextPtr imesa = I810_CONTEXT( ctx );
__DRIdrawable *dPriv = imesa->driDrawable;
const GLuint colorMask = *((GLuint *) &ctx->Color.ColorMask[0]);
drmI810Clear clear;
unsigned int i;
clear.flags = 0;
clear.clear_color = imesa->ClearColor;
clear.clear_depth = (GLuint) (ctx->Depth.Clear * DEPTH_SCALE);
I810_FIREVERTICES( imesa );
if ((mask & BUFFER_BIT_FRONT_LEFT) && colorMask == ~0U) {
clear.flags |= I810_FRONT;
mask &= ~BUFFER_BIT_FRONT_LEFT;
}
if ((mask & BUFFER_BIT_BACK_LEFT) && colorMask == ~0U) {
clear.flags |= I810_BACK;
mask &= ~BUFFER_BIT_BACK_LEFT;
}
if (mask & BUFFER_BIT_DEPTH) {
if (ctx->Depth.Mask)
clear.flags |= I810_DEPTH;
mask &= ~BUFFER_BIT_DEPTH;
}
if (clear.flags) {
GLint cx, cy, cw, ch;
LOCK_HARDWARE( imesa );
/* compute region after locking: */
cx = ctx->DrawBuffer->_Xmin;
cy = ctx->DrawBuffer->_Ymin;
cw = ctx->DrawBuffer->_Xmax - cx;
ch = ctx->DrawBuffer->_Ymax - cy;
/* flip top to bottom */
cy = dPriv->h-cy-ch;
cx += imesa->drawX;
cy += imesa->drawY;
for (i = 0 ; i < imesa->numClipRects ; )
{
unsigned int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, imesa->numClipRects);
drm_clip_rect_t *box = imesa->pClipRects;
drm_clip_rect_t *b = (drm_clip_rect_t *)imesa->sarea->boxes;
int n = 0;
if (cw != dPriv->w || ch != dPriv->h) {
/* clear sub region */
for ( ; i < nr ; i++) {
GLint x = box[i].x1;
GLint y = box[i].y1;
GLint w = box[i].x2 - x;
GLint h = box[i].y2 - y;
if (x < cx) w -= cx - x, x = cx;
if (y < cy) h -= cy - y, y = cy;
if (x + w > cx + cw) w = cx + cw - x;
if (y + h > cy + ch) h = cy + ch - y;
if (w <= 0) continue;
if (h <= 0) continue;
b->x1 = x;
b->y1 = y;
b->x2 = x + w;
b->y2 = y + h;
b++;
n++;
}
} else {
/* clear whole buffer */
for ( ; i < nr ; i++) {
*b++ = box[i];
n++;
}
}
imesa->sarea->nbox = n;
drmCommandWrite(imesa->driFd, DRM_I810_CLEAR,
&clear, sizeof(drmI810Clear));
}
UNLOCK_HARDWARE( imesa );
imesa->upload_cliprects = GL_TRUE;
}
if (mask)
_swrast_Clear( ctx, mask );
}
/*
* Copy the back buffer to the front buffer.
*/
void i810CopyBuffer( const __DRIdrawable *dPriv )
{
i810ContextPtr imesa;
drm_clip_rect_t *pbox;
int nbox, i, tmp;
assert(dPriv);
assert(dPriv->driContextPriv);
assert(dPriv->driContextPriv->driverPrivate);
imesa = (i810ContextPtr) dPriv->driContextPriv->driverPrivate;
I810_FIREVERTICES( imesa );
LOCK_HARDWARE( imesa );
pbox = (drm_clip_rect_t *)dPriv->pClipRects;
nbox = dPriv->numClipRects;
for (i = 0 ; i < nbox ; )
{
int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
drm_clip_rect_t *b = (drm_clip_rect_t *)imesa->sarea->boxes;
imesa->sarea->nbox = nr - i;
for ( ; i < nr ; i++)
*b++ = pbox[i];
drmCommandNone(imesa->driFd, DRM_I810_SWAP);
}
tmp = GET_ENQUEUE_AGE(imesa);
UNLOCK_HARDWARE( imesa );
/* multiarb will suck the life out of the server without this throttle:
*/
if (GET_DISPATCH_AGE(imesa) < imesa->lastSwap) {
i810WaitAge(imesa, imesa->lastSwap);
}
imesa->lastSwap = tmp;
imesa->upload_cliprects = GL_TRUE;
}
/*
* XXX implement when full-screen extension is done.
*/
void i810PageFlip( const __DRIdrawable *dPriv )
{
i810ContextPtr imesa;
int tmp, ret;
assert(dPriv);
assert(dPriv->driContextPriv);
assert(dPriv->driContextPriv->driverPrivate);
imesa = (i810ContextPtr) dPriv->driContextPriv->driverPrivate;
I810_FIREVERTICES( imesa );
LOCK_HARDWARE( imesa );
if (dPriv->pClipRects) {
memcpy(&(imesa->sarea->boxes[0]), &(dPriv->pClipRects[0]),
sizeof(drm_clip_rect_t));
imesa->sarea->nbox = 1;
}
ret = drmCommandNone(imesa->driFd, DRM_I810_FLIP);
if (ret) {
fprintf(stderr, "%s: %d\n", __FUNCTION__, ret);
UNLOCK_HARDWARE( imesa );
exit(1);
}
tmp = GET_ENQUEUE_AGE(imesa);
UNLOCK_HARDWARE( imesa );
/* multiarb will suck the life out of the server without this throttle:
*/
if (GET_DISPATCH_AGE(imesa) < imesa->lastSwap) {
i810WaitAge(imesa, imesa->lastSwap);
}
/* i810SetDrawBuffer( imesa->glCtx, imesa->glCtx->Color.DriverDrawBuffer );*/
i810DrawBuffer( imesa->glCtx, imesa->glCtx->Color.DrawBuffer[0] );
imesa->upload_cliprects = GL_TRUE;
imesa->lastSwap = tmp;
return;
}
/* This waits for *everybody* to finish rendering -- overkill.
*/
void i810DmaFinish( i810ContextPtr imesa )
{
I810_FIREVERTICES( imesa );
LOCK_HARDWARE( imesa );
i810RegetLockQuiescent( imesa );
UNLOCK_HARDWARE( imesa );
}
void i810RegetLockQuiescent( i810ContextPtr imesa )
{
drmUnlock(imesa->driFd, imesa->hHWContext);
i810GetLock( imesa, DRM_LOCK_QUIESCENT );
}
void i810WaitAgeLocked( i810ContextPtr imesa, int age )
{
int i = 0, j;
while (++i < 5000) {
drmCommandNone(imesa->driFd, DRM_I810_GETAGE);
if (GET_DISPATCH_AGE(imesa) >= age)
return;
for (j = 0 ; j < 1000 ; j++)
;
}
drmCommandNone(imesa->driFd, DRM_I810_FLUSH);
}
void i810WaitAge( i810ContextPtr imesa, int age )
{
int i = 0, j;
while (++i < 5000) {
drmCommandNone(imesa->driFd, DRM_I810_GETAGE);
if (GET_DISPATCH_AGE(imesa) >= age)
return;
for (j = 0 ; j < 1000 ; j++)
;
}
i = 0;
while (++i < 1000) {
drmCommandNone(imesa->driFd, DRM_I810_GETAGE);
if (GET_DISPATCH_AGE(imesa) >= age)
return;
usleep(1000);
}
LOCK_HARDWARE(imesa);
drmCommandNone(imesa->driFd, DRM_I810_FLUSH);
UNLOCK_HARDWARE(imesa);
}
static int intersect_rect( drm_clip_rect_t *out,
drm_clip_rect_t *a,
drm_clip_rect_t *b )
{
*out = *a;
if (b->x1 > out->x1) out->x1 = b->x1;
if (b->x2 < out->x2) out->x2 = b->x2;
if (out->x1 >= out->x2) return 0;
if (b->y1 > out->y1) out->y1 = b->y1;
if (b->y2 < out->y2) out->y2 = b->y2;
if (out->y1 >= out->y2) return 0;
return 1;
}
static void emit_state( i810ContextPtr imesa )
{
GLuint dirty = imesa->dirty;
I810SAREAPtr sarea = imesa->sarea;
if (dirty & I810_UPLOAD_BUFFERS) {
memcpy( sarea->BufferState, imesa->BufferSetup,
sizeof(imesa->BufferSetup) );
}
if (dirty & I810_UPLOAD_CTX) {
memcpy( sarea->ContextState, imesa->Setup,
sizeof(imesa->Setup) );
}
if (dirty & I810_UPLOAD_TEX0) {
memcpy(sarea->TexState[0],
imesa->CurrentTexObj[0]->Setup,
sizeof(imesa->CurrentTexObj[0]->Setup));
}
if (dirty & I810_UPLOAD_TEX1) {
GLuint *setup = sarea->TexState[1];
memcpy( setup,
imesa->CurrentTexObj[1]->Setup,
sizeof(imesa->CurrentTexObj[1]->Setup));
/* Need this for the case where both units are bound to the same
* texobj.
*/
setup[I810_TEXREG_MI1] ^= (MI1_MAP_0 ^ MI1_MAP_1);
setup[I810_TEXREG_MLC] ^= (MLC_MAP_0 ^ MLC_MAP_1);
setup[I810_TEXREG_MLL] ^= (MLL_MAP_0 ^ MLL_MAP_1);
setup[I810_TEXREG_MCS] ^= (MCS_COORD_0 ^ MCS_COORD_1);
setup[I810_TEXREG_MF] ^= (MF_MAP_0 ^ MF_MAP_1);
}
sarea->dirty = dirty;
imesa->dirty = 0;
}
static void age_imesa( i810ContextPtr imesa, int age )
{
if (imesa->CurrentTexObj[0]) imesa->CurrentTexObj[0]->base.timestamp = age;
if (imesa->CurrentTexObj[1]) imesa->CurrentTexObj[1]->base.timestamp = age;
}
void i810FlushPrimsLocked( i810ContextPtr imesa )
{
drm_clip_rect_t *pbox = imesa->pClipRects;
int nbox = imesa->numClipRects;
drmBufPtr buffer = imesa->vertex_buffer;
I810SAREAPtr sarea = imesa->sarea;
drmI810Vertex vertex;
int i;
if (I810_DEBUG & DEBUG_STATE)
i810PrintDirty( __FUNCTION__, imesa->dirty );
if (imesa->dirty)
emit_state( imesa );
vertex.idx = buffer->idx;
vertex.used = imesa->vertex_low;
vertex.discard = 0;
sarea->vertex_prim = imesa->hw_primitive;
if (!nbox) {
vertex.used = 0;
}
else if (nbox > I810_NR_SAREA_CLIPRECTS) {
imesa->upload_cliprects = GL_TRUE;
}
if (!nbox || !imesa->upload_cliprects)
{
if (nbox == 1)
sarea->nbox = 0;
else
sarea->nbox = nbox;
vertex.discard = 1;
drmCommandWrite(imesa->driFd, DRM_I810_VERTEX,
&vertex, sizeof(drmI810Vertex));
age_imesa(imesa, sarea->last_enqueue);
}
else
{
for (i = 0 ; i < nbox ; )
{
int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, nbox);
drm_clip_rect_t *b = (drm_clip_rect_t *)sarea->boxes;
if (imesa->scissor) {
sarea->nbox = 0;
for ( ; i < nr ; i++) {
b->x1 = pbox[i].x1 - imesa->drawX;
b->y1 = pbox[i].y1 - imesa->drawY;
b->x2 = pbox[i].x2 - imesa->drawX;
b->y2 = pbox[i].y2 - imesa->drawY;
if (intersect_rect(b, b, &imesa->scissor_rect)) {
sarea->nbox++;
b++;
}
}
/* Culled?
*/
if (!sarea->nbox) {
if (nr < nbox) continue;
vertex.used = 0;
}
} else {
sarea->nbox = nr - i;
for ( ; i < nr ; i++, b++) {
b->x1 = pbox[i].x1 - imesa->drawX;
b->y1 = pbox[i].y1 - imesa->drawY;
b->x2 = pbox[i].x2 - imesa->drawX;
b->y2 = pbox[i].y2 - imesa->drawY;
}
}
/* Finished with the buffer?
*/
if (nr == nbox)
vertex.discard = 1;
drmCommandWrite(imesa->driFd, DRM_I810_VERTEX,
&vertex, sizeof(drmI810Vertex));
age_imesa(imesa, imesa->sarea->last_enqueue);
}
}
/* Reset imesa vars:
*/
imesa->vertex_buffer = 0;
imesa->vertex_addr = 0;
imesa->vertex_low = 0;
imesa->vertex_high = 0;
imesa->vertex_last_prim = 0;
imesa->dirty = 0;
imesa->upload_cliprects = GL_FALSE;
}
void i810FlushPrimsGetBuffer( i810ContextPtr imesa )
{
LOCK_HARDWARE(imesa);
if (imesa->vertex_buffer)
i810FlushPrimsLocked( imesa );
imesa->vertex_buffer = i810_get_buffer_ioctl( imesa );
imesa->vertex_high = imesa->vertex_buffer->total;
imesa->vertex_addr = (char *)imesa->vertex_buffer->address;
imesa->vertex_low = 4; /* leave room for instruction header */
imesa->vertex_last_prim = imesa->vertex_low;
UNLOCK_HARDWARE(imesa);
}
void i810FlushPrims( i810ContextPtr imesa )
{
if (imesa->vertex_buffer) {
LOCK_HARDWARE( imesa );
i810FlushPrimsLocked( imesa );
UNLOCK_HARDWARE( imesa );
}
}
int i810_check_copy(int fd)
{
return(drmCommandNone(fd, DRM_I810_DOCOPY));
}
static void i810Flush( struct gl_context *ctx )
{
i810ContextPtr imesa = I810_CONTEXT( ctx );
I810_FIREVERTICES( imesa );
}
static void i810Finish( struct gl_context *ctx )
{
i810ContextPtr imesa = I810_CONTEXT( ctx );
i810DmaFinish( imesa );
}
void i810InitIoctlFuncs( struct dd_function_table *functions )
{
functions->Flush = i810Flush;
functions->Clear = i810Clear;
functions->Finish = i810Finish;
}

48
src/mesa/drivers/dri/i810/i810ioctl.h
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@ -1,48 +0,0 @@
#ifndef I810_IOCTL_H
#define I810_IOCTL_H
#include "i810context.h"
void i810EmitPrim( i810ContextPtr imesa );
void i810FlushPrims( i810ContextPtr mmesa );
void i810FlushPrimsLocked( i810ContextPtr mmesa );
void i810FlushPrimsGetBuffer( i810ContextPtr imesa );
void i810WaitAgeLocked( i810ContextPtr imesa, int age );
void i810WaitAge( i810ContextPtr imesa, int age );
void i810DmaFinish( i810ContextPtr imesa );
void i810RegetLockQuiescent( i810ContextPtr imesa );
void i810InitIoctlFuncs( struct dd_function_table *functions );
void i810CopyBuffer( const __DRIdrawable *dpriv );
void i810PageFlip( const __DRIdrawable *dpriv );
int i810_check_copy(int fd);
#define I810_STATECHANGE(imesa, flag) \
do { \
if (imesa->vertex_low != imesa->vertex_last_prim) \
i810FlushPrims(imesa); \
imesa->dirty |= flag; \
} while (0) \
#define I810_FIREVERTICES(imesa) \
do { \
if (imesa->vertex_buffer) { \
i810FlushPrims(imesa); \
} \
} while (0)
static INLINE GLuint *i810AllocDmaLow( i810ContextPtr imesa, int bytes )
{
if (imesa->vertex_low + bytes > imesa->vertex_high)
i810FlushPrimsGetBuffer( imesa );
{
GLuint *start = (GLuint *)(imesa->vertex_addr + imesa->vertex_low);
imesa->vertex_low += bytes;
return start;
}
}
#endif

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@ -1,174 +0,0 @@
/*
* Intel i810 DRI driver for Mesa 3.5
*
* Copyright (C) 1999-2000 Keith Whitwell All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL KEITH WHITWELL BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
* CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Author:
* Keith Whitwell <keith@tungstengraphics.com>
*/
/*
* Render unclipped vertex buffers by emitting vertices directly to
* dma buffers. Use strip/fan hardware acceleration where possible.
*
*/
#include "main/glheader.h"
#include "main/context.h"
#include "main/macros.h"
#include "main/imports.h"
#include "main/mtypes.h"
#include "math/m_xform.h"
#include "tnl/t_context.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810context.h"
#include "i810tris.h"
#include "i810vb.h"
#include "i810ioctl.h"
/*
* Render unclipped vertex buffers by emitting vertices directly to
* dma buffers. Use strip/fan hardware primitives where possible.
* Try to simulate missing primitives with indexed vertices.
*/
#define HAVE_POINTS 0
#define HAVE_LINES 1
#define HAVE_LINE_STRIPS 1
#define HAVE_TRIANGLES 1
#define HAVE_TRI_STRIPS 1
#define HAVE_TRI_STRIP_1 0 /* has it, template can't use it yet */
#define HAVE_TRI_FANS 1
#define HAVE_POLYGONS 1
#define HAVE_QUADS 0
#define HAVE_QUAD_STRIPS 0
#define HAVE_ELTS 0
static GLuint hw_prim[GL_POLYGON+1] = {
0,
PR_LINES,
0,
PR_LINESTRIP,
PR_TRIANGLES,
PR_TRISTRIP_0,
PR_TRIFAN,
0,
0,
PR_POLYGON
};
static const GLenum reduced_prim[GL_POLYGON+1] = {
GL_POINTS,
GL_LINES,
GL_LINES,
GL_LINES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES
};
#define LOCAL_VARS i810ContextPtr imesa = I810_CONTEXT(ctx)
#define INIT( prim ) do { \
I810_STATECHANGE(imesa, 0); \
i810RasterPrimitive( ctx, reduced_prim[prim], hw_prim[prim] ); \
} while (0)
#define GET_CURRENT_VB_MAX_VERTS() \
(((int)imesa->vertex_high - (int)imesa->vertex_low) / (imesa->vertex_size*4))
#define GET_SUBSEQUENT_VB_MAX_VERTS() \
(I810_DMA_BUF_SZ-4) / (imesa->vertex_size * 4)
#define ALLOC_VERTS( nr ) \
i810AllocDmaLow( imesa, (nr) * imesa->vertex_size * 4)
#define EMIT_VERTS( ctx, j, nr, buf ) \
i810_emit_contiguous_verts(ctx, j, (j)+(nr), buf)
#define FLUSH() I810_FIREVERTICES( imesa )
#define TAG(x) i810_##x
#include "tnl_dd/t_dd_dmatmp.h"
/**********************************************************************/
/* Render pipeline stage */
/**********************************************************************/
static GLboolean i810_run_render( struct gl_context *ctx,
struct tnl_pipeline_stage *stage )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
GLuint i;
/* Don't handle clipping or indexed vertices.
*/
if (imesa->RenderIndex != 0 ||
!i810_validate_render( ctx, VB )) {
return GL_TRUE;
}
imesa->SetupNewInputs = VERT_BIT_POS;
tnl->Driver.Render.Start( ctx );
for (i = 0 ; i < VB->PrimitiveCount ; i++)
{
GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
if (!length)
continue;
i810_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
prim );
}
tnl->Driver.Render.Finish( ctx );
return GL_FALSE; /* finished the pipe */
}
const struct tnl_pipeline_stage _i810_render_stage =
{
"i810 render",
NULL,
NULL,
NULL,
NULL,
i810_run_render /* run */
};

361
src/mesa/drivers/dri/i810/i810screen.c
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@ -1,361 +0,0 @@
/**************************************************************************
Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*
*/
#include "main/glheader.h"
#include "main/imports.h"
#include "main/context.h"
#include "main/framebuffer.h"
#include "main/renderbuffer.h"
#include "main/simple_list.h"
#include "utils.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810state.h"
#include "i810tex.h"
#include "i810span.h"
#include "GL/internal/dri_interface.h"
static const __DRIconfig **
i810FillInModes( __DRIscreen *psp,
unsigned pixel_bits, unsigned depth_bits,
unsigned stencil_bits, GLboolean have_back_buffer )
{
__DRIconfig **configs;
struct gl_config * m;
unsigned depth_buffer_factor;
unsigned back_buffer_factor;
unsigned i;
/* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
* enough to add support. Basically, if a context is created with an
* fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
* will never be used.
*/
static const GLenum back_buffer_modes[] = {
GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
};
uint8_t depth_bits_array[2];
uint8_t stencil_bits_array[2];
uint8_t msaa_samples_array[1];
depth_bits_array[0] = depth_bits;
depth_bits_array[1] = depth_bits;
/* Just like with the accumulation buffer, always provide some modes
* with a stencil buffer. It will be a sw fallback, but some apps won't
* care about that.
*/
stencil_bits_array[0] = 0;
stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
msaa_samples_array[0] = 0;
depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
back_buffer_factor = (have_back_buffer) ? 2 : 1;
configs = driCreateConfigs(GL_RGB, GL_UNSIGNED_SHORT_5_6_5,
depth_bits_array, stencil_bits_array,
depth_buffer_factor,
back_buffer_modes, back_buffer_factor,
msaa_samples_array, 1, GL_TRUE);
if (configs == NULL) {
fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
__func__, __LINE__ );
return NULL;
}
/* Mark the visual as slow if there are "fake" stencil bits.
*/
for (i = 0; configs[i]; i++) {
m = &configs[i]->modes;
if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
m->visualRating = GLX_SLOW_CONFIG;
}
}
return (const __DRIconfig **) configs;
}
/* static int i810_malloc_proxy_buf(drmBufMapPtr buffers) */
/* { */
/* char *buffer; */
/* drmBufPtr buf; */
/* int i; */
/* buffer = CALLOC(I810_DMA_BUF_SZ); */
/* if(buffer == NULL) return -1; */
/* for(i = 0; i < I810_DMA_BUF_NR; i++) { */
/* buf = &(buffers->list[i]); */
/* buf->address = (drmAddress)buffer; */
/* } */
/* return 0; */
/* } */
static drmBufMapPtr i810_create_empty_buffers(void)
{
drmBufMapPtr retval;
retval = (drmBufMapPtr)_mesa_align_malloc(sizeof(drmBufMap), 32);
if(retval == NULL) return NULL;
memset(retval, 0, sizeof(drmBufMap));
retval->list = (drmBufPtr)_mesa_align_malloc(sizeof(drmBuf) * I810_DMA_BUF_NR, 32);
if(retval->list == NULL) {
_mesa_align_free(retval);
return NULL;
}
memset(retval->list, 0, sizeof(drmBuf) * I810_DMA_BUF_NR);
return retval;
}
static const __DRIconfig **
i810InitScreen(__DRIscreen *sPriv)
{
static const __DRIversion ddx_expected = { 1, 0, 0 };
static const __DRIversion dri_expected = { 4, 0, 0 };
static const __DRIversion drm_expected = { 1, 2, 0 };
i810ScreenPrivate *i810Screen;
I810DRIPtr gDRIPriv = (I810DRIPtr)sPriv->pDevPriv;
if ( ! driCheckDriDdxDrmVersions2( "i810",
&sPriv->dri_version, & dri_expected,
&sPriv->ddx_version, & ddx_expected,
&sPriv->drm_version, & drm_expected ) ) {
return NULL;
}
if (sPriv->devPrivSize != sizeof(I810DRIRec)) {
fprintf(stderr,"\nERROR! sizeof(I810DRIRec) does not match passed size from device driver\n");
return GL_FALSE;
}
/* Allocate the private area */
i810Screen = (i810ScreenPrivate *)CALLOC(sizeof(i810ScreenPrivate));
if (!i810Screen) {
__driUtilMessage("i810InitDriver: alloc i810ScreenPrivate struct failed");
return GL_FALSE;
}
i810Screen->driScrnPriv = sPriv;
sPriv->private = (void *)i810Screen;
i810Screen->deviceID=gDRIPriv->deviceID;
i810Screen->width=gDRIPriv->width;
i810Screen->height=gDRIPriv->height;
i810Screen->mem=gDRIPriv->mem;
i810Screen->cpp=gDRIPriv->cpp;
i810Screen->fbStride=gDRIPriv->fbStride;
i810Screen->fbOffset=gDRIPriv->fbOffset;
if (gDRIPriv->bitsPerPixel == 15)
i810Screen->fbFormat = DV_PF_555;
else
i810Screen->fbFormat = DV_PF_565;
i810Screen->backOffset=gDRIPriv->backOffset;
i810Screen->depthOffset=gDRIPriv->depthOffset;
i810Screen->backPitch = gDRIPriv->auxPitch;
i810Screen->backPitchBits = gDRIPriv->auxPitchBits;
i810Screen->textureOffset=gDRIPriv->textureOffset;
i810Screen->textureSize=gDRIPriv->textureSize;
i810Screen->logTextureGranularity = gDRIPriv->logTextureGranularity;
i810Screen->bufs = i810_create_empty_buffers();
if (i810Screen->bufs == NULL) {
__driUtilMessage("i810InitDriver: i810_create_empty_buffers() failed");
FREE(i810Screen);
return GL_FALSE;
}
i810Screen->back.handle = gDRIPriv->backbuffer;
i810Screen->back.size = gDRIPriv->backbufferSize;
if (drmMap(sPriv->fd,
i810Screen->back.handle,
i810Screen->back.size,
(drmAddress *)&i810Screen->back.map) != 0) {
FREE(i810Screen);
sPriv->private = NULL;
__driUtilMessage("i810InitDriver: drmMap failed");
return GL_FALSE;
}
i810Screen->depth.handle = gDRIPriv->depthbuffer;
i810Screen->depth.size = gDRIPriv->depthbufferSize;
if (drmMap(sPriv->fd,
i810Screen->depth.handle,
i810Screen->depth.size,
(drmAddress *)&i810Screen->depth.map) != 0) {
drmUnmap(i810Screen->back.map, i810Screen->back.size);
FREE(i810Screen);
sPriv->private = NULL;
__driUtilMessage("i810InitDriver: drmMap (2) failed");
return GL_FALSE;
}
i810Screen->tex.handle = gDRIPriv->textures;
i810Screen->tex.size = gDRIPriv->textureSize;
if (drmMap(sPriv->fd,
i810Screen->tex.handle,
i810Screen->tex.size,
(drmAddress *)&i810Screen->tex.map) != 0) {
drmUnmap(i810Screen->back.map, i810Screen->back.size);
drmUnmap(i810Screen->depth.map, i810Screen->depth.size);
FREE(i810Screen);
sPriv->private = NULL;
__driUtilMessage("i810InitDriver: drmMap (3) failed");
return GL_FALSE;
}
i810Screen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
return i810FillInModes(sPriv, 16, 16, 0, 1);
}
static void
i810DestroyScreen(__DRIscreen *sPriv)
{
i810ScreenPrivate *i810Screen = (i810ScreenPrivate *)sPriv->private;
/* Need to unmap all the bufs and maps here:
*/
drmUnmap(i810Screen->back.map, i810Screen->back.size);
drmUnmap(i810Screen->depth.map, i810Screen->depth.size);
drmUnmap(i810Screen->tex.map, i810Screen->tex.size);
FREE(i810Screen);
sPriv->private = NULL;
}
/**
* Create a buffer which corresponds to the window.
*/
static GLboolean
i810CreateBuffer( __DRIscreen *driScrnPriv,
__DRIdrawable *driDrawPriv,
const struct gl_config *mesaVis,
GLboolean isPixmap )
{
i810ScreenPrivate *screen = (i810ScreenPrivate *) driScrnPriv->private;
if (isPixmap) {
return GL_FALSE; /* not implemented */
}
else {
struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
{
driRenderbuffer *frontRb
= driNewRenderbuffer(MESA_FORMAT_ARGB8888,
driScrnPriv->pFB,
screen->cpp,
/*screen->frontOffset*/0, screen->backPitch,
driDrawPriv);
i810SetSpanFunctions(frontRb, mesaVis);
_mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
}
if (mesaVis->doubleBufferMode) {
driRenderbuffer *backRb
= driNewRenderbuffer(MESA_FORMAT_ARGB8888,
screen->back.map,
screen->cpp,
screen->backOffset, screen->backPitch,
driDrawPriv);
i810SetSpanFunctions(backRb, mesaVis);
_mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
}
if (mesaVis->depthBits == 16) {
driRenderbuffer *depthRb
= driNewRenderbuffer(MESA_FORMAT_Z16,
screen->depth.map,
screen->cpp,
screen->depthOffset, screen->backPitch,
driDrawPriv);
i810SetSpanFunctions(depthRb, mesaVis);
_mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
}
_mesa_add_soft_renderbuffers(fb,
GL_FALSE, /* color */
GL_FALSE, /* depth */
mesaVis->stencilBits > 0,
mesaVis->accumRedBits > 0,
GL_FALSE, /* alpha */
GL_FALSE /* aux */);
driDrawPriv->driverPrivate = (void *) fb;
return (driDrawPriv->driverPrivate != NULL);
}
}
static void
i810DestroyBuffer(__DRIdrawable *driDrawPriv)
{
_mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
}
const struct __DriverAPIRec driDriverAPI = {
.InitScreen = i810InitScreen,
.DestroyScreen = i810DestroyScreen,
.CreateContext = i810CreateContext,
.DestroyContext = i810DestroyContext,
.CreateBuffer = i810CreateBuffer,
.DestroyBuffer = i810DestroyBuffer,
.SwapBuffers = i810SwapBuffers,
.MakeCurrent = i810MakeCurrent,
.UnbindContext = i810UnbindContext,
.GetSwapInfo = NULL,
.GetDrawableMSC = NULL,
.WaitForMSC = NULL,
.WaitForSBC = NULL,
.SwapBuffersMSC = NULL
};
/* This is the table of extensions that the loader will dlsym() for. */
PUBLIC const __DRIextension *__driDriverExtensions[] = {
&driCoreExtension.base,
&driLegacyExtension.base,
NULL
};

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@ -1,100 +0,0 @@
/**************************************************************************
Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*
*/
#ifndef _I810_INIT_H_
#define _I810_INIT_H_
#include <sys/time.h>
#include "dri_util.h"
typedef struct {
drm_handle_t handle;
drmSize size;
char *map;
} i810Region, *i810RegionPtr;
typedef struct {
i810Region front;
i810Region back;
i810Region depth;
i810Region tex;
int deviceID;
int width;
int height;
int mem;
int cpp; /* for front and back buffers */
int bitsPerPixel;
int fbFormat;
int fbOffset;
int fbStride;
int backOffset;
int depthOffset;
int backPitch;
int backPitchBits;
int textureOffset;
int textureSize;
int logTextureGranularity;
__DRIscreen *driScrnPriv;
drmBufMapPtr bufs;
unsigned int sarea_priv_offset;
} i810ScreenPrivate;
extern GLboolean
i810CreateContext( gl_api api,
const struct gl_config *mesaVis,
__DRIcontext *driContextPriv,
void *sharedContextPrivate );
extern void
i810DestroyContext(__DRIcontext *driContextPriv);
extern GLboolean
i810UnbindContext(__DRIcontext *driContextPriv);
extern GLboolean
i810MakeCurrent(__DRIcontext *driContextPriv,
__DRIdrawable *driDrawPriv,
__DRIdrawable *driReadPriv);
extern void
i810SwapBuffers(__DRIdrawable *driDrawPriv);
#endif

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#include "main/glheader.h"
#include "main/macros.h"
#include "main/mtypes.h"
#include "main/colormac.h"
#include "swrast/swrast.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810span.h"
#include "i810ioctl.h"
#define DBG 0
#define LOCAL_VARS \
i810ContextPtr imesa = I810_CONTEXT(ctx); \
__DRIdrawable *dPriv = imesa->driDrawable; \
driRenderbuffer *drb = (driRenderbuffer *) rb; \
GLuint pitch = drb->pitch; \
GLuint height = dPriv->h; \
GLushort p; \
char *buf = (char *)(drb->flippedData + \
dPriv->x * 2 + \
dPriv->y * pitch); \
(void) buf; (void) p
#define LOCAL_DEPTH_VARS \
i810ContextPtr imesa = I810_CONTEXT(ctx); \
__DRIdrawable *dPriv = imesa->driDrawable; \
driRenderbuffer *drb = (driRenderbuffer *) rb; \
GLuint pitch = drb->pitch; \
GLuint height = dPriv->h; \
char *buf = (char *)(drb->Base.Data + \
dPriv->x * 2 + \
dPriv->y * pitch)
#define INIT_MONO_PIXEL(p, color) \
p = PACK_COLOR_565( color[0], color[1], color[2] )
#define Y_FLIP(_y) (height - _y - 1)
#define HW_LOCK()
#define HW_UNLOCK()
/* 16 bit, 565 rgb color spanline and pixel functions
*/
#define WRITE_RGBA( _x, _y, r, g, b, a ) \
*(GLushort *)(buf + _x*2 + _y*pitch) = ( (((int)r & 0xf8) << 8) | \
(((int)g & 0xfc) << 3) | \
(((int)b & 0xf8) >> 3))
#define WRITE_PIXEL( _x, _y, p ) \
*(GLushort *)(buf + _x*2 + _y*pitch) = p
#define READ_RGBA( rgba, _x, _y ) \
do { \
GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch); \
rgba[0] = ((p >> 8) & 0xf8) * 255 / 0xf8; \
rgba[1] = ((p >> 3) & 0xfc) * 255 / 0xfc; \
rgba[2] = ((p << 3) & 0xf8) * 255 / 0xf8; \
rgba[3] = 255; \
} while(0)
#define TAG(x) i810##x##_565
#include "spantmp.h"
/* 16 bit depthbuffer functions.
*/
#define VALUE_TYPE GLushort
#define WRITE_DEPTH( _x, _y, d ) \
*(GLushort *)(buf + (_x)*2 + (_y)*pitch) = d;
#define READ_DEPTH( d, _x, _y ) \
d = *(GLushort *)(buf + (_x)*2 + (_y)*pitch);
#define TAG(x) i810##x##_z16
#include "depthtmp.h"
/* Move locking out to get reasonable span performance.
*/
void i810SpanRenderStart( struct gl_context *ctx )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
I810_FIREVERTICES(imesa);
LOCK_HARDWARE(imesa);
i810RegetLockQuiescent( imesa );
}
void i810SpanRenderFinish( struct gl_context *ctx )
{
i810ContextPtr imesa = I810_CONTEXT( ctx );
_swrast_flush( ctx );
UNLOCK_HARDWARE( imesa );
}
void i810InitSpanFuncs( struct gl_context *ctx )
{
struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
swdd->SpanRenderStart = i810SpanRenderStart;
swdd->SpanRenderFinish = i810SpanRenderFinish;
}
/**
* Plug in the Get/Put routines for the given driRenderbuffer.
*/
void
i810SetSpanFunctions(driRenderbuffer *drb, const struct gl_config *vis)
{
if (drb->Base.InternalFormat == GL_RGBA) {
/* always 565 RGB */
i810InitPointers_565(&drb->Base);
}
else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) {
i810InitDepthPointers_z16(&drb->Base);
}
else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) {
/* should never get here */
drb->Base.GetRow = NULL;
drb->Base.GetValues = NULL;
drb->Base.PutRow = NULL;
drb->Base.PutMonoRow = NULL;
drb->Base.PutValues = NULL;
drb->Base.PutMonoValues = NULL;
}
else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
drb->Base.GetRow = NULL;
drb->Base.GetValues = NULL;
drb->Base.PutRow = NULL;
drb->Base.PutMonoRow = NULL;
drb->Base.PutValues = NULL;
drb->Base.PutMonoValues = NULL;
}
}

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#ifndef _I810_SPAN_H
#define _I810_SPAN_H
#include "drirenderbuffer.h"
extern void i810InitSpanFuncs( struct gl_context *ctx );
extern void i810SpanRenderFinish( struct gl_context *ctx );
extern void i810SpanRenderStart( struct gl_context *ctx );
extern void
i810SetSpanFunctions(driRenderbuffer *rb, const struct gl_config *vis);
#endif

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src/mesa/drivers/dri/i810/i810state.c
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#ifndef _I810_STATE_H
#define _I810_STATE_H
#include "i810context.h"
extern void i810InitState( struct gl_context *ctx );
extern void i810InitStateFuncs( struct gl_context *ctx );
extern void i810PrintDirty( const char *msg, GLuint state );
extern void i810DrawBuffer(struct gl_context *ctx, GLenum mode );
extern void i810Fallback( i810ContextPtr imesa, GLuint bit, GLboolean mode );
#define FALLBACK( imesa, bit, mode ) i810Fallback( imesa, bit, mode )
#endif

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/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "main/glheader.h"
#include "main/mtypes.h"
#include "main/imports.h"
#include "main/simple_list.h"
#include "main/enums.h"
#include "main/texstore.h"
#include "main/teximage.h"
#include "main/texobj.h"
#include "main/colormac.h"
#include "main/mm.h"
#include "texmem.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810context.h"
#include "i810tex.h"
#include "i810ioctl.h"
/*
* Compute the 'S2.4' lod bias factor from the floating point OpenGL bias.
*/
static GLuint i810ComputeLodBias(GLfloat bias)
{
int b = (int) (bias * 16.0) + 12;
if (b > 63)
b = 63;
else if (b < -64)
b = -64;
return (GLuint) (b & MLC_LOD_BIAS_MASK);
}
static void i810SetTexWrapping(i810TextureObjectPtr tex,
GLenum swrap, GLenum twrap)
{
tex->Setup[I810_TEXREG_MCS] &= ~(MCS_U_STATE_MASK| MCS_V_STATE_MASK);
switch( swrap ) {
case GL_REPEAT:
tex->Setup[I810_TEXREG_MCS] |= MCS_U_WRAP;
break;
case GL_CLAMP:
case GL_CLAMP_TO_EDGE:
tex->Setup[I810_TEXREG_MCS] |= MCS_U_CLAMP;
break;
case GL_MIRRORED_REPEAT:
tex->Setup[I810_TEXREG_MCS] |= MCS_U_MIRROR;
break;
default:
_mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__);
}
switch( twrap ) {
case GL_REPEAT:
tex->Setup[I810_TEXREG_MCS] |= MCS_V_WRAP;
break;
case GL_CLAMP:
case GL_CLAMP_TO_EDGE:
tex->Setup[I810_TEXREG_MCS] |= MCS_V_CLAMP;
break;
case GL_MIRRORED_REPEAT:
tex->Setup[I810_TEXREG_MCS] |= MCS_V_MIRROR;
break;
default:
_mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
}
}
static void i810SetTexFilter(i810ContextPtr imesa,
i810TextureObjectPtr t,
GLenum minf, GLenum magf,
GLfloat bias)
{
t->Setup[I810_TEXREG_MF] &= ~(MF_MIN_MASK|
MF_MAG_MASK|
MF_MIP_MASK);
t->Setup[I810_TEXREG_MLC] &= ~(MLC_LOD_BIAS_MASK);
switch (minf) {
case GL_NEAREST:
t->Setup[I810_TEXREG_MF] |= MF_MIN_NEAREST | MF_MIP_NONE;
break;
case GL_LINEAR:
t->Setup[I810_TEXREG_MF] |= MF_MIN_LINEAR | MF_MIP_NONE;
break;
case GL_NEAREST_MIPMAP_NEAREST:
t->Setup[I810_TEXREG_MF] |= MF_MIN_NEAREST | MF_MIP_NEAREST;
if (magf == GL_LINEAR) {
/*bias -= 0.5;*/ /* this doesn't work too good */
}
break;
case GL_LINEAR_MIPMAP_NEAREST:
t->Setup[I810_TEXREG_MF] |= MF_MIN_LINEAR | MF_MIP_NEAREST;
break;
case GL_NEAREST_MIPMAP_LINEAR:
if (IS_I815(imesa))
t->Setup[I810_TEXREG_MF] |= MF_MIN_NEAREST | MF_MIP_LINEAR;
else
t->Setup[I810_TEXREG_MF] |= MF_MIN_NEAREST | MF_MIP_DITHER;
/*
if (magf == GL_LINEAR) {
bias -= 0.5;
}
*/
bias -= 0.5; /* always biasing here looks better */
break;
case GL_LINEAR_MIPMAP_LINEAR:
if (IS_I815(imesa))
t->Setup[I810_TEXREG_MF] |= MF_MIN_LINEAR | MF_MIP_LINEAR;
else
t->Setup[I810_TEXREG_MF] |= MF_MIN_LINEAR | MF_MIP_DITHER;
break;
default:
return;
}
switch (magf) {
case GL_NEAREST:
t->Setup[I810_TEXREG_MF] |= MF_MAG_NEAREST;
break;
case GL_LINEAR:
t->Setup[I810_TEXREG_MF] |= MF_MAG_LINEAR;
break;
default:
return;
}
t->Setup[I810_TEXREG_MLC] |= i810ComputeLodBias(bias);
}
static void
i810SetTexBorderColor( i810TextureObjectPtr t, const GLfloat color[4] )
{
/* Need a fallback.
*/
}
static i810TextureObjectPtr
i810AllocTexObj( struct gl_context *ctx, struct gl_texture_object *texObj )
{
i810TextureObjectPtr t;
i810ContextPtr imesa = I810_CONTEXT(ctx);
t = CALLOC_STRUCT( i810_texture_object_t );
texObj->DriverData = t;
if ( t != NULL ) {
GLfloat bias = ctx->Texture.Unit[ctx->Texture.CurrentUnit].LodBias;
/* Initialize non-image-dependent parts of the state:
*/
t->base.tObj = texObj;
t->Setup[I810_TEXREG_MI0] = GFX_OP_MAP_INFO;
t->Setup[I810_TEXREG_MI1] = MI1_MAP_0;
t->Setup[I810_TEXREG_MI2] = MI2_DIMENSIONS_ARE_LOG2;
t->Setup[I810_TEXREG_MLC] = (GFX_OP_MAP_LOD_CTL |
MLC_MAP_0 |
/*MLC_DITHER_WEIGHT_FULL |*/
MLC_DITHER_WEIGHT_12 |
MLC_UPDATE_LOD_BIAS |
0x0);
t->Setup[I810_TEXREG_MCS] = (GFX_OP_MAP_COORD_SETS |
MCS_COORD_0 |
MCS_UPDATE_NORMALIZED |
MCS_NORMALIZED_COORDS |
MCS_UPDATE_V_STATE |
MCS_V_WRAP |
MCS_UPDATE_U_STATE |
MCS_U_WRAP);
t->Setup[I810_TEXREG_MF] = (GFX_OP_MAP_FILTER |
MF_MAP_0 |
MF_UPDATE_ANISOTROPIC |
MF_UPDATE_MIP_FILTER |
MF_UPDATE_MAG_FILTER |
MF_UPDATE_MIN_FILTER);
make_empty_list( & t->base );
i810SetTexWrapping( t, texObj->Sampler.WrapS, texObj->Sampler.WrapT );
/*i830SetTexMaxAnisotropy( t, texObj->MaxAnisotropy );*/
i810SetTexFilter( imesa, t, texObj->Sampler.MinFilter, texObj->Sampler.MagFilter, bias );
i810SetTexBorderColor( t, texObj->Sampler.BorderColor.f );
}
return t;
}
static void i810TexParameter( struct gl_context *ctx, GLenum target,
struct gl_texture_object *tObj,
GLenum pname, const GLfloat *params )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
i810TextureObjectPtr t = (i810TextureObjectPtr) tObj->DriverData;
if (!t)
return;
if ( target != GL_TEXTURE_2D )
return;
/* Can't do the update now as we don't know whether to flush
* vertices or not. Setting imesa->new_state means that
* i810UpdateTextureState() will be called before any triangles are
* rendered. If a statechange has occurred, it will be detected at
* that point, and buffered vertices flushed.
*/
switch (pname) {
case GL_TEXTURE_MIN_FILTER:
case GL_TEXTURE_MAG_FILTER:
{
GLfloat bias = ctx->Texture.Unit[ctx->Texture.CurrentUnit].LodBias;
i810SetTexFilter( imesa, t, tObj->Sampler.MinFilter, tObj->Sampler.MagFilter, bias );
}
break;
case GL_TEXTURE_WRAP_S:
case GL_TEXTURE_WRAP_T:
i810SetTexWrapping( t, tObj->Sampler.WrapS, tObj->Sampler.WrapT );
break;
case GL_TEXTURE_BORDER_COLOR:
i810SetTexBorderColor( t, tObj->Sampler.BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
case GL_TEXTURE_MAX_LEVEL:
case GL_TEXTURE_MIN_LOD:
case GL_TEXTURE_MAX_LOD:
/* This isn't the most efficient solution but there doesn't appear to
* be a nice alternative for Radeon. Since there's no LOD clamping,
* we just have to rely on loading the right subset of mipmap levels
* to simulate a clamped LOD.
*/
I810_FIREVERTICES( I810_CONTEXT(ctx) );
driSwapOutTextureObject( (driTextureObject *) t );
break;
default:
return;
}
if (t == imesa->CurrentTexObj[0]) {
I810_STATECHANGE( imesa, I810_UPLOAD_TEX0 );
}
if (t == imesa->CurrentTexObj[1]) {
I810_STATECHANGE( imesa, I810_UPLOAD_TEX1 );
}
}
/**
* Setup hardware bits for new texture environment settings.
*
* \todo
* Determine whether or not \c param can be used instead of
* \c texUnit->EnvColor in the \c GL_TEXTURE_ENV_COLOR case.
*/
static void i810TexEnv( struct gl_context *ctx, GLenum target,
GLenum pname, const GLfloat *param )
{
i810ContextPtr imesa = I810_CONTEXT( ctx );
const GLuint unit = ctx->Texture.CurrentUnit;
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
/* Only one env color. Need a fallback if env colors are different
* and texture setup references env color in both units.
*/
switch (pname) {
case GL_TEXTURE_ENV_COLOR: {
GLubyte c[4];
GLuint envColor;
UNCLAMPED_FLOAT_TO_RGBA_CHAN( c, texUnit->EnvColor );
envColor = PACK_COLOR_8888( c[3], c[0], c[1], c[2] );
if (imesa->Setup[I810_CTXREG_CF1] != envColor) {
I810_STATECHANGE(imesa, I810_UPLOAD_CTX);
imesa->Setup[I810_CTXREG_CF1] = envColor;
}
break;
}
case GL_TEXTURE_ENV_MODE:
imesa->TexEnvImageFmt[unit] = 0; /* force recalc of env state */
break;
case GL_TEXTURE_LOD_BIAS: {
if ( texUnit->_Current != NULL ) {
const struct gl_texture_object *tObj = texUnit->_Current;
i810TextureObjectPtr t = (i810TextureObjectPtr) tObj->DriverData;
t->Setup[I810_TEXREG_MLC] &= ~(MLC_LOD_BIAS_MASK);
t->Setup[I810_TEXREG_MLC] |= i810ComputeLodBias(*param);
}
break;
}
default:
break;
}
}
#if 0
static void i810TexImage1D( struct gl_context *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint border,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *pack,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
i810TextureObjectPtr t = (i810TextureObjectPtr) texObj->DriverData;
if (t) {
i810SwapOutTexObj( imesa, t );
}
}
static void i810TexSubImage1D( struct gl_context *ctx,
GLenum target,
GLint level,
GLint xoffset,
GLsizei width,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *pack,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
}
#endif
static void i810TexImage2D( struct gl_context *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint border,
GLenum format, GLenum type, const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject *t = (driTextureObject *) texObj->DriverData;
if (t) {
I810_FIREVERTICES( I810_CONTEXT(ctx) );
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) i810AllocTexObj( ctx, texObj );
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage2D");
return;
}
}
_mesa_store_teximage2d( ctx, target, level, internalFormat,
width, height, border, format, type,
pixels, packing, texObj, texImage );
}
static void i810TexSubImage2D( struct gl_context *ctx,
GLenum target,
GLint level,
GLint xoffset, GLint yoffset,
GLsizei width, GLsizei height,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject *t = (driTextureObject *)texObj->DriverData;
if (t) {
I810_FIREVERTICES( I810_CONTEXT(ctx) );
driSwapOutTextureObject( t );
}
_mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
height, format, type, pixels, packing, texObj,
texImage);
}
static void i810BindTexture( struct gl_context *ctx, GLenum target,
struct gl_texture_object *tObj )
{
assert( (target != GL_TEXTURE_2D) || (tObj->DriverData != NULL) );
}
static void i810DeleteTexture( struct gl_context *ctx, struct gl_texture_object *tObj )
{
driTextureObject * t = (driTextureObject *) tObj->DriverData;
if (t) {
i810ContextPtr imesa = I810_CONTEXT( ctx );
if (imesa)
I810_FIREVERTICES( imesa );
driDestroyTextureObject( t );
}
/* Free mipmap images and the texture object itself */
_mesa_delete_texture_object(ctx, tObj);
}
/**
* Choose a Mesa texture format to match the requested format.
*
* The i810 only supports 5 texture modes that are useful to Mesa. That
* makes this routine pretty simple.
*/
static gl_format
i810ChooseTextureFormat( struct gl_context *ctx, GLint internalFormat,
GLenum format, GLenum type )
{
switch ( internalFormat ) {
case 4:
case GL_RGBA:
case GL_RGBA2:
case GL_RGBA4:
case GL_RGB5_A1:
case GL_RGBA8:
case GL_RGB10_A2:
case GL_RGBA12:
case GL_RGBA16:
case GL_COMPRESSED_RGBA:
if ( ((format == GL_BGRA) && (type == GL_UNSIGNED_SHORT_1_5_5_5_REV))
|| ((format == GL_RGBA) && (type == GL_UNSIGNED_SHORT_5_5_5_1))
|| (internalFormat == GL_RGB5_A1) ) {
return MESA_FORMAT_ARGB1555;
}
return MESA_FORMAT_ARGB4444;
case 3:
case GL_RGB:
case GL_COMPRESSED_RGB:
case GL_R3_G3_B2:
case GL_RGB4:
case GL_RGB5:
case GL_RGB8:
case GL_RGB10:
case GL_RGB12:
case GL_RGB16:
return MESA_FORMAT_RGB565;
case GL_ALPHA:
case GL_ALPHA4:
case GL_ALPHA8:
case GL_ALPHA12:
case GL_ALPHA16:
case GL_COMPRESSED_ALPHA:
case 1:
case GL_LUMINANCE:
case GL_LUMINANCE4:
case GL_LUMINANCE8:
case GL_LUMINANCE12:
case GL_LUMINANCE16:
case GL_COMPRESSED_LUMINANCE:
case 2:
case GL_LUMINANCE_ALPHA:
case GL_LUMINANCE4_ALPHA4:
case GL_LUMINANCE6_ALPHA2:
case GL_LUMINANCE8_ALPHA8:
case GL_LUMINANCE12_ALPHA4:
case GL_LUMINANCE12_ALPHA12:
case GL_LUMINANCE16_ALPHA16:
case GL_COMPRESSED_LUMINANCE_ALPHA:
case GL_INTENSITY:
case GL_INTENSITY4:
case GL_INTENSITY8:
case GL_INTENSITY12:
case GL_INTENSITY16:
case GL_COMPRESSED_INTENSITY:
return MESA_FORMAT_AL88;
case GL_YCBCR_MESA:
if (type == GL_UNSIGNED_SHORT_8_8_MESA ||
type == GL_UNSIGNED_BYTE)
return MESA_FORMAT_YCBCR;
else
return MESA_FORMAT_YCBCR_REV;
default:
fprintf(stderr, "unexpected texture format in %s\n", __FUNCTION__);
return MESA_FORMAT_NONE;
}
return MESA_FORMAT_NONE; /* never get here */
}
/**
* Allocate a new texture object.
* Called via ctx->Driver.NewTextureObject.
* Note: this function will be called during context creation to
* allocate the default texture objects.
* Note: we could use containment here to 'derive' the driver-specific
* texture object from the core mesa gl_texture_object. Not done at this time.
*/
static struct gl_texture_object *
i810NewTextureObject( struct gl_context *ctx, GLuint name, GLenum target )
{
struct gl_texture_object *obj;
obj = _mesa_new_texture_object(ctx, name, target);
i810AllocTexObj( ctx, obj );
return obj;
}
void i810InitTextureFuncs( struct dd_function_table *functions )
{
functions->ChooseTextureFormat = i810ChooseTextureFormat;
functions->TexImage2D = i810TexImage2D;
functions->TexSubImage2D = i810TexSubImage2D;
functions->BindTexture = i810BindTexture;
functions->NewTextureObject = i810NewTextureObject;
functions->DeleteTexture = i810DeleteTexture;
functions->TexParameter = i810TexParameter;
functions->TexEnv = i810TexEnv;
functions->IsTextureResident = driIsTextureResident;
}

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src/mesa/drivers/dri/i810/i810tex.h
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/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
*/
#ifndef I810TEX_INC
#define I810TEX_INC
#include "main/mtypes.h"
#include "main/mm.h"
#include "i810_3d_reg.h"
#include "texmem.h"
#define I810_TEX_MAXLEVELS 11
/* For shared texture space managment, these texture objects may also
* be used as proxies for regions of texture memory containing other
* client's textures. Such proxy textures (not to be confused with GL
* proxy textures) are subject to the same LRU aging we use for our
* own private textures, and thus we have a mechanism where we can
* fairly decide between kicking out our own textures and those of
* other clients.
*
* Non-local texture objects have a valid MemBlock to describe the
* region managed by the other client, and can be identified by
* 't->globj == 0'
*/
struct i810_texture_object_t {
driTextureObject base;
int Pitch;
int Height;
int texelBytes;
char *BufAddr;
GLuint max_level;
struct {
const struct gl_texture_image *image;
int offset; /* into BufAddr */
int height;
int internalFormat;
} image[I810_TEX_MAXLEVELS];
GLuint Setup[I810_TEX_SETUP_SIZE];
GLuint dirty;
};
void i810UpdateTextureState( struct gl_context *ctx );
void i810InitTextureFuncs( struct dd_function_table *functions );
void i810DestroyTexObj( i810ContextPtr imesa, i810TextureObjectPtr t );
int i810UploadTexImagesLocked( i810ContextPtr imesa, i810TextureObjectPtr t );
#endif

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/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
* Texmem interface changes (C) 2003 Dave Airlie
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "main/glheader.h"
#include "main/macros.h"
#include "main/mtypes.h"
#include "main/simple_list.h"
#include "main/enums.h"
#include "main/colormac.h"
#include "main/mm.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810context.h"
#include "i810tex.h"
#include "i810ioctl.h"
void i810DestroyTexObj(i810ContextPtr imesa, i810TextureObjectPtr t)
{
/* See if it was the driver's current object.
*/
if ( imesa != NULL ) {
if (imesa->CurrentTexObj[0] == t) {
imesa->CurrentTexObj[0] = 0;
imesa->dirty &= ~I810_UPLOAD_TEX0;
}
if (imesa->CurrentTexObj[1] == t) {
imesa->CurrentTexObj[1] = 0;
imesa->dirty &= ~I810_UPLOAD_TEX1;
}
}
}
#if defined(i386) || defined(__i386__)
/* From linux kernel i386 header files, copes with odd sizes better
* than COPY_DWORDS would:
*/
static INLINE void * __memcpy(void * to, const void * from, size_t n)
{
int d0, d1, d2;
__asm__ __volatile__(
"rep ; movsl\n\t"
"testb $2,%b4\n\t"
"je 1f\n\t"
"movsw\n"
"1:\ttestb $1,%b4\n\t"
"je 2f\n\t"
"movsb\n"
"2:"
: "=&c" (d0), "=&D" (d1), "=&S" (d2)
:"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
: "memory");
return (to);
}
#else
/* Allow compilation on other architectures */
#define __memcpy memcpy
#endif
/* Upload an image from mesa's internal copy.
*/
static void i810UploadTexLevel( i810ContextPtr imesa,
i810TextureObjectPtr t, int hwlevel )
{
const struct gl_texture_image *image = t->image[hwlevel].image;
int j;
GLuint texelBytes;
if (!image || !image->Data)
return;
texelBytes = _mesa_get_format_bytes(image->TexFormat);
if (image->Width * texelBytes == t->Pitch) {
GLubyte *dst = (GLubyte *)(t->BufAddr + t->image[hwlevel].offset);
GLubyte *src = (GLubyte *)image->Data;
memcpy( dst, src, t->Pitch * image->Height );
}
else {
switch (texelBytes) {
case 1:
{
GLubyte *dst = (GLubyte *)(t->BufAddr + t->image[hwlevel].offset);
GLubyte *src = (GLubyte *)image->Data;
for (j = 0 ; j < image->Height ; j++, dst += t->Pitch) {
__memcpy(dst, src, image->Width );
src += image->Width;
}
}
break;
case 2:
{
GLushort *dst = (GLushort *)(t->BufAddr + t->image[hwlevel].offset);
GLushort *src = (GLushort *)image->Data;
for (j = 0 ; j < image->Height ; j++, dst += (t->Pitch/2)) {
__memcpy(dst, src, image->Width * 2 );
src += image->Width;
}
}
break;
default:
fprintf(stderr, "%s: Not supported texel size %d\n",
__FUNCTION__, texelBytes);
}
}
}
/* This is called with the lock held. May have to eject our own and/or
* other client's texture objects to make room for the upload.
*/
int i810UploadTexImagesLocked( i810ContextPtr imesa, i810TextureObjectPtr t )
{
int i;
int ofs;
int numLevels;
/* Do we need to eject LRU texture objects?
*/
if (!t->base.memBlock) {
int heap;
heap = driAllocateTexture( imesa->texture_heaps, imesa->nr_heaps,
(driTextureObject *) t);
if ( heap == -1 ) {
return -1;
}
assert(t->base.memBlock);
ofs = t->base.memBlock->ofs;
t->BufAddr = imesa->i810Screen->tex.map + ofs;
t->Setup[I810_TEXREG_MI3] = imesa->i810Screen->textureOffset + ofs;
if (t == imesa->CurrentTexObj[0])
I810_STATECHANGE(imesa, I810_UPLOAD_TEX0);
if (t == imesa->CurrentTexObj[1])
I810_STATECHANGE(imesa, I810_UPLOAD_TEX1);
/* i810UpdateTexLRU( imesa, t );*/
}
driUpdateTextureLRU( (driTextureObject *) t );
if (imesa->texture_heaps[0]->timestamp >= GET_DISPATCH_AGE(imesa))
i810WaitAgeLocked( imesa, imesa->texture_heaps[0]->timestamp );
numLevels = t->base.lastLevel - t->base.firstLevel + 1;
for (i = 0 ; i < numLevels ; i++)
if (t->base.dirty_images[0] & (1<<i))
i810UploadTexLevel( imesa, t, i );
t->base.dirty_images[0] = 0;
return 0;
}

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src/mesa/drivers/dri/i810/i810texstate.c
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/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "main/glheader.h"
#include "main/macros.h"
#include "main/mtypes.h"
#include "main/simple_list.h"
#include "main/enums.h"
#include "main/mm.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810context.h"
#include "i810tex.h"
#include "i810state.h"
#include "i810ioctl.h"
static void i810SetTexImages( i810ContextPtr imesa,
struct gl_texture_object *tObj )
{
GLuint height, width, pitch, i, textureFormat, log_pitch;
i810TextureObjectPtr t = (i810TextureObjectPtr) tObj->DriverData;
const struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel];
GLint numLevels;
GLint log2Width, log2Height;
/* fprintf(stderr, "%s\n", __FUNCTION__); */
t->texelBytes = 2;
switch (baseImage->TexFormat) {
case MESA_FORMAT_ARGB1555:
textureFormat = MI1_FMT_16BPP | MI1_PF_16BPP_ARGB1555;
break;
case MESA_FORMAT_ARGB4444:
textureFormat = MI1_FMT_16BPP | MI1_PF_16BPP_ARGB4444;
break;
case MESA_FORMAT_RGB565:
textureFormat = MI1_FMT_16BPP | MI1_PF_16BPP_RGB565;
break;
case MESA_FORMAT_AL88:
textureFormat = MI1_FMT_16BPP | MI1_PF_16BPP_AY88;
break;
case MESA_FORMAT_YCBCR:
textureFormat = MI1_FMT_422 | MI1_PF_422_YCRCB_SWAP_Y
| MI1_COLOR_CONV_ENABLE;
break;
case MESA_FORMAT_YCBCR_REV:
textureFormat = MI1_FMT_422 | MI1_PF_422_YCRCB
| MI1_COLOR_CONV_ENABLE;
break;
case MESA_FORMAT_CI8:
textureFormat = MI1_FMT_8CI | MI1_PF_8CI_ARGB4444;
t->texelBytes = 1;
break;
default:
fprintf(stderr, "i810SetTexImages: bad image->Format\n" );
return;
}
driCalculateTextureFirstLastLevel( (driTextureObject *) t );
numLevels = t->base.lastLevel - t->base.firstLevel + 1;
log2Width = tObj->Image[0][t->base.firstLevel]->WidthLog2;
log2Height = tObj->Image[0][t->base.firstLevel]->HeightLog2;
/* Figure out the amount of memory required to hold all the mipmap
* levels. Choose the smallest pitch to accomodate the largest
* mipmap:
*/
width = tObj->Image[0][t->base.firstLevel]->Width * t->texelBytes;
for (pitch = 32, log_pitch=2 ; pitch < width ; pitch *= 2 )
log_pitch++;
/* All images must be loaded at this pitch. Count the number of
* lines required:
*/
for ( height = i = 0 ; i < numLevels ; i++ ) {
t->image[i].image = tObj->Image[0][t->base.firstLevel + i];
t->image[i].offset = height * pitch;
t->image[i].internalFormat = baseImage->_BaseFormat;
height += t->image[i].image->Height;
}
t->Pitch = pitch;
t->base.totalSize = height*pitch;
t->max_level = i-1;
t->dirty = I810_UPLOAD_TEX0 | I810_UPLOAD_TEX1;
t->Setup[I810_TEXREG_MI1] = (MI1_MAP_0 | textureFormat | log_pitch);
t->Setup[I810_TEXREG_MLL] = (GFX_OP_MAP_LOD_LIMITS |
MLL_MAP_0 |
MLL_UPDATE_MAX_MIP |
MLL_UPDATE_MIN_MIP |
((numLevels - 1) << MLL_MIN_MIP_SHIFT));
LOCK_HARDWARE( imesa );
i810UploadTexImagesLocked( imesa, t );
UNLOCK_HARDWARE( imesa );
}
/* ================================================================
* Texture combine functions
*/
static void set_color_stage( unsigned color, int stage,
i810ContextPtr imesa )
{
if ( color != imesa->Setup[I810_CTXREG_MC0 + stage] ) {
I810_STATECHANGE( imesa, I810_UPLOAD_CTX );
imesa->Setup[I810_CTXREG_MC0 + stage] = color;
}
}
static void set_alpha_stage( unsigned alpha, int stage,
i810ContextPtr imesa )
{
if ( alpha != imesa->Setup[I810_CTXREG_MA0 + stage] ) {
I810_STATECHANGE( imesa, I810_UPLOAD_CTX );
imesa->Setup[I810_CTXREG_MA0 + stage] = alpha;
}
}
static const unsigned operand_modifiers[] = {
0, MC_ARG_INVERT,
MC_ARG_REPLICATE_ALPHA, MC_ARG_INVERT | MC_ARG_REPLICATE_ALPHA
};
/**
* Configure the hardware bits for the specified texture environment.
*
* Configures the hardware bits for the texture environment state for the
* specified texture unit. As combine stages are added, the values pointed
* to by \c color_stage and \c alpha_stage are incremented.
*
* \param ctx GL context pointer.
* \param unit Texture unit to be added.
* \param color_stage Next available hardware color combine stage.
* \param alpha_stage Next available hardware alpha combine stage.
*
* \returns
* If the combine mode for the specified texture unit could be added without
* requiring a software fallback, \c GL_TRUE is returned. Otherwise,
* \c GL_FALSE is returned.
*
* \todo
* If the mode is (GL_REPLACE, GL_PREVIOUS), treat it as though the texture
* stage is disabled. That is, don't emit any combine stages.
*
* \todo
* Add support for ATI_texture_env_combine3 modes. This will require using
* two combine stages.
*
* \todo
* Add support for the missing \c GL_INTERPOLATE modes. This will require
* using all three combine stages. There is a comment in the function
* describing how this might work.
*
* \todo
* If, after all the combine stages have been emitted, a texture is never
* actually used, disable the texture unit. That should save texture some
* memory bandwidth. This won't happen in this function, but this seems like
* a reasonable place to make note of it.
*/
static GLboolean
i810UpdateTexEnvCombine( struct gl_context *ctx, GLuint unit,
int * color_stage, int * alpha_stage )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
GLuint color_arg[3] = {
MC_ARG_ONE, MC_ARG_ONE, MC_ARG_ONE
};
GLuint alpha_arg[3] = {
MA_ARG_ITERATED_ALPHA, MA_ARG_ITERATED_ALPHA, MA_ARG_ITERATED_ALPHA
};
GLuint i;
GLuint color_combine, alpha_combine;
const GLuint numColorArgs = texUnit->_CurrentCombine->_NumArgsRGB;
const GLuint numAlphaArgs = texUnit->_CurrentCombine->_NumArgsA;
GLuint RGBshift = texUnit->_CurrentCombine->ScaleShiftRGB;
GLuint Ashift = texUnit->_CurrentCombine->ScaleShiftA;
if ( !texUnit->_ReallyEnabled ) {
return GL_TRUE;
}
if ((*color_stage >= 3) || (*alpha_stage >= 3)) {
return GL_FALSE;
}
/* Step 1:
* Extract the color and alpha combine function arguments.
*/
for ( i = 0 ; i < numColorArgs ; i++ ) {
unsigned op = texUnit->_CurrentCombine->OperandRGB[i] - GL_SRC_COLOR;
assert(op >= 0);
assert(op <= 3);
switch ( texUnit->_CurrentCombine->SourceRGB[i] ) {
case GL_TEXTURE0:
color_arg[i] = MC_ARG_TEX0_COLOR;
break;
case GL_TEXTURE1:
color_arg[i] = MC_ARG_TEX1_COLOR;
break;
case GL_TEXTURE:
color_arg[i] = (unit == 0)
? MC_ARG_TEX0_COLOR : MC_ARG_TEX1_COLOR;
break;
case GL_CONSTANT:
color_arg[i] = MC_ARG_COLOR_FACTOR;
break;
case GL_PRIMARY_COLOR:
color_arg[i] = MC_ARG_ITERATED_COLOR;
break;
case GL_PREVIOUS:
color_arg[i] = (unit == 0)
? MC_ARG_ITERATED_COLOR : MC_ARG_CURRENT_COLOR;
break;
case GL_ZERO:
/* Toggle the low bit of the op value. The is the 'invert' bit,
* and it acts to convert GL_ZERO+op to the equivalent GL_ONE+op.
*/
op ^= 1;
/*FALLTHROUGH*/
case GL_ONE:
color_arg[i] = MC_ARG_ONE;
break;
default:
return GL_FALSE;
}
color_arg[i] |= operand_modifiers[op];
}
for ( i = 0 ; i < numAlphaArgs ; i++ ) {
unsigned op = texUnit->_CurrentCombine->OperandA[i] - GL_SRC_ALPHA;
assert(op >= 0);
assert(op <= 1);
switch ( texUnit->_CurrentCombine->SourceA[i] ) {
case GL_TEXTURE0:
alpha_arg[i] = MA_ARG_TEX0_ALPHA;
break;
case GL_TEXTURE1:
alpha_arg[i] = MA_ARG_TEX1_ALPHA;
break;
case GL_TEXTURE:
alpha_arg[i] = (unit == 0)
? MA_ARG_TEX0_ALPHA : MA_ARG_TEX1_ALPHA;
break;
case GL_CONSTANT:
alpha_arg[i] = MA_ARG_ALPHA_FACTOR;
break;
case GL_PRIMARY_COLOR:
alpha_arg[i] = MA_ARG_ITERATED_ALPHA;
break;
case GL_PREVIOUS:
alpha_arg[i] = (unit == 0)
? MA_ARG_ITERATED_ALPHA : MA_ARG_CURRENT_ALPHA;
break;
case GL_ZERO:
/* Toggle the low bit of the op value. The is the 'invert' bit,
* and it acts to convert GL_ZERO+op to the equivalent GL_ONE+op.
*/
op ^= 1;
/*FALLTHROUGH*/
case GL_ONE:
if (i != 2) {
return GL_FALSE;
}
alpha_arg[i] = MA_ARG_ONE;
break;
default:
return GL_FALSE;
}
alpha_arg[i] |= operand_modifiers[op];
}
/* Step 2:
* Build up the color and alpha combine functions.
*/
switch ( texUnit->_CurrentCombine->ModeRGB ) {
case GL_REPLACE:
color_combine = MC_OP_ARG1;
break;
case GL_MODULATE:
color_combine = MC_OP_MODULATE + RGBshift;
RGBshift = 0;
break;
case GL_ADD:
color_combine = MC_OP_ADD;
break;
case GL_ADD_SIGNED:
color_combine = MC_OP_ADD_SIGNED;
break;
case GL_SUBTRACT:
color_combine = MC_OP_SUBTRACT;
break;
case GL_INTERPOLATE:
/* For interpolation, the i810 hardware has some limitations. It
* can't handle using the secondary or diffuse color (diffuse alpha
* is okay) for the third argument.
*
* It is possible to emulate the missing modes by using multiple
* combine stages. Unfortunately it requires all three stages to
* emulate a single interpolate stage. The (arg0*arg2) portion is
* done in stage zero and writes to MC_DEST_ACCUMULATOR. The
* (arg1*(1-arg2)) portion is done in stage 1, and the final stage is
* (MC_ARG1_ACCUMULATOR | MC_ARG2_CURRENT_COLOR | MC_OP_ADD).
*
* It can also be done without using the accumulator by rearranging
* the equation as (arg1 + (arg2 * (arg0 - arg1))). Too bad the i810
* doesn't support the MODULATE_AND_ADD mode that the i830 supports.
* If it did, the interpolate could be done in only two stages.
*/
if ( (color_arg[2] & MC_ARG_INVERT) != 0 ) {
unsigned temp = color_arg[0];
color_arg[0] = color_arg[1];
color_arg[1] = temp;
color_arg[2] &= ~MC_ARG_INVERT;
}
switch (color_arg[2]) {
case (MC_ARG_ONE):
case (MC_ARG_ONE | MC_ARG_REPLICATE_ALPHA):
color_combine = MC_OP_ARG1;
color_arg[1] = MC_ARG_ONE;
break;
case (MC_ARG_COLOR_FACTOR):
return GL_FALSE;
case (MC_ARG_COLOR_FACTOR | MC_ARG_REPLICATE_ALPHA):
color_combine = MC_OP_LIN_BLEND_ALPHA_FACTOR;
break;
case (MC_ARG_ITERATED_COLOR):
return GL_FALSE;
case (MC_ARG_ITERATED_COLOR | MC_ARG_REPLICATE_ALPHA):
color_combine = MC_OP_LIN_BLEND_ITER_ALPHA;
break;
case (MC_ARG_SPECULAR_COLOR):
case (MC_ARG_SPECULAR_COLOR | MC_ARG_REPLICATE_ALPHA):
return GL_FALSE;
case (MC_ARG_TEX0_COLOR):
color_combine = MC_OP_LIN_BLEND_TEX0_COLOR;
break;
case (MC_ARG_TEX0_COLOR | MC_ARG_REPLICATE_ALPHA):
color_combine = MC_OP_LIN_BLEND_TEX0_ALPHA;
break;
case (MC_ARG_TEX1_COLOR):
color_combine = MC_OP_LIN_BLEND_TEX1_COLOR;
break;
case (MC_ARG_TEX1_COLOR | MC_ARG_REPLICATE_ALPHA):
color_combine = MC_OP_LIN_BLEND_TEX1_ALPHA;
break;
default:
return GL_FALSE;
}
break;
default:
return GL_FALSE;
}
switch ( texUnit->_CurrentCombine->ModeA ) {
case GL_REPLACE:
alpha_combine = MA_OP_ARG1;
break;
case GL_MODULATE:
alpha_combine = MA_OP_MODULATE + Ashift;
Ashift = 0;
break;
case GL_ADD:
alpha_combine = MA_OP_ADD;
break;
case GL_ADD_SIGNED:
alpha_combine = MA_OP_ADD_SIGNED;
break;
case GL_SUBTRACT:
alpha_combine = MA_OP_SUBTRACT;
break;
case GL_INTERPOLATE:
if ( (alpha_arg[2] & MA_ARG_INVERT) != 0 ) {
unsigned temp = alpha_arg[0];
alpha_arg[0] = alpha_arg[1];
alpha_arg[1] = temp;
alpha_arg[2] &= ~MA_ARG_INVERT;
}
switch (alpha_arg[2]) {
case MA_ARG_ONE:
alpha_combine = MA_OP_ARG1;
alpha_arg[1] = MA_ARG_ITERATED_ALPHA;
break;
case MA_ARG_ALPHA_FACTOR:
alpha_combine = MA_OP_LIN_BLEND_ALPHA_FACTOR;
break;
case MA_ARG_ITERATED_ALPHA:
alpha_combine = MA_OP_LIN_BLEND_ITER_ALPHA;
break;
case MA_ARG_TEX0_ALPHA:
alpha_combine = MA_OP_LIN_BLEND_TEX0_ALPHA;
break;
case MA_ARG_TEX1_ALPHA:
alpha_combine = MA_OP_LIN_BLEND_TEX1_ALPHA;
break;
default:
return GL_FALSE;
}
break;
default:
return GL_FALSE;
}
color_combine |= GFX_OP_MAP_COLOR_STAGES | (*color_stage << MC_STAGE_SHIFT)
| MC_UPDATE_DEST | MC_DEST_CURRENT
| MC_UPDATE_ARG1 | (color_arg[0] << MC_ARG1_SHIFT)
| MC_UPDATE_ARG2 | (color_arg[1] << MC_ARG2_SHIFT)
| MC_UPDATE_OP;
alpha_combine |= GFX_OP_MAP_ALPHA_STAGES | (*alpha_stage << MA_STAGE_SHIFT)
| MA_UPDATE_ARG1 | (alpha_arg[0] << MA_ARG1_SHIFT)
| MA_UPDATE_ARG2 | (alpha_arg[1] << MA_ARG2_SHIFT)
| MA_UPDATE_OP;
set_color_stage( color_combine, *color_stage, imesa );
set_alpha_stage( alpha_combine, *alpha_stage, imesa );
(*color_stage)++;
(*alpha_stage)++;
/* Step 3:
* Apply the scale factor.
*/
/* The only operation where the i810 directly supports adding a post-
* scale factor is modulate. For all the other modes the post-scale is
* emulated by inserting and extra modulate stage. For the modulate
* case, the scaling is handled above when color_combine / alpha_combine
* are initially set.
*/
if ( RGBshift != 0 ) {
const unsigned color_scale = GFX_OP_MAP_COLOR_STAGES
| (*color_stage << MC_STAGE_SHIFT)
| MC_UPDATE_DEST | MC_DEST_CURRENT
| MC_UPDATE_ARG1 | (MC_ARG_CURRENT_COLOR << MC_ARG1_SHIFT)
| MC_UPDATE_ARG2 | (MC_ARG_ONE << MC_ARG2_SHIFT)
| MC_UPDATE_OP | (MC_OP_MODULATE + RGBshift);
if ( *color_stage >= 3 ) {
return GL_FALSE;
}
set_color_stage( color_scale, *color_stage, imesa );
(*color_stage)++;
}
if ( Ashift != 0 ) {
const unsigned alpha_scale = GFX_OP_MAP_ALPHA_STAGES
| (*alpha_stage << MA_STAGE_SHIFT)
| MA_UPDATE_ARG1 | (MA_ARG_CURRENT_ALPHA << MA_ARG1_SHIFT)
| MA_UPDATE_ARG2 | (MA_ARG_ONE << MA_ARG2_SHIFT)
| MA_UPDATE_OP | (MA_OP_MODULATE + Ashift);
if ( *alpha_stage >= 3 ) {
return GL_FALSE;
}
set_alpha_stage( alpha_scale, *alpha_stage, imesa );
(*alpha_stage)++;
}
return GL_TRUE;
}
static GLboolean enable_tex_common( struct gl_context *ctx, GLuint unit )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
struct gl_texture_object *tObj = texUnit->_Current;
i810TextureObjectPtr t = (i810TextureObjectPtr)tObj->DriverData;
if (tObj->Image[0][tObj->BaseLevel]->Border > 0) {
return GL_FALSE;
}
/* Upload teximages (not pipelined)
*/
if (t->base.dirty_images[0]) {
I810_FIREVERTICES(imesa);
i810SetTexImages( imesa, tObj );
if (!t->base.memBlock) {
return GL_FALSE;
}
}
/* Update state if this is a different texture object to last
* time.
*/
if (imesa->CurrentTexObj[unit] != t) {
I810_STATECHANGE(imesa, (I810_UPLOAD_TEX0<<unit));
imesa->CurrentTexObj[unit] = t;
t->base.bound |= (1U << unit);
/* XXX: should be locked */
driUpdateTextureLRU( (driTextureObject *) t );
}
imesa->TexEnvImageFmt[unit] = tObj->Image[0][tObj->BaseLevel]->_BaseFormat;
return GL_TRUE;
}
static GLboolean enable_tex_rect( struct gl_context *ctx, GLuint unit )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
struct gl_texture_object *tObj = texUnit->_Current;
i810TextureObjectPtr t = (i810TextureObjectPtr)tObj->DriverData;
GLint Width, Height;
Width = tObj->Image[0][t->base.firstLevel]->Width - 1;
Height = tObj->Image[0][t->base.firstLevel]->Height - 1;
I810_STATECHANGE(imesa, (I810_UPLOAD_TEX0<<unit));
t->Setup[I810_TEXREG_MCS] &= ~MCS_NORMALIZED_COORDS;
t->Setup[I810_TEXREG_MCS] |= MCS_UPDATE_NORMALIZED;
t->Setup[I810_TEXREG_MI2] = (MI2_DIMENSIONS_ARE_EXACT |
(Height << MI2_HEIGHT_SHIFT) | Width);
return GL_TRUE;
}
static GLboolean enable_tex_2d( struct gl_context *ctx, GLuint unit )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
struct gl_texture_object *tObj = texUnit->_Current;
i810TextureObjectPtr t = (i810TextureObjectPtr)tObj->DriverData;
GLint log2Width, log2Height;
log2Width = tObj->Image[0][t->base.firstLevel]->WidthLog2;
log2Height = tObj->Image[0][t->base.firstLevel]->HeightLog2;
I810_STATECHANGE(imesa, (I810_UPLOAD_TEX0<<unit));
t->Setup[I810_TEXREG_MCS] |= MCS_NORMALIZED_COORDS | MCS_UPDATE_NORMALIZED;
t->Setup[I810_TEXREG_MI2] = (MI2_DIMENSIONS_ARE_LOG2 |
(log2Height << MI2_HEIGHT_SHIFT) | log2Width);
return GL_TRUE;
}
static void disable_tex( struct gl_context *ctx, GLuint unit )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
imesa->CurrentTexObj[unit] = 0;
imesa->TexEnvImageFmt[unit] = 0;
imesa->dirty &= ~(I810_UPLOAD_TEX0<<unit);
}
/**
* Update hardware state for a texture unit.
*
* \todo
* 1D textures should be supported! Just use a 2D texture with the second
* texture coordinate value fixed at 0.0.
*/
static void i810UpdateTexUnit( struct gl_context *ctx, GLuint unit,
int * next_color_stage, int * next_alpha_stage )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
GLboolean ret;
switch(texUnit->_ReallyEnabled) {
case TEXTURE_2D_BIT:
ret = enable_tex_common( ctx, unit);
ret &= enable_tex_2d(ctx, unit);
if (ret == GL_FALSE) {
FALLBACK( imesa, I810_FALLBACK_TEXTURE, GL_TRUE );
}
break;
case TEXTURE_RECT_BIT:
ret = enable_tex_common( ctx, unit);
ret &= enable_tex_rect(ctx, unit);
if (ret == GL_FALSE) {
FALLBACK( imesa, I810_FALLBACK_TEXTURE, GL_TRUE );
}
break;
case 0:
disable_tex(ctx, unit);
break;
}
if (!i810UpdateTexEnvCombine( ctx, unit,
next_color_stage, next_alpha_stage )) {
FALLBACK( imesa, I810_FALLBACK_TEXTURE, GL_TRUE );
}
return;
}
void i810UpdateTextureState( struct gl_context *ctx )
{
static const unsigned color_pass[3] = {
GFX_OP_MAP_COLOR_STAGES | MC_STAGE_0 | MC_UPDATE_DEST | MC_DEST_CURRENT
| MC_UPDATE_ARG1 | (MC_ARG_ITERATED_COLOR << MC_ARG1_SHIFT)
| MC_UPDATE_ARG2 | (MC_ARG_ONE << MC_ARG2_SHIFT)
| MC_UPDATE_OP | MC_OP_ARG1,
GFX_OP_MAP_COLOR_STAGES | MC_STAGE_1 | MC_UPDATE_DEST | MC_DEST_CURRENT
| MC_UPDATE_ARG1 | (MC_ARG_CURRENT_COLOR << MC_ARG1_SHIFT)
| MC_UPDATE_ARG2 | (MC_ARG_ONE << MC_ARG2_SHIFT)
| MC_UPDATE_OP | MC_OP_ARG1,
GFX_OP_MAP_COLOR_STAGES | MC_STAGE_2 | MC_UPDATE_DEST | MC_DEST_CURRENT
| MC_UPDATE_ARG1 | (MC_ARG_CURRENT_COLOR << MC_ARG1_SHIFT)
| MC_UPDATE_ARG2 | (MC_ARG_ONE << MC_ARG2_SHIFT)
| MC_UPDATE_OP | MC_OP_ARG1
};
static const unsigned alpha_pass[3] = {
GFX_OP_MAP_ALPHA_STAGES | MA_STAGE_0
| MA_UPDATE_ARG1 | (MA_ARG_ITERATED_ALPHA << MA_ARG1_SHIFT)
| MA_UPDATE_ARG2 | (MA_ARG_ITERATED_ALPHA << MA_ARG2_SHIFT)
| MA_UPDATE_OP | MA_OP_ARG1,
GFX_OP_MAP_ALPHA_STAGES | MA_STAGE_1
| MA_UPDATE_ARG1 | (MA_ARG_CURRENT_ALPHA << MA_ARG1_SHIFT)
| MA_UPDATE_ARG2 | (MA_ARG_CURRENT_ALPHA << MA_ARG2_SHIFT)
| MA_UPDATE_OP | MA_OP_ARG1,
GFX_OP_MAP_ALPHA_STAGES | MA_STAGE_2
| MA_UPDATE_ARG1 | (MA_ARG_CURRENT_ALPHA << MA_ARG1_SHIFT)
| MA_UPDATE_ARG2 | (MA_ARG_CURRENT_ALPHA << MA_ARG2_SHIFT)
| MA_UPDATE_OP | MA_OP_ARG1
};
i810ContextPtr imesa = I810_CONTEXT(ctx);
int next_color_stage = 0;
int next_alpha_stage = 0;
/* fprintf(stderr, "%s\n", __FUNCTION__); */
FALLBACK( imesa, I810_FALLBACK_TEXTURE, GL_FALSE );
i810UpdateTexUnit( ctx, 0, & next_color_stage, & next_alpha_stage );
i810UpdateTexUnit( ctx, 1, & next_color_stage, & next_alpha_stage );
/* There needs to be at least one combine stage emitted that just moves
* the incoming primary color to the current color register. In addition,
* there number be the same number of color and alpha stages emitted.
* Finally, if there are less than 3 combine stages, a MC_OP_DISABLE stage
* must be emitted.
*/
while ( (next_color_stage == 0) ||
(next_color_stage < next_alpha_stage) ) {
set_color_stage( color_pass[ next_color_stage ], next_color_stage,
imesa );
next_color_stage++;
}
assert( next_color_stage <= 3 );
while ( next_alpha_stage < next_color_stage ) {
set_alpha_stage( alpha_pass[ next_alpha_stage ], next_alpha_stage,
imesa );
next_alpha_stage++;
}
assert( next_alpha_stage <= 3 );
assert( next_color_stage == next_alpha_stage );
if ( next_color_stage < 3 ) {
const unsigned color = GFX_OP_MAP_COLOR_STAGES
| (next_color_stage << MC_STAGE_SHIFT)
| MC_UPDATE_DEST | MC_DEST_CURRENT
| MC_UPDATE_ARG1 | (MC_ARG_ONE << MC_ARG1_SHIFT)
| MC_UPDATE_ARG2 | (MC_ARG_ONE << MC_ARG2_SHIFT)
| MC_UPDATE_OP | (MC_OP_DISABLE);
const unsigned alpha = GFX_OP_MAP_ALPHA_STAGES
| (next_color_stage << MC_STAGE_SHIFT)
| MA_UPDATE_ARG1 | (MA_ARG_CURRENT_ALPHA << MA_ARG1_SHIFT)
| MA_UPDATE_ARG2 | (MA_ARG_CURRENT_ALPHA << MA_ARG2_SHIFT)
| MA_UPDATE_OP | (MA_OP_ARG1);
set_color_stage( color, next_color_stage, imesa );
set_alpha_stage( alpha, next_alpha_stage, imesa );
}
}

872
src/mesa/drivers/dri/i810/i810tris.c
View File

@ -1,872 +0,0 @@
/**************************************************************************
Copyright 2001 VA Linux Systems Inc., Fremont, California.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#include "main/glheader.h"
#include "main/mtypes.h"
#include "main/macros.h"
#include "main/enums.h"
#include "main/colormac.h"
#include "swrast/swrast.h"
#include "swrast_setup/swrast_setup.h"
#include "tnl/t_context.h"
#include "tnl/t_pipeline.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810tris.h"
#include "i810state.h"
#include "i810vb.h"
#include "i810ioctl.h"
static void i810RenderPrimitive( struct gl_context *ctx, GLenum prim );
/***********************************************************************
* Emit primitives as inline vertices *
***********************************************************************/
#if defined(USE_X86_ASM)
#define COPY_DWORDS( j, vb, vertsize, v ) \
do { \
int __tmp; \
__asm__ __volatile__( "rep ; movsl" \
: "=%c" (j), "=D" (vb), "=S" (__tmp) \
: "0" (vertsize), \
"D" ((long)vb), \
"S" ((long)v) ); \
} while (0)
#else
#define COPY_DWORDS( j, vb, vertsize, v ) \
do { \
for ( j = 0 ; j < vertsize ; j++ ) \
vb[j] = ((GLuint *)v)[j]; \
vb += vertsize; \
} while (0)
#endif
static INLINE void i810_draw_triangle( i810ContextPtr imesa,
i810VertexPtr v0,
i810VertexPtr v1,
i810VertexPtr v2 )
{
GLuint vertsize = imesa->vertex_size;
GLuint *vb = i810AllocDmaLow( imesa, 3 * 4 * vertsize );
int j;
COPY_DWORDS( j, vb, vertsize, v0 );
COPY_DWORDS( j, vb, vertsize, v1 );
COPY_DWORDS( j, vb, vertsize, v2 );
}
static INLINE void i810_draw_quad( i810ContextPtr imesa,
i810VertexPtr v0,
i810VertexPtr v1,
i810VertexPtr v2,
i810VertexPtr v3 )
{
GLuint vertsize = imesa->vertex_size;
GLuint *vb = i810AllocDmaLow( imesa, 6 * 4 * vertsize );
int j;
COPY_DWORDS( j, vb, vertsize, v0 );
COPY_DWORDS( j, vb, vertsize, v1 );
COPY_DWORDS( j, vb, vertsize, v3 );
COPY_DWORDS( j, vb, vertsize, v1 );
COPY_DWORDS( j, vb, vertsize, v2 );
COPY_DWORDS( j, vb, vertsize, v3 );
}
static INLINE void i810_draw_point( i810ContextPtr imesa,
i810VertexPtr tmp )
{
GLfloat sz = 0.5 * CLAMP(imesa->glCtx->Point.Size,
imesa->glCtx->Const.MinPointSize,
imesa->glCtx->Const.MaxPointSize);
int vertsize = imesa->vertex_size;
GLuint *vb = i810AllocDmaLow( imesa, 2 * 4 * vertsize );
int j;
/* Draw a point as a horizontal line.
*/
*(float *)&vb[0] = tmp->v.x - sz + 0.125;
for (j = 1 ; j < vertsize ; j++)
vb[j] = tmp->ui[j];
vb += vertsize;
*(float *)&vb[0] = tmp->v.x + sz + 0.125;
for (j = 1 ; j < vertsize ; j++)
vb[j] = tmp->ui[j];
vb += vertsize;
}
static INLINE void i810_draw_line( i810ContextPtr imesa,
i810VertexPtr v0,
i810VertexPtr v1 )
{
GLuint vertsize = imesa->vertex_size;
GLuint *vb = i810AllocDmaLow( imesa, 2 * 4 * vertsize );
int j;
COPY_DWORDS( j, vb, vertsize, v0 );
COPY_DWORDS( j, vb, vertsize, v1 );
}
/***********************************************************************
* Macros for t_dd_tritmp.h to draw basic primitives *
***********************************************************************/
#define TRI( a, b, c ) \
do { \
if (0) fprintf(stderr, "hw TRI\n"); \
if (DO_FALLBACK) \
imesa->draw_tri( imesa, a, b, c ); \
else \
i810_draw_triangle( imesa, a, b, c ); \
} while (0)
#define QUAD( a, b, c, d ) \
do { \
if (0) fprintf(stderr, "hw QUAD\n"); \
if (DO_FALLBACK) { \
imesa->draw_tri( imesa, a, b, d ); \
imesa->draw_tri( imesa, b, c, d ); \
} else \
i810_draw_quad( imesa, a, b, c, d ); \
} while (0)
#define LINE( v0, v1 ) \
do { \
if (0) fprintf(stderr, "hw LINE\n"); \
if (DO_FALLBACK) \
imesa->draw_line( imesa, v0, v1 ); \
else \
i810_draw_line( imesa, v0, v1 ); \
} while (0)
#define POINT( v0 ) \
do { \
if (0) fprintf(stderr, "hw POINT\n"); \
if (DO_FALLBACK) \
imesa->draw_point( imesa, v0 ); \
else \
i810_draw_point( imesa, v0 ); \
} while (0)
/***********************************************************************
* Build render functions from dd templates *
***********************************************************************/
#define I810_OFFSET_BIT 0x01
#define I810_TWOSIDE_BIT 0x02
#define I810_UNFILLED_BIT 0x04
#define I810_FALLBACK_BIT 0x08
#define I810_MAX_TRIFUNC 0x10
static struct {
tnl_points_func points;
tnl_line_func line;
tnl_triangle_func triangle;
tnl_quad_func quad;
} rast_tab[I810_MAX_TRIFUNC];
#define DO_FALLBACK (IND & I810_FALLBACK_BIT)
#define DO_OFFSET (IND & I810_OFFSET_BIT)
#define DO_UNFILLED (IND & I810_UNFILLED_BIT)
#define DO_TWOSIDE (IND & I810_TWOSIDE_BIT)
#define DO_FLAT 0
#define DO_TRI 1
#define DO_QUAD 1
#define DO_LINE 1
#define DO_POINTS 1
#define DO_FULL_QUAD 1
#define HAVE_SPEC 1
#define HAVE_BACK_COLORS 0
#define HAVE_HW_FLATSHADE 1
#define VERTEX i810Vertex
#define TAB rast_tab
#define DEPTH_SCALE (1.0/0xffff)
#define UNFILLED_TRI unfilled_tri
#define UNFILLED_QUAD unfilled_quad
#define VERT_X(_v) _v->v.x
#define VERT_Y(_v) _v->v.y
#define VERT_Z(_v) _v->v.z
#define AREA_IS_CCW( a ) (a > 0)
#define GET_VERTEX(e) (imesa->verts + (e * imesa->vertex_size * sizeof(int)))
#define VERT_SET_RGBA( v, c ) \
do { \
i810_color_t *color = (i810_color_t *)&((v)->ui[coloroffset]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->red, (c)[0]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->green, (c)[1]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->blue, (c)[2]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->alpha, (c)[3]); \
} while (0)
#define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset]
#define VERT_SET_SPEC( v0, c ) \
do { \
if (havespec) { \
UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.red, (c)[0]); \
UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.green, (c)[1]); \
UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.blue, (c)[2]); \
} \
} while (0)
#define VERT_COPY_SPEC( v0, v1 ) \
do { \
if (havespec) { \
v0->v.specular.red = v1->v.specular.red; \
v0->v.specular.green = v1->v.specular.green; \
v0->v.specular.blue = v1->v.specular.blue; \
} \
} while (0)
#define VERT_SAVE_RGBA( idx ) color[idx] = v[idx]->ui[coloroffset]
#define VERT_RESTORE_RGBA( idx ) v[idx]->ui[coloroffset] = color[idx]
#define VERT_SAVE_SPEC( idx ) if (havespec) spec[idx] = v[idx]->ui[5]
#define VERT_RESTORE_SPEC( idx ) if (havespec) v[idx]->ui[5] = spec[idx]
#define LOCAL_VARS(n) \
i810ContextPtr imesa = I810_CONTEXT(ctx); \
GLuint color[n] = { 0 }; \
GLuint spec[n] = { 0 }; \
GLuint coloroffset = (imesa->vertex_size == 4 ? 3 : 4); \
GLboolean havespec = (imesa->vertex_size > 4); \
(void) color; (void) spec; (void) coloroffset; (void) havespec;
/***********************************************************************
* Helpers for rendering unfilled primitives *
***********************************************************************/
static const GLuint hw_prim[GL_POLYGON+1] = {
PR_LINES,
PR_LINES,
PR_LINES,
PR_LINES,
PR_TRIANGLES,
PR_TRIANGLES,
PR_TRIANGLES,
PR_TRIANGLES,
PR_TRIANGLES,
PR_TRIANGLES
};
#define RASTERIZE(x) if (imesa->hw_primitive != hw_prim[x]) \
i810RasterPrimitive( ctx, x, hw_prim[x] )
#define RENDER_PRIMITIVE imesa->render_primitive
#define TAG(x) x
#define IND I810_FALLBACK_BIT
#include "tnl_dd/t_dd_unfilled.h"
#undef IND
/***********************************************************************
* Generate GL render functions *
***********************************************************************/
#define IND (0)
#define TAG(x) x
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_OFFSET_BIT)
#define TAG(x) x##_offset
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT)
#define TAG(x) x##_twoside
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT)
#define TAG(x) x##_twoside_offset
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_UNFILLED_BIT)
#define TAG(x) x##_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_OFFSET_BIT|I810_UNFILLED_BIT)
#define TAG(x) x##_offset_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT|I810_UNFILLED_BIT)
#define TAG(x) x##_twoside_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT|I810_UNFILLED_BIT)
#define TAG(x) x##_twoside_offset_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_FALLBACK_BIT)
#define TAG(x) x##_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_OFFSET_BIT|I810_FALLBACK_BIT)
#define TAG(x) x##_offset_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT|I810_FALLBACK_BIT)
#define TAG(x) x##_twoside_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT|I810_FALLBACK_BIT)
#define TAG(x) x##_twoside_offset_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_UNFILLED_BIT|I810_FALLBACK_BIT)
#define TAG(x) x##_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_OFFSET_BIT|I810_UNFILLED_BIT|I810_FALLBACK_BIT)
#define TAG(x) x##_offset_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT|I810_UNFILLED_BIT|I810_FALLBACK_BIT)
#define TAG(x) x##_twoside_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT|I810_UNFILLED_BIT| \
I810_FALLBACK_BIT)
#define TAG(x) x##_twoside_offset_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
static void init_rast_tab( void )
{
init();
init_offset();
init_twoside();
init_twoside_offset();
init_unfilled();
init_offset_unfilled();
init_twoside_unfilled();
init_twoside_offset_unfilled();
init_fallback();
init_offset_fallback();
init_twoside_fallback();
init_twoside_offset_fallback();
init_unfilled_fallback();
init_offset_unfilled_fallback();
init_twoside_unfilled_fallback();
init_twoside_offset_unfilled_fallback();
}
/***********************************************************************
* Rasterization fallback helpers *
***********************************************************************/
/* This code is hit only when a mix of accelerated and unaccelerated
* primitives are being drawn, and only for the unaccelerated
* primitives.
*/
static void
i810_fallback_tri( i810ContextPtr imesa,
i810Vertex *v0,
i810Vertex *v1,
i810Vertex *v2 )
{
struct gl_context *ctx = imesa->glCtx;
SWvertex v[3];
i810_translate_vertex( ctx, v0, &v[0] );
i810_translate_vertex( ctx, v1, &v[1] );
i810_translate_vertex( ctx, v2, &v[2] );
_swrast_Triangle( ctx, &v[0], &v[1], &v[2] );
}
static void
i810_fallback_line( i810ContextPtr imesa,
i810Vertex *v0,
i810Vertex *v1 )
{
struct gl_context *ctx = imesa->glCtx;
SWvertex v[2];
i810_translate_vertex( ctx, v0, &v[0] );
i810_translate_vertex( ctx, v1, &v[1] );
_swrast_Line( ctx, &v[0], &v[1] );
}
static void
i810_fallback_point( i810ContextPtr imesa,
i810Vertex *v0 )
{
struct gl_context *ctx = imesa->glCtx;
SWvertex v[1];
i810_translate_vertex( ctx, v0, &v[0] );
_swrast_Point( ctx, &v[0] );
}
/**********************************************************************/
/* Render unclipped begin/end objects */
/**********************************************************************/
#define IND 0
#define V(x) (i810Vertex *)(vertptr + ((x)*vertsize*sizeof(int)))
#define RENDER_POINTS( start, count ) \
for ( ; start < count ; start++) POINT( V(ELT(start)) );
#define RENDER_LINE( v0, v1 ) LINE( V(v0), V(v1) )
#define RENDER_TRI( v0, v1, v2 ) TRI( V(v0), V(v1), V(v2) )
#define RENDER_QUAD( v0, v1, v2, v3 ) QUAD( V(v0), V(v1), V(v2), V(v3) )
#define INIT(x) i810RenderPrimitive( ctx, x )
#undef LOCAL_VARS
#define LOCAL_VARS \
i810ContextPtr imesa = I810_CONTEXT(ctx); \
GLubyte *vertptr = (GLubyte *)imesa->verts; \
const GLuint vertsize = imesa->vertex_size; \
const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \
(void) elt;
#define RESET_STIPPLE
#define RESET_OCCLUSION
#define PRESERVE_VB_DEFS
#define ELT(x) x
#define TAG(x) i810_##x##_verts
#include "tnl/t_vb_rendertmp.h"
#undef ELT
#undef TAG
#define TAG(x) i810_##x##_elts
#define ELT(x) elt[x]
#include "tnl/t_vb_rendertmp.h"
/**********************************************************************/
/* Render clipped primitives */
/**********************************************************************/
static void i810RenderClippedPoly( struct gl_context *ctx, const GLuint *elts,
GLuint n )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
GLuint prim = imesa->render_primitive;
/* Render the new vertices as an unclipped polygon.
*/
{
GLuint *tmp = VB->Elts;
VB->Elts = (GLuint *)elts;
tnl->Driver.Render.PrimTabElts[GL_POLYGON]( ctx, 0, n,
PRIM_BEGIN|PRIM_END );
VB->Elts = tmp;
}
/* Restore the render primitive
*/
if (prim != GL_POLYGON)
tnl->Driver.Render.PrimitiveNotify( ctx, prim );
}
static void i810RenderClippedLine( struct gl_context *ctx, GLuint ii, GLuint jj )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
tnl->Driver.Render.Line( ctx, ii, jj );
}
static void i810FastRenderClippedPoly( struct gl_context *ctx, const GLuint *elts,
GLuint n )
{
i810ContextPtr imesa = I810_CONTEXT( ctx );
GLuint vertsize = imesa->vertex_size;
GLuint *vb = i810AllocDmaLow( imesa, (n-2) * 3 * 4 * vertsize );
GLubyte *vertptr = (GLubyte *)imesa->verts;
const GLuint *start = (const GLuint *)V(elts[0]);
int i,j;
for (i = 2 ; i < n ; i++) {
COPY_DWORDS( j, vb, vertsize, V(elts[i-1]) );
COPY_DWORDS( j, vb, vertsize, V(elts[i]) );
COPY_DWORDS( j, vb, vertsize, start );
}
}
/**********************************************************************/
/* Choose render functions */
/**********************************************************************/
/***********************************************************************
* Rasterization fallback helpers *
***********************************************************************/
#define _I810_NEW_RENDERSTATE (_DD_NEW_LINE_STIPPLE | \
_DD_NEW_TRI_UNFILLED | \
_DD_NEW_TRI_LIGHT_TWOSIDE | \
_DD_NEW_TRI_OFFSET | \
_DD_NEW_TRI_STIPPLE | \
_NEW_POLYGONSTIPPLE)
#define POINT_FALLBACK (0)
#define LINE_FALLBACK (DD_LINE_STIPPLE)
#define TRI_FALLBACK (0)
#define ANY_FALLBACK_FLAGS (POINT_FALLBACK|LINE_FALLBACK|TRI_FALLBACK|\
DD_TRI_STIPPLE)
#define ANY_RASTER_FLAGS (DD_TRI_LIGHT_TWOSIDE|DD_TRI_OFFSET|DD_TRI_UNFILLED)
static void i810ChooseRenderState(struct gl_context *ctx)
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
i810ContextPtr imesa = I810_CONTEXT(ctx);
GLuint flags = ctx->_TriangleCaps;
GLuint index = 0;
if (I810_DEBUG & DEBUG_STATE)
fprintf(stderr,"\n%s\n",__FUNCTION__);
if (flags & (ANY_FALLBACK_FLAGS|ANY_RASTER_FLAGS)) {
if (flags & ANY_RASTER_FLAGS) {
if (flags & DD_TRI_LIGHT_TWOSIDE) index |= I810_TWOSIDE_BIT;
if (flags & DD_TRI_OFFSET) index |= I810_OFFSET_BIT;
if (flags & DD_TRI_UNFILLED) index |= I810_UNFILLED_BIT;
}
imesa->draw_point = i810_draw_point;
imesa->draw_line = i810_draw_line;
imesa->draw_tri = i810_draw_triangle;
/* Hook in fallbacks for specific primitives.
*/
if (flags & ANY_FALLBACK_FLAGS)
{
if (flags & POINT_FALLBACK)
imesa->draw_point = i810_fallback_point;
if (flags & LINE_FALLBACK)
imesa->draw_line = i810_fallback_line;
if (flags & TRI_FALLBACK)
imesa->draw_tri = i810_fallback_tri;
if ((flags & DD_TRI_STIPPLE) && !imesa->stipple_in_hw)
imesa->draw_tri = i810_fallback_tri;
index |= I810_FALLBACK_BIT;
}
}
if (imesa->RenderIndex != index) {
imesa->RenderIndex = index;
tnl->Driver.Render.Points = rast_tab[index].points;
tnl->Driver.Render.Line = rast_tab[index].line;
tnl->Driver.Render.Triangle = rast_tab[index].triangle;
tnl->Driver.Render.Quad = rast_tab[index].quad;
if (index == 0) {
tnl->Driver.Render.PrimTabVerts = i810_render_tab_verts;
tnl->Driver.Render.PrimTabElts = i810_render_tab_elts;
tnl->Driver.Render.ClippedLine = line; /* from tritmp.h */
tnl->Driver.Render.ClippedPolygon = i810FastRenderClippedPoly;
} else {
tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts;
tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts;
tnl->Driver.Render.ClippedLine = i810RenderClippedLine;
tnl->Driver.Render.ClippedPolygon = i810RenderClippedPoly;
}
}
}
static const GLenum reduced_prim[GL_POLYGON+1] = {
GL_POINTS,
GL_LINES,
GL_LINES,
GL_LINES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES
};
/**********************************************************************/
/* High level hooks for t_vb_render.c */
/**********************************************************************/
/* Determine the rasterized primitive when not drawing unfilled
* polygons.
*
* Used only for the default render stage which always decomposes
* primitives to trianges/lines/points. For the accelerated stage,
* which renders strips as strips, the equivalent calculations are
* performed in i810render.c.
*/
static void i810RenderPrimitive( struct gl_context *ctx, GLenum prim )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
GLuint rprim = reduced_prim[prim];
imesa->render_primitive = prim;
if (rprim == GL_TRIANGLES && (ctx->_TriangleCaps & DD_TRI_UNFILLED))
return;
if (imesa->reduced_primitive != rprim ||
hw_prim[prim] != imesa->hw_primitive) {
i810RasterPrimitive( ctx, rprim, hw_prim[prim] );
}
}
static void i810RunPipeline( struct gl_context *ctx )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
if (imesa->new_state) {
if (imesa->new_state & _NEW_TEXTURE)
i810UpdateTextureState( ctx ); /* may modify imesa->new_state */
if (!imesa->Fallback) {
if (imesa->new_state & _I810_NEW_VERTEX)
i810ChooseVertexState( ctx );
if (imesa->new_state & _I810_NEW_RENDERSTATE)
i810ChooseRenderState( ctx );
}
imesa->new_state = 0;
}
_tnl_run_pipeline( ctx );
}
static void i810RenderStart( struct gl_context *ctx )
{
/* Check for projective textureing. Make sure all texcoord
* pointers point to something. (fix in mesa?)
*/
i810CheckTexSizes( ctx );
}
static void i810RenderFinish( struct gl_context *ctx )
{
if (I810_CONTEXT(ctx)->RenderIndex & I810_FALLBACK_BIT)
_swrast_flush( ctx );
}
/* System to flush dma and emit state changes based on the rasterized
* primitive.
*/
void i810RasterPrimitive( struct gl_context *ctx,
GLenum rprim,
GLuint hwprim )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
GLuint st1 = imesa->Setup[I810_CTXREG_ST1];
GLuint aa = imesa->Setup[I810_CTXREG_AA];
GLuint lcs = imesa->Setup[I810_CTXREG_LCS];
st1 &= ~ST1_ENABLE;
aa &= ~AA_ENABLE;
if (I810_DEBUG & DEBUG_PRIMS) {
/* Prints reduced prim, and hw prim */
char *prim_name = "Unknown";
switch(hwprim) {
case PR_LINES:
prim_name = "Lines";
break;
case PR_LINESTRIP:
prim_name = "LineStrip";
break;
case PR_TRIANGLES:
prim_name = "Triangles";
break;
case PR_TRISTRIP_0:
prim_name = "TriStrip_0";
break;
case PR_TRIFAN:
prim_name = "TriFan";
break;
case PR_POLYGON:
prim_name = "Polygons";
break;
default:
break;
}
fprintf(stderr, "%s : rprim(%s), hwprim(%s)\n",
__FUNCTION__,
_mesa_lookup_enum_by_nr(rprim),
prim_name);
}
switch (rprim) {
case GL_TRIANGLES:
if (ctx->Polygon.StippleFlag)
st1 |= ST1_ENABLE;
if (ctx->Polygon.SmoothFlag)
aa |= AA_ENABLE;
break;
case GL_LINES:
lcs &= ~(LCS_LINEWIDTH_3_0|LCS_LINEWIDTH_0_5);
lcs |= imesa->LcsLineWidth;
if (ctx->Line.SmoothFlag) {
aa |= AA_ENABLE;
lcs |= LCS_LINEWIDTH_0_5;
}
break;
case GL_POINTS:
lcs &= ~(LCS_LINEWIDTH_3_0|LCS_LINEWIDTH_0_5);
lcs |= imesa->LcsPointSize;
if (ctx->Point.SmoothFlag) {
aa |= AA_ENABLE;
lcs |= LCS_LINEWIDTH_0_5;
}
break;
default:
return;
}
imesa->reduced_primitive = rprim;
if (st1 != imesa->Setup[I810_CTXREG_ST1] ||
aa != imesa->Setup[I810_CTXREG_AA] ||
lcs != imesa->Setup[I810_CTXREG_LCS])
{
I810_STATECHANGE(imesa, I810_UPLOAD_CTX);
imesa->hw_primitive = hwprim;
imesa->Setup[I810_CTXREG_LCS] = lcs;
imesa->Setup[I810_CTXREG_ST1] = st1;
imesa->Setup[I810_CTXREG_AA] = aa;
}
else if (hwprim != imesa->hw_primitive) {
I810_STATECHANGE(imesa, 0);
imesa->hw_primitive = hwprim;
}
}
/**********************************************************************/
/* Transition to/from hardware rasterization. */
/**********************************************************************/
static char *fallbackStrings[] = {
"Texture",
"Draw buffer",
"Read buffer",
"Color mask",
"Render mode",
"Stencil",
"Stipple",
"User disable"
};
static char *getFallbackString(GLuint bit)
{
int i = 0;
while (bit > 1) {
i++;
bit >>= 1;
}
return fallbackStrings[i];
}
void i810Fallback( i810ContextPtr imesa, GLuint bit, GLboolean mode )
{
struct gl_context *ctx = imesa->glCtx;
TNLcontext *tnl = TNL_CONTEXT(ctx);
GLuint oldfallback = imesa->Fallback;
if (0) fprintf(stderr, "%s old %x bit %x mode %d\n", __FUNCTION__,
imesa->Fallback, bit, mode );
if (mode) {
imesa->Fallback |= bit;
if (oldfallback == 0) {
I810_FIREVERTICES(imesa);
if (I810_DEBUG & DEBUG_FALLBACKS)
fprintf(stderr, "ENTER FALLBACK %s\n", getFallbackString( bit ));
_swsetup_Wakeup( ctx );
imesa->RenderIndex = ~0;
}
}
else {
imesa->Fallback &= ~bit;
if (oldfallback == bit) {
_swrast_flush( ctx );
if (I810_DEBUG & DEBUG_FALLBACKS)
fprintf(stderr, "LEAVE FALLBACK %s\n", getFallbackString( bit ));
tnl->Driver.Render.Start = i810RenderStart;
tnl->Driver.Render.PrimitiveNotify = i810RenderPrimitive;
tnl->Driver.Render.Finish = i810RenderFinish;
tnl->Driver.Render.BuildVertices = i810BuildVertices;
imesa->new_state |= (_I810_NEW_RENDERSTATE|_I810_NEW_VERTEX);
}
}
}
/**********************************************************************/
/* Initialization. */
/**********************************************************************/
void i810InitTriFuncs( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
static int firsttime = 1;
if (firsttime) {
init_rast_tab();
firsttime = 0;
}
tnl->Driver.RunPipeline = i810RunPipeline;
tnl->Driver.Render.Start = i810RenderStart;
tnl->Driver.Render.Finish = i810RenderFinish;
tnl->Driver.Render.PrimitiveNotify = i810RenderPrimitive;
tnl->Driver.Render.ResetLineStipple = _swrast_ResetLineStipple;
tnl->Driver.Render.BuildVertices = i810BuildVertices;
}

35
src/mesa/drivers/dri/i810/i810tris.h
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@ -1,35 +0,0 @@
/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
*/
#ifndef I810TRIS_INC
#define I810TRIS_INC
#include "main/mtypes.h"
extern void i810PrintRenderState( const char *msg, GLuint state );
extern void i810InitTriFuncs( struct gl_context *ctx );
extern void i810RasterPrimitive( struct gl_context *ctx, GLenum rprim, GLuint hwprim );
#endif

486
src/mesa/drivers/dri/i810/i810vb.c
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@ -1,486 +0,0 @@
/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
*/
#include "main/glheader.h"
#include "main/mtypes.h"
#include "main/imports.h"
#include "main/macros.h"
#include "main/colormac.h"
#include "swrast_setup/swrast_setup.h"
#include "tnl/t_context.h"
#include "i810screen.h"
#include "i810_dri.h"
#include "i810context.h"
#include "i810vb.h"
#include "i810ioctl.h"
#include "i810state.h"
#define I810_TEX1_BIT 0x1
#define I810_TEX0_BIT 0x2
#define I810_RGBA_BIT 0x4
#define I810_SPEC_BIT 0x8
#define I810_FOG_BIT 0x10
#define I810_XYZW_BIT 0x20
#define I810_PTEX_BIT 0x40
#define I810_MAX_SETUP 0x80
static struct {
void (*emit)( struct gl_context *, GLuint, GLuint, void *, GLuint );
tnl_interp_func interp;
tnl_copy_pv_func copy_pv;
GLboolean (*check_tex_sizes)( struct gl_context *ctx );
GLuint vertex_size;
GLuint vertex_format;
} setup_tab[I810_MAX_SETUP];
#define TINY_VERTEX_FORMAT (GFX_OP_VERTEX_FMT | \
VF_TEXCOORD_COUNT_0 | \
VF_RGBA_ENABLE | \
VF_XYZ)
#define NOTEX_VERTEX_FORMAT (GFX_OP_VERTEX_FMT | \
VF_TEXCOORD_COUNT_0 | \
VF_SPEC_FOG_ENABLE | \
VF_RGBA_ENABLE | \
VF_XYZW)
#define TEX0_VERTEX_FORMAT (GFX_OP_VERTEX_FMT | \
VF_TEXCOORD_COUNT_1 | \
VF_SPEC_FOG_ENABLE | \
VF_RGBA_ENABLE | \
VF_XYZW)
#define TEX1_VERTEX_FORMAT (GFX_OP_VERTEX_FMT | \
VF_TEXCOORD_COUNT_2 | \
VF_SPEC_FOG_ENABLE | \
VF_RGBA_ENABLE | \
VF_XYZW)
#define PROJ_TEX1_VERTEX_FORMAT 0
#define TEX2_VERTEX_FORMAT 0
#define TEX3_VERTEX_FORMAT 0
#define PROJ_TEX3_VERTEX_FORMAT 0
#define DO_XYZW (IND & I810_XYZW_BIT)
#define DO_RGBA (IND & I810_RGBA_BIT)
#define DO_SPEC (IND & I810_SPEC_BIT)
#define DO_FOG (IND & I810_FOG_BIT)
#define DO_TEX0 (IND & I810_TEX0_BIT)
#define DO_TEX1 (IND & I810_TEX1_BIT)
#define DO_TEX2 0
#define DO_TEX3 0
#define DO_PTEX (IND & I810_PTEX_BIT)
#define VERTEX i810Vertex
#define VERTEX_COLOR i810_color_t
#define GET_VIEWPORT_MAT() I810_CONTEXT(ctx)->ViewportMatrix.m
#define GET_TEXSOURCE(n) n
#define GET_VERTEX_FORMAT() I810_CONTEXT(ctx)->Setup[I810_CTXREG_VF]
#define GET_VERTEX_STORE() I810_CONTEXT(ctx)->verts
#define GET_VERTEX_SIZE() I810_CONTEXT(ctx)->vertex_size * sizeof(GLuint)
#define INVALIDATE_STORED_VERTICES()
#define HAVE_HW_VIEWPORT 0
#define HAVE_HW_DIVIDE 0
#define HAVE_RGBA_COLOR 0
#define HAVE_TINY_VERTICES 1
#define HAVE_NOTEX_VERTICES 1
#define HAVE_TEX0_VERTICES 1
#define HAVE_TEX1_VERTICES 1
#define HAVE_TEX2_VERTICES 0
#define HAVE_TEX3_VERTICES 0
#define HAVE_PTEX_VERTICES 0
#define UNVIEWPORT_VARS GLfloat h = I810_CONTEXT(ctx)->driDrawable->h
#define UNVIEWPORT_X(x) x - SUBPIXEL_X
#define UNVIEWPORT_Y(y) - y + h + SUBPIXEL_Y
#define UNVIEWPORT_Z(z) z * (float)0xffff
#define PTEX_FALLBACK() FALLBACK(I810_CONTEXT(ctx), I810_FALLBACK_TEXTURE, 1)
#define INTERP_VERTEX setup_tab[I810_CONTEXT(ctx)->SetupIndex].interp
#define COPY_PV_VERTEX setup_tab[I810_CONTEXT(ctx)->SetupIndex].copy_pv
/***********************************************************************
* Generate pv-copying and translation functions *
***********************************************************************/
#define TAG(x) i810_##x
#include "tnl_dd/t_dd_vb.c"
/***********************************************************************
* Generate vertex emit and interp functions *
***********************************************************************/
#define IND (I810_XYZW_BIT|I810_RGBA_BIT)
#define TAG(x) x##_wg
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_SPEC_BIT)
#define TAG(x) x##_wgs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_TEX0_BIT)
#define TAG(x) x##_wgt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_TEX0_BIT|I810_TEX1_BIT)
#define TAG(x) x##_wgt0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_TEX0_BIT|I810_PTEX_BIT)
#define TAG(x) x##_wgpt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_SPEC_BIT|I810_TEX0_BIT)
#define TAG(x) x##_wgst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_SPEC_BIT|I810_TEX0_BIT|\
I810_TEX1_BIT)
#define TAG(x) x##_wgst0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_SPEC_BIT|I810_TEX0_BIT|\
I810_PTEX_BIT)
#define TAG(x) x##_wgspt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT)
#define TAG(x) x##_wgf
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT|I810_SPEC_BIT)
#define TAG(x) x##_wgfs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT|I810_TEX0_BIT)
#define TAG(x) x##_wgft0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT|I810_TEX0_BIT|\
I810_TEX1_BIT)
#define TAG(x) x##_wgft0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT|I810_TEX0_BIT|\
I810_PTEX_BIT)
#define TAG(x) x##_wgfpt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT|I810_SPEC_BIT|\
I810_TEX0_BIT)
#define TAG(x) x##_wgfst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT|I810_SPEC_BIT|\
I810_TEX0_BIT|I810_TEX1_BIT)
#define TAG(x) x##_wgfst0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_XYZW_BIT|I810_RGBA_BIT|I810_FOG_BIT|I810_SPEC_BIT|\
I810_TEX0_BIT|I810_PTEX_BIT)
#define TAG(x) x##_wgfspt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_TEX0_BIT)
#define TAG(x) x##_t0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_TEX0_BIT|I810_TEX1_BIT)
#define TAG(x) x##_t0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_FOG_BIT)
#define TAG(x) x##_f
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_FOG_BIT|I810_TEX0_BIT)
#define TAG(x) x##_ft0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_FOG_BIT|I810_TEX0_BIT|I810_TEX1_BIT)
#define TAG(x) x##_ft0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT)
#define TAG(x) x##_g
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_SPEC_BIT)
#define TAG(x) x##_gs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_TEX0_BIT)
#define TAG(x) x##_gt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_TEX0_BIT|I810_TEX1_BIT)
#define TAG(x) x##_gt0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_SPEC_BIT|I810_TEX0_BIT)
#define TAG(x) x##_gst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_SPEC_BIT|I810_TEX0_BIT|I810_TEX1_BIT)
#define TAG(x) x##_gst0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_FOG_BIT)
#define TAG(x) x##_gf
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_FOG_BIT|I810_SPEC_BIT)
#define TAG(x) x##_gfs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_FOG_BIT|I810_TEX0_BIT)
#define TAG(x) x##_gft0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_FOG_BIT|I810_TEX0_BIT|I810_TEX1_BIT)
#define TAG(x) x##_gft0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_FOG_BIT|I810_SPEC_BIT|I810_TEX0_BIT)
#define TAG(x) x##_gfst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (I810_RGBA_BIT|I810_FOG_BIT|I810_SPEC_BIT|I810_TEX0_BIT|\
I810_TEX1_BIT)
#define TAG(x) x##_gfst0t1
#include "tnl_dd/t_dd_vbtmp.h"
static void init_setup_tab( void )
{
init_wg();
init_wgs();
init_wgt0();
init_wgt0t1();
init_wgpt0();
init_wgst0();
init_wgst0t1();
init_wgspt0();
init_wgf();
init_wgfs();
init_wgft0();
init_wgft0t1();
init_wgfpt0();
init_wgfst0();
init_wgfst0t1();
init_wgfspt0();
init_t0();
init_t0t1();
init_f();
init_ft0();
init_ft0t1();
init_g();
init_gs();
init_gt0();
init_gt0t1();
init_gst0();
init_gst0t1();
init_gf();
init_gfs();
init_gft0();
init_gft0t1();
init_gfst0();
init_gfst0t1();
}
static void i810PrintSetupFlags(const char *msg, GLuint flags )
{
fprintf(stderr, "%s(%x): %s%s%s%s%s%s\n",
msg,
(int)flags,
(flags & I810_XYZW_BIT) ? " xyzw," : "",
(flags & I810_RGBA_BIT) ? " rgba," : "",
(flags & I810_SPEC_BIT) ? " spec," : "",
(flags & I810_FOG_BIT) ? " fog," : "",
(flags & I810_TEX0_BIT) ? " tex-0," : "",
(flags & I810_TEX1_BIT) ? " tex-1," : "");
}
void i810CheckTexSizes( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
i810ContextPtr imesa = I810_CONTEXT( ctx );
if (!setup_tab[imesa->SetupIndex].check_tex_sizes(ctx)) {
/* Invalidate stored verts
*/
imesa->SetupNewInputs = ~0;
imesa->SetupIndex |= I810_PTEX_BIT;
if (!imesa->Fallback &&
!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) {
tnl->Driver.Render.Interp = setup_tab[imesa->SetupIndex].interp;
tnl->Driver.Render.CopyPV = setup_tab[imesa->SetupIndex].copy_pv;
}
if (imesa->Fallback) {
tnl->Driver.Render.Start(ctx);
}
}
}
void i810BuildVertices( struct gl_context *ctx,
GLuint start,
GLuint count,
GLuint newinputs )
{
i810ContextPtr imesa = I810_CONTEXT( ctx );
GLuint stride = imesa->vertex_size * sizeof(int);
GLubyte *v = ((GLubyte *)imesa->verts + (start * stride));
if (0) fprintf(stderr, "%s\n", __FUNCTION__);
newinputs |= imesa->SetupNewInputs;
imesa->SetupNewInputs = 0;
if (!newinputs)
return;
if (newinputs & VERT_BIT_POS) {
setup_tab[imesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
if (newinputs & VERT_BIT_COLOR0)
ind |= I810_RGBA_BIT;
if (newinputs & VERT_BIT_COLOR1)
ind |= I810_SPEC_BIT;
if (newinputs & VERT_BIT_TEX0)
ind |= I810_TEX0_BIT;
if (newinputs & VERT_BIT_TEX1)
ind |= I810_TEX1_BIT;
if (newinputs & VERT_BIT_FOG)
ind |= I810_FOG_BIT;
if (imesa->SetupIndex & I810_PTEX_BIT)
ind = ~0;
ind &= imesa->SetupIndex;
if (ind) {
setup_tab[ind].emit( ctx, start, count, v, stride );
}
}
}
void i810ChooseVertexState( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
i810ContextPtr imesa = I810_CONTEXT( ctx );
GLuint ind = I810_XYZW_BIT|I810_RGBA_BIT;
if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
ind |= I810_SPEC_BIT;
if (ctx->Fog.Enabled)
ind |= I810_FOG_BIT;
if (ctx->Texture._EnabledUnits & 0x2)
/* unit 1 enabled */
ind |= I810_TEX1_BIT|I810_TEX0_BIT;
else if (ctx->Texture._EnabledUnits & 0x1)
/* unit 0 enabled */
ind |= I810_TEX0_BIT;
imesa->SetupIndex = ind;
if (I810_DEBUG & (DEBUG_VERTS|DEBUG_STATE))
i810PrintSetupFlags( __FUNCTION__, ind );
if (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)) {
tnl->Driver.Render.Interp = i810_interp_extras;
tnl->Driver.Render.CopyPV = i810_copy_pv_extras;
} else {
tnl->Driver.Render.Interp = setup_tab[ind].interp;
tnl->Driver.Render.CopyPV = setup_tab[ind].copy_pv;
}
if (setup_tab[ind].vertex_format != imesa->Setup[I810_CTXREG_VF]) {
I810_STATECHANGE(imesa, I810_UPLOAD_CTX);
imesa->Setup[I810_CTXREG_VF] = setup_tab[ind].vertex_format;
imesa->vertex_size = setup_tab[ind].vertex_size;
}
}
void *i810_emit_contiguous_verts( struct gl_context *ctx,
GLuint start,
GLuint count,
void *dest )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
GLuint stride = imesa->vertex_size * 4;
setup_tab[imesa->SetupIndex].emit( ctx, start, count, dest, stride );
return (void *)((char *)dest + stride * (count - start));
}
void i810InitVB( struct gl_context *ctx )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
GLuint size = TNL_CONTEXT(ctx)->vb.Size;
imesa->verts = (GLubyte *)_mesa_align_malloc(size * 4 * 16, 32);
{
static int firsttime = 1;
if (firsttime) {
init_setup_tab();
firsttime = 0;
}
}
}
void i810FreeVB( struct gl_context *ctx )
{
i810ContextPtr imesa = I810_CONTEXT(ctx);
if (imesa->verts) {
_mesa_align_free(imesa->verts);
imesa->verts = 0;
}
}

59
src/mesa/drivers/dri/i810/i810vb.h
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/*
* GLX Hardware Device Driver for Intel i810
* Copyright (C) 1999 Keith Whitwell
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
*/
#ifndef I810VB_INC
#define I810VB_INC
#include "main/mtypes.h"
#include "swrast/swrast.h"
#define _I810_NEW_VERTEX (_NEW_TEXTURE | \
_DD_NEW_SEPARATE_SPECULAR | \
_DD_NEW_TRI_UNFILLED | \
_DD_NEW_TRI_LIGHT_TWOSIDE | \
_NEW_FOG)
extern void i810ChooseVertexState( struct gl_context *ctx );
extern void i810CheckTexSizes( struct gl_context *ctx );
extern void i810BuildVertices( struct gl_context *ctx,
GLuint start,
GLuint count,
GLuint newinputs );
extern void *i810_emit_contiguous_verts( struct gl_context *ctx,
GLuint start,
GLuint count,
void *dest );
extern void i810_translate_vertex( struct gl_context *ctx,
const i810Vertex *src,
SWvertex *dst );
extern void i810InitVB( struct gl_context *ctx );
extern void i810FreeVB( struct gl_context *ctx );
#endif

191
src/mesa/drivers/dri/i810/server/i810_common.h
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/* i810_common.h -- common header definitions for I810 2D/3D/DRM suite
*
* Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Converted to common header format:
* Jens Owen <jens@tungstengraphics.com>
*
*
*/
/* WARNING: If you change any of these defines, make sure to change
* the kernel include file as well (i810_drm.h)
*/
#ifndef _I810_COMMON_H_
#define _I810_COMMON_H_
#ifndef _I810_DEFINES_
#define _I810_DEFINES_
#define I810_USE_BATCH 1
#define I810_DMA_BUF_ORDER 12
#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER)
#define I810_DMA_BUF_NR 256
#define I810_NR_SAREA_CLIPRECTS 8
/* Each region is a minimum of 64k, and there are at most 64 of them.
*/
#define I810_NR_TEX_REGIONS 64
#define I810_LOG_MIN_TEX_REGION_SIZE 16
/* Destbuffer state
* - backbuffer linear offset and pitch -- invarient in the current dri
* - zbuffer linear offset and pitch -- also invarient
* - drawing origin in back and depth buffers.
*
* Keep the depth/back buffer state here to acommodate private buffers
* in the future.
*/
#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
#define I810_DESTREG_DI1 1
#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
#define I810_DESTREG_DV1 3
#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */
#define I810_DESTREG_DR1 5
#define I810_DESTREG_DR2 6
#define I810_DESTREG_DR3 7
#define I810_DESTREG_DR4 8
#define I810_DEST_SETUP_SIZE 10
/* Context state
*/
#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */
#define I810_CTXREG_CF1 1
#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */
#define I810_CTXREG_ST1 3
#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */
#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */
#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */
#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */
#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */
#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */
#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */
#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */
#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */
#define I810_CTX_SETUP_SIZE 20
/* Texture state (per tex unit)
*/
#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */
#define I810_TEXREG_MI1 1
#define I810_TEXREG_MI2 2
#define I810_TEXREG_MI3 3
#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */
#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */
#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */
#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */
#define I810_TEX_SETUP_SIZE 8
/* Driver specific DRM command indices
* NOTE: these are not OS specific, but they are driver specific
*/
#define DRM_I810_INIT 0x00
#define DRM_I810_VERTEX 0x01
#define DRM_I810_CLEAR 0x02
#define DRM_I810_FLUSH 0x03
#define DRM_I810_GETAGE 0x04
#define DRM_I810_GETBUF 0x05
#define DRM_I810_SWAP 0x06
#define DRM_I810_COPY 0x07
#define DRM_I810_DOCOPY 0x08
#define DRM_I810_OV0INFO 0x09
#define DRM_I810_FSTATUS 0x0a
#define DRM_I810_OV0FLIP 0x0b
#define DRM_I810_MC 0x0c
#define DRM_I810_RSTATUS 0x0d
#define DRM_I810_FLIP 0x0e
#endif
typedef enum _drmI810Initfunc {
I810_INIT_DMA = 0x01,
I810_CLEANUP_DMA = 0x02,
I810_INIT_DMA_1_4 = 0x03
} drmI810Initfunc;
typedef struct {
drmI810Initfunc func;
unsigned int mmio_offset;
unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
unsigned int ring_size;
unsigned int front_offset;
unsigned int back_offset;
unsigned int depth_offset;
unsigned int overlay_offset;
unsigned int overlay_physical;
unsigned int w;
unsigned int h;
unsigned int pitch;
unsigned int pitch_bits;
} drmI810Init;
typedef struct {
void *virtual;
int request_idx;
int request_size;
int granted;
} drmI810DMA;
/* Flags for clear ioctl
*/
#define I810_FRONT 0x1
#define I810_BACK 0x2
#define I810_DEPTH 0x4
typedef struct {
int clear_color;
int clear_depth;
int flags;
} drmI810Clear;
typedef struct {
int idx; /* buffer index */
int used; /* nr bytes in use */
int discard; /* client is finished with the buffer? */
} drmI810Vertex;
/* Flags for vertex ioctl
*/
#define PR_TRIANGLES (0x0<<18)
#define PR_TRISTRIP_0 (0x1<<18)
#define PR_TRISTRIP_1 (0x2<<18)
#define PR_TRIFAN (0x3<<18)
#define PR_POLYGON (0x4<<18)
#define PR_LINES (0x5<<18)
#define PR_LINESTRIP (0x6<<18)
#define PR_RECTS (0x7<<18)
#define PR_MASK (0x7<<18)
#endif

127
src/mesa/drivers/dri/i810/server/i810_dri.h
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#ifndef _I810_DRI_
#define _I810_DRI_
#include "xf86drm.h"
#include "i810_common.h"
#define I810_MAX_DRAWABLES 256
typedef struct {
drm_handle_t regs;
drmSize regsSize;
drmSize backbufferSize;
drm_handle_t backbuffer;
drmSize depthbufferSize;
drm_handle_t depthbuffer;
drm_handle_t textures;
int textureSize;
drm_handle_t agp_buffers;
drmSize agp_buf_size;
int deviceID;
int width;
int height;
int mem;
int cpp;
int bitsPerPixel;
int fbOffset;
int fbStride;
int backOffset;
int depthOffset;
int auxPitch;
int auxPitchBits;
int logTextureGranularity;
int textureOffset;
/* For non-dma direct rendering.
*/
int ringOffset;
int ringSize;
drmBufMapPtr drmBufs;
int irq;
unsigned int sarea_priv_offset;
} I810DRIRec, *I810DRIPtr;
/* WARNING: Do not change the SAREA structure without changing the kernel
* as well */
#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
#define I810_UPLOAD_CTX 0x4
#define I810_UPLOAD_BUFFERS 0x8
#define I810_UPLOAD_TEX0 0x10
#define I810_UPLOAD_TEX1 0x20
#define I810_UPLOAD_CLIPRECTS 0x40
typedef struct {
unsigned char next, prev; /* indices to form a circular LRU */
unsigned char in_use; /* owned by a client, or free? */
int age; /* tracked by clients to update local LRU's */
} I810TexRegionRec, *I810TexRegionPtr;
typedef struct {
unsigned int ContextState[I810_CTX_SETUP_SIZE];
unsigned int BufferState[I810_DEST_SETUP_SIZE];
unsigned int TexState[2][I810_TEX_SETUP_SIZE];
unsigned int dirty;
unsigned int nbox;
drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS];
/* Maintain an LRU of contiguous regions of texture space. If
* you think you own a region of texture memory, and it has an
* age different to the one you set, then you are mistaken and
* it has been stolen by another client. If global texAge
* hasn't changed, there is no need to walk the list.
*
* These regions can be used as a proxy for the fine-grained
* texture information of other clients - by maintaining them
* in the same lru which is used to age their own textures,
* clients have an approximate lru for the whole of global
* texture space, and can make informed decisions as to which
* areas to kick out. There is no need to choose whether to
* kick out your own texture or someone else's - simply eject
* them all in LRU order.
*/
drmTextureRegion texList[I810_NR_TEX_REGIONS + 1];
/* Last elt is sentinal */
int texAge; /* last time texture was uploaded */
int last_enqueue; /* last time a buffer was enqueued */
int last_dispatch; /* age of the most recently dispatched buffer */
int last_quiescent; /* */
int ctxOwner; /* last context to upload state */
int vertex_prim;
int pf_enabled; /* is pageflipping allowed? */
int pf_active; /* is pageflipping active right now? */
int pf_current_page; /* which buffer is being displayed? */
} I810SAREARec, *I810SAREAPtr;
typedef struct {
/* Nothing here yet */
int dummy;
} I810ConfigPrivRec, *I810ConfigPrivPtr;
typedef struct {
/* Nothing here yet */
int dummy;
} I810DRIContextRec, *I810DRIContextPtr;
#endif

991
src/mesa/drivers/dri/i810/server/i810_reg.h
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/**************************************************************************
Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*
* based on the i740 driver by
* Kevin E. Martin <kevin@precisioninsight.com>
*
*
*/
#ifndef _I810_REG_H
#define _I810_REG_H
/* I/O register offsets
*/
#define SRX 0x3C4 /* p208 */
#define GRX 0x3CE /* p213 */
#define ARX 0x3C0 /* p224 */
/* VGA Color Palette Registers */
#define DACMASK 0x3C6 /* p232 */
#define DACSTATE 0x3C7 /* p232 */
#define DACRX 0x3C7 /* p233 */
#define DACWX 0x3C8 /* p233 */
#define DACDATA 0x3C9 /* p233 */
/* CRT Controller Registers (CRX) */
#define START_ADDR_HI 0x0C /* p246 */
#define START_ADDR_LO 0x0D /* p247 */
#define VERT_SYNC_END 0x11 /* p249 */
#define EXT_VERT_TOTAL 0x30 /* p257 */
#define EXT_VERT_DISPLAY 0x31 /* p258 */
#define EXT_VERT_SYNC_START 0x32 /* p259 */
#define EXT_VERT_BLANK_START 0x33 /* p260 */
#define EXT_HORIZ_TOTAL 0x35 /* p261 */
#define EXT_HORIZ_BLANK 0x39 /* p261 */
#define EXT_START_ADDR 0x40 /* p262 */
#define EXT_START_ADDR_ENABLE 0x80
#define EXT_OFFSET 0x41 /* p263 */
#define EXT_START_ADDR_HI 0x42 /* p263 */
#define INTERLACE_CNTL 0x70 /* p264 */
#define INTERLACE_ENABLE 0x80
#define INTERLACE_DISABLE 0x00
/* Miscellaneous Output Register
*/
#define MSR_R 0x3CC /* p207 */
#define MSR_W 0x3C2 /* p207 */
#define IO_ADDR_SELECT 0x01
#define MDA_BASE 0x3B0 /* p207 */
#define CGA_BASE 0x3D0 /* p207 */
/* CR80 - IO Control, p264
*/
#define IO_CTNL 0x80
#define EXTENDED_ATTR_CNTL 0x02
#define EXTENDED_CRTC_CNTL 0x01
/* GR10 - Address mapping, p221
*/
#define ADDRESS_MAPPING 0x10
#define PAGE_TO_LOCAL_MEM_ENABLE 0x10
#define GTT_MEM_MAP_ENABLE 0x08
#define PACKED_MODE_ENABLE 0x04
#define LINEAR_MODE_ENABLE 0x02
#define PAGE_MAPPING_ENABLE 0x01
/* Blitter control, p378
*/
#define BITBLT_CNTL 0x7000c
#define COLEXP_MODE 0x30
#define COLEXP_8BPP 0x00
#define COLEXP_16BPP 0x10
#define COLEXP_24BPP 0x20
#define COLEXP_RESERVED 0x30
#define BITBLT_STATUS 0x01
/* p375.
*/
#define DISPLAY_CNTL 0x70008
#define VGA_WRAP_MODE 0x02
#define VGA_WRAP_AT_256KB 0x00
#define VGA_NO_WRAP 0x02
#define GUI_MODE 0x01
#define STANDARD_VGA_MODE 0x00
#define HIRES_MODE 0x01
/* p375
*/
#define PIXPIPE_CONFIG_0 0x70009
#define DAC_8_BIT 0x80
#define DAC_6_BIT 0x00
#define HW_CURSOR_ENABLE 0x10
#define EXTENDED_PALETTE 0x01
/* p375
*/
#define PIXPIPE_CONFIG_1 0x7000a
#define DISPLAY_COLOR_MODE 0x0F
#define DISPLAY_VGA_MODE 0x00
#define DISPLAY_8BPP_MODE 0x02
#define DISPLAY_15BPP_MODE 0x04
#define DISPLAY_16BPP_MODE 0x05
#define DISPLAY_24BPP_MODE 0x06
#define DISPLAY_32BPP_MODE 0x07
/* p375
*/
#define PIXPIPE_CONFIG_2 0x7000b
#define DISPLAY_GAMMA_ENABLE 0x08
#define DISPLAY_GAMMA_DISABLE 0x00
#define OVERLAY_GAMMA_ENABLE 0x04
#define OVERLAY_GAMMA_DISABLE 0x00
/* p380
*/
#define DISPLAY_BASE 0x70020
#define DISPLAY_BASE_MASK 0x03fffffc
/* Cursor control registers, pp383-384
*/
/* Desktop (845G, 865G) */
#define CURSOR_CONTROL 0x70080
#define CURSOR_ENABLE 0x80000000
#define CURSOR_GAMMA_ENABLE 0x40000000
#define CURSOR_STRIDE_MASK 0x30000000
#define CURSOR_FORMAT_SHIFT 24
#define CURSOR_FORMAT_MASK (0x07 << CURSOR_FORMAT_SHIFT)
#define CURSOR_FORMAT_2C (0x00 << CURSOR_FORMAT_SHIFT)
#define CURSOR_FORMAT_3C (0x01 << CURSOR_FORMAT_SHIFT)
#define CURSOR_FORMAT_4C (0x02 << CURSOR_FORMAT_SHIFT)
#define CURSOR_FORMAT_ARGB (0x04 << CURSOR_FORMAT_SHIFT)
#define CURSOR_FORMAT_XRGB (0x05 << CURSOR_FORMAT_SHIFT)
/* Mobile and i810 */
#define CURSOR_A_CONTROL CURSOR_CONTROL
#define CURSOR_ORIGIN_SCREEN 0x00 /* i810 only */
#define CURSOR_ORIGIN_DISPLAY 0x1 /* i810 only */
#define CURSOR_MODE 0x27
#define CURSOR_MODE_DISABLE 0x00
#define CURSOR_MODE_32_4C_AX 0x01 /* i810 only */
#define CURSOR_MODE_64_3C 0x04
#define CURSOR_MODE_64_4C_AX 0x05
#define CURSOR_MODE_64_4C 0x06
#define CURSOR_MODE_64_32B_AX 0x07
#define CURSOR_MODE_64_ARGB_AX (0x20 | CURSOR_MODE_64_32B_AX)
#define MCURSOR_PIPE_SELECT (1 << 28)
#define MCURSOR_PIPE_A 0x00
#define MCURSOR_PIPE_B (1 << 28)
#define MCURSOR_GAMMA_ENABLE (1 << 26)
#define MCURSOR_MEM_TYPE_LOCAL (1 << 25)
#define CURSOR_BASEADDR 0x70084
#define CURSOR_A_BASE CURSOR_BASEADDR
#define CURSOR_BASEADDR_MASK 0x1FFFFF00
#define CURSOR_A_POSITION 0x70088
#define CURSOR_POS_SIGN 0x8000
#define CURSOR_POS_MASK 0x007FF
#define CURSOR_X_SHIFT 0
#define CURSOR_Y_SHIFT 16
#define CURSOR_X_LO 0x70088
#define CURSOR_X_HI 0x70089
#define CURSOR_X_POS 0x00
#define CURSOR_X_NEG 0x80
#define CURSOR_Y_LO 0x7008A
#define CURSOR_Y_HI 0x7008B
#define CURSOR_Y_POS 0x00
#define CURSOR_Y_NEG 0x80
#define CURSOR_A_PALETTE0 0x70090
#define CURSOR_A_PALETTE1 0x70094
#define CURSOR_A_PALETTE2 0x70098
#define CURSOR_A_PALETTE3 0x7009C
#define CURSOR_SIZE 0x700A0
#define CURSOR_SIZE_MASK 0x3FF
#define CURSOR_SIZE_HSHIFT 0
#define CURSOR_SIZE_VSHIFT 12
/* Similar registers exist in Device 0 on the i810 (pp55-65), but I'm
* not sure they refer to local (graphics) memory.
*
* These details are for the local memory control registers,
* (pp301-310). The test machines are not equiped with local memory,
* so nothing is tested. Only a single row seems to be supported.
*/
#define DRAM_ROW_TYPE 0x3000
#define DRAM_ROW_0 0x01
#define DRAM_ROW_0_SDRAM 0x01
#define DRAM_ROW_0_EMPTY 0x00
#define DRAM_ROW_CNTL_LO 0x3001
#define DRAM_PAGE_MODE_CTRL 0x10
#define DRAM_RAS_TO_CAS_OVRIDE 0x08
#define DRAM_CAS_LATENCY 0x04
#define DRAM_RAS_TIMING 0x02
#define DRAM_RAS_PRECHARGE 0x01
#define DRAM_ROW_CNTL_HI 0x3002
#define DRAM_REFRESH_RATE 0x18
#define DRAM_REFRESH_DISABLE 0x00
#define DRAM_REFRESH_60HZ 0x08
#define DRAM_REFRESH_FAST_TEST 0x10
#define DRAM_REFRESH_RESERVED 0x18
#define DRAM_SMS 0x07
#define DRAM_SMS_NORMAL 0x00
#define DRAM_SMS_NOP_ENABLE 0x01
#define DRAM_SMS_ABPCE 0x02
#define DRAM_SMS_MRCE 0x03
#define DRAM_SMS_CBRCE 0x04
/* p307
*/
#define DPMS_SYNC_SELECT 0x5002
#define VSYNC_CNTL 0x08
#define VSYNC_ON 0x00
#define VSYNC_OFF 0x08
#define HSYNC_CNTL 0x02
#define HSYNC_ON 0x00
#define HSYNC_OFF 0x02
/* p317, 319
*/
#define VCLK2_VCO_M 0x6008 /* treat as 16 bit? (includes msbs) */
#define VCLK2_VCO_N 0x600a
#define VCLK2_VCO_DIV_SEL 0x6012
#define VCLK_DIVISOR_VGA0 0x6000
#define VCLK_DIVISOR_VGA1 0x6004
#define VCLK_POST_DIV 0x6010
#define POST_DIV_SELECT 0x70
#define POST_DIV_1 0x00
#define POST_DIV_2 0x10
#define POST_DIV_4 0x20
#define POST_DIV_8 0x30
#define POST_DIV_16 0x40
#define POST_DIV_32 0x50
#define VCO_LOOP_DIV_BY_4M 0x00
#define VCO_LOOP_DIV_BY_16M 0x04
/* Instruction Parser Mode Register
* - p281
* - 2 new bits.
*/
#define INST_PM 0x20c0
#define AGP_SYNC_PACKET_FLUSH_ENABLE 0x20 /* reserved */
#define SYNC_PACKET_FLUSH_ENABLE 0x10
#define TWO_D_INST_DISABLE 0x08
#define THREE_D_INST_DISABLE 0x04
#define STATE_VAR_UPDATE_DISABLE 0x02
#define PAL_STIP_DISABLE 0x01
#define INST_DONE 0x2090
#define INST_PS 0x20c4
#define MEMMODE 0x20dc
/* Instruction parser error register. p279
*/
#define IPEIR 0x2088
#define IPEHR 0x208C
/* General error reporting regs, p296
*/
#define EIR 0x20B0
#define EMR 0x20B4
#define ESR 0x20B8
#define IP_ERR 0x0001
#define ERROR_RESERVED 0xffc6
/* Interrupt Control Registers
* - new bits for i810
* - new register hwstam (mask)
*/
#define HWSTAM 0x2098 /* p290 */
#define IER 0x20a0 /* p291 */
#define IIR 0x20a4 /* p292 */
#define IMR 0x20a8 /* p293 */
#define ISR 0x20ac /* p294 */
#define HW_ERROR 0x8000
#define SYNC_STATUS_TOGGLE 0x1000
#define DPY_0_FLIP_PENDING 0x0800
#define DPY_1_FLIP_PENDING 0x0400 /* not implemented on i810 */
#define OVL_0_FLIP_PENDING 0x0200
#define OVL_1_FLIP_PENDING 0x0100 /* not implemented on i810 */
#define DPY_0_VBLANK 0x0080
#define DPY_0_EVENT 0x0040
#define DPY_1_VBLANK 0x0020 /* not implemented on i810 */
#define DPY_1_EVENT 0x0010 /* not implemented on i810 */
#define HOST_PORT_EVENT 0x0008 /* */
#define CAPTURE_EVENT 0x0004 /* */
#define USER_DEFINED 0x0002
#define BREAKPOINT 0x0001
#define INTR_RESERVED (0x6000 | \
DPY_1_FLIP_PENDING | \
OVL_1_FLIP_PENDING | \
DPY_1_VBLANK | \
DPY_1_EVENT | \
HOST_PORT_EVENT | \
CAPTURE_EVENT )
/* FIFO Watermark and Burst Length Control Register
*
* - different offset and contents on i810 (p299) (fewer bits per field)
* - some overlay fields added
* - what does it all mean?
*/
#define FWATER_BLC 0x20d8
#define FWATER_BLC2 0x20dc
#define MM_BURST_LENGTH 0x00700000
#define MM_FIFO_WATERMARK 0x0001F000
#define LM_BURST_LENGTH 0x00000700
#define LM_FIFO_WATERMARK 0x0000001F
/* Fence/Tiling ranges [0..7]
*/
#define FENCE 0x2000
#define FENCE_NR 8
#define I830_FENCE_START_MASK 0x07f80000
#define FENCE_START_MASK 0x03F80000
#define FENCE_X_MAJOR 0x00000000
#define FENCE_Y_MAJOR 0x00001000
#define FENCE_SIZE_MASK 0x00000700
#define FENCE_SIZE_512K 0x00000000
#define FENCE_SIZE_1M 0x00000100
#define FENCE_SIZE_2M 0x00000200
#define FENCE_SIZE_4M 0x00000300
#define FENCE_SIZE_8M 0x00000400
#define FENCE_SIZE_16M 0x00000500
#define FENCE_SIZE_32M 0x00000600
#define FENCE_SIZE_64M 0x00000700
#define FENCE_PITCH_MASK 0x00000070
#define FENCE_PITCH_1 0x00000000
#define FENCE_PITCH_2 0x00000010
#define FENCE_PITCH_4 0x00000020
#define FENCE_PITCH_8 0x00000030
#define FENCE_PITCH_16 0x00000040
#define FENCE_PITCH_32 0x00000050
#define FENCE_PITCH_64 0x00000060
#define FENCE_VALID 0x00000001
/* Registers to control page table, p274
*/
#define PGETBL_CTL 0x2020
#define PGETBL_ADDR_MASK 0xFFFFF000
#define PGETBL_ENABLE_MASK 0x00000001
#define PGETBL_ENABLED 0x00000001
/* Register containing pge table error results, p276
*/
#define PGE_ERR 0x2024
#define PGE_ERR_ADDR_MASK 0xFFFFF000
#define PGE_ERR_ID_MASK 0x00000038
#define PGE_ERR_CAPTURE 0x00000000
#define PGE_ERR_OVERLAY 0x00000008
#define PGE_ERR_DISPLAY 0x00000010
#define PGE_ERR_HOST 0x00000018
#define PGE_ERR_RENDER 0x00000020
#define PGE_ERR_BLITTER 0x00000028
#define PGE_ERR_MAPPING 0x00000030
#define PGE_ERR_CMD_PARSER 0x00000038
#define PGE_ERR_TYPE_MASK 0x00000007
#define PGE_ERR_INV_TABLE 0x00000000
#define PGE_ERR_INV_PTE 0x00000001
#define PGE_ERR_MIXED_TYPES 0x00000002
#define PGE_ERR_PAGE_MISS 0x00000003
#define PGE_ERR_ILLEGAL_TRX 0x00000004
#define PGE_ERR_LOCAL_MEM 0x00000005
#define PGE_ERR_TILED 0x00000006
/* Page table entries loaded via mmio region, p323
*/
#define PTE_BASE 0x10000
#define PTE_ADDR_MASK 0x3FFFF000
#define PTE_TYPE_MASK 0x00000006
#define PTE_LOCAL 0x00000002
#define PTE_MAIN_UNCACHED 0x00000000
#define PTE_MAIN_CACHED 0x00000006
#define PTE_VALID_MASK 0x00000001
#define PTE_VALID 0x00000001
/* Ring buffer registers, p277, overview p19
*/
#define LP_RING 0x2030
#define HP_RING 0x2040
#define RING_TAIL 0x00
#define TAIL_ADDR 0x000FFFF8
#define I830_TAIL_MASK 0x001FFFF8
#define RING_HEAD 0x04
#define HEAD_WRAP_COUNT 0xFFE00000
#define HEAD_WRAP_ONE 0x00200000
#define HEAD_ADDR 0x001FFFFC
#define I830_HEAD_MASK 0x001FFFFC
#define RING_START 0x08
#define START_ADDR 0x00FFFFF8
#define I830_RING_START_MASK 0xFFFFF000
#define RING_LEN 0x0C
#define RING_NR_PAGES 0x000FF000
#define I830_RING_NR_PAGES 0x001FF000
#define RING_REPORT_MASK 0x00000006
#define RING_REPORT_64K 0x00000002
#define RING_REPORT_128K 0x00000004
#define RING_NO_REPORT 0x00000000
#define RING_VALID_MASK 0x00000001
#define RING_VALID 0x00000001
#define RING_INVALID 0x00000000
/* BitBlt Instructions
*
* There are many more masks & ranges yet to add.
*/
#define BR00_BITBLT_CLIENT 0x40000000
#define BR00_OP_COLOR_BLT 0x10000000
#define BR00_OP_SRC_COPY_BLT 0x10C00000
#define BR00_OP_FULL_BLT 0x11400000
#define BR00_OP_MONO_SRC_BLT 0x11800000
#define BR00_OP_MONO_SRC_COPY_BLT 0x11000000
#define BR00_OP_MONO_PAT_BLT 0x11C00000
#define BR00_OP_MONO_SRC_COPY_IMMEDIATE_BLT (0x61 << 22)
#define BR00_OP_TEXT_IMMEDIATE_BLT 0xc000000
#define BR00_TPCY_DISABLE 0x00000000
#define BR00_TPCY_ENABLE 0x00000010
#define BR00_TPCY_ROP 0x00000000
#define BR00_TPCY_NO_ROP 0x00000020
#define BR00_TPCY_EQ 0x00000000
#define BR00_TPCY_NOT_EQ 0x00000040
#define BR00_PAT_MSB_FIRST 0x00000000 /* ? */
#define BR00_PAT_VERT_ALIGN 0x000000e0
#define BR00_LENGTH 0x0000000F
#define BR09_DEST_ADDR 0x03FFFFFF
#define BR11_SOURCE_PITCH 0x00003FFF
#define BR12_SOURCE_ADDR 0x03FFFFFF
#define BR13_SOLID_PATTERN 0x80000000
#define BR13_RIGHT_TO_LEFT 0x40000000
#define BR13_LEFT_TO_RIGHT 0x00000000
#define BR13_MONO_TRANSPCY 0x20000000
#define BR13_USE_DYN_DEPTH 0x04000000
#define BR13_DYN_8BPP 0x00000000
#define BR13_DYN_16BPP 0x01000000
#define BR13_DYN_24BPP 0x02000000
#define BR13_ROP_MASK 0x00FF0000
#define BR13_DEST_PITCH 0x0000FFFF
#define BR13_PITCH_SIGN_BIT 0x00008000
#define BR14_DEST_HEIGHT 0xFFFF0000
#define BR14_DEST_WIDTH 0x0000FFFF
#define BR15_PATTERN_ADDR 0x03FFFFFF
#define BR16_SOLID_PAT_COLOR 0x00FFFFFF
#define BR16_BACKGND_PAT_CLR 0x00FFFFFF
#define BR17_FGND_PAT_CLR 0x00FFFFFF
#define BR18_SRC_BGND_CLR 0x00FFFFFF
#define BR19_SRC_FGND_CLR 0x00FFFFFF
/* Instruction parser instructions
*/
#define INST_PARSER_CLIENT 0x00000000
#define INST_OP_FLUSH 0x02000000
#define INST_FLUSH_MAP_CACHE 0x00000001
#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
/* Registers in the i810 host-pci bridge pci config space which affect
* the i810 graphics operations.
*/
#define SMRAM_MISCC 0x70
#define GMS 0x000000c0
#define GMS_DISABLE 0x00000000
#define GMS_ENABLE_BARE 0x00000040
#define GMS_ENABLE_512K 0x00000080
#define GMS_ENABLE_1M 0x000000c0
#define USMM 0x00000030
#define USMM_DISABLE 0x00000000
#define USMM_TSEG_ZERO 0x00000010
#define USMM_TSEG_512K 0x00000020
#define USMM_TSEG_1M 0x00000030
#define GFX_MEM_WIN_SIZE 0x00010000
#define GFX_MEM_WIN_32M 0x00010000
#define GFX_MEM_WIN_64M 0x00000000
/* Overkill? I don't know. Need to figure out top of mem to make the
* SMRAM calculations come out. Linux seems to have problems
* detecting it all on its own, so this seems a reasonable double
* check to any user supplied 'mem=...' boot param.
*
* ... unfortunately this reg doesn't work according to spec on the
* test hardware.
*/
#define WHTCFG_PAMR_DRP 0x50
#define SYS_DRAM_ROW_0_SHIFT 16
#define SYS_DRAM_ROW_1_SHIFT 20
#define DRAM_MASK 0x0f
#define DRAM_VALUE_0 0
#define DRAM_VALUE_1 8
/* No 2 value defined */
#define DRAM_VALUE_3 16
#define DRAM_VALUE_4 16
#define DRAM_VALUE_5 24
#define DRAM_VALUE_6 32
#define DRAM_VALUE_7 32
#define DRAM_VALUE_8 48
#define DRAM_VALUE_9 64
#define DRAM_VALUE_A 64
#define DRAM_VALUE_B 96
#define DRAM_VALUE_C 128
#define DRAM_VALUE_D 128
#define DRAM_VALUE_E 192
#define DRAM_VALUE_F 256 /* nice one, geezer */
#define LM_FREQ_MASK 0x10
#define LM_FREQ_133 0x10
#define LM_FREQ_100 0x00
/* These are 3d state registers, but the state is invarient, so we let
* the X server handle it:
*/
/* GFXRENDERSTATE_COLOR_CHROMA_KEY, p135
*/
#define GFX_OP_COLOR_CHROMA_KEY ((0x3<<29)|(0x1d<<24)|(0x2<<16)|0x1)
#define CC1_UPDATE_KILL_WRITE (1<<28)
#define CC1_ENABLE_KILL_WRITE (1<<27)
#define CC1_DISABLE_KILL_WRITE 0
#define CC1_UPDATE_COLOR_IDX (1<<26)
#define CC1_UPDATE_CHROMA_LOW (1<<25)
#define CC1_UPDATE_CHROMA_HI (1<<24)
#define CC1_CHROMA_LOW_MASK ((1<<24)-1)
#define CC2_COLOR_IDX_SHIFT 24
#define CC2_COLOR_IDX_MASK (0xff<<24)
#define CC2_CHROMA_HI_MASK ((1<<24)-1)
#define GFX_CMD_CONTEXT_SEL ((0<<29)|(0x5<<23))
#define CS_UPDATE_LOAD (1<<17)
#define CS_UPDATE_USE (1<<16)
#define CS_UPDATE_LOAD (1<<17)
#define CS_LOAD_CTX0 0
#define CS_LOAD_CTX1 (1<<8)
#define CS_USE_CTX0 0
#define CS_USE_CTX1 (1<<0)
/* I810 LCD/TV registers */
#define LCD_TV_HTOTAL 0x60000
#define LCD_TV_C 0x60018
#define LCD_TV_OVRACT 0x6001C
#define LCD_TV_ENABLE (1 << 31)
#define LCD_TV_VGAMOD (1 << 28)
/* I830 CRTC registers */
#define HTOTAL_A 0x60000
#define HBLANK_A 0x60004
#define HSYNC_A 0x60008
#define VTOTAL_A 0x6000c
#define VBLANK_A 0x60010
#define VSYNC_A 0x60014
#define PIPEASRC 0x6001c
#define BCLRPAT_A 0x60020
#define HTOTAL_B 0x61000
#define HBLANK_B 0x61004
#define HSYNC_B 0x61008
#define VTOTAL_B 0x6100c
#define VBLANK_B 0x61010
#define VSYNC_B 0x61014
#define PIPEBSRC 0x6101c
#define BCLRPAT_B 0x61020
#define DPLL_A 0x06014
#define DPLL_B 0x06018
#define FPA0 0x06040
#define FPA1 0x06044
#define I830_HTOTAL_MASK 0xfff0000
#define I830_HACTIVE_MASK 0x7ff
#define I830_HBLANKEND_MASK 0xfff0000
#define I830_HBLANKSTART_MASK 0xfff
#define I830_HSYNCEND_MASK 0xfff0000
#define I830_HSYNCSTART_MASK 0xfff
#define I830_VTOTAL_MASK 0xfff0000
#define I830_VACTIVE_MASK 0x7ff
#define I830_VBLANKEND_MASK 0xfff0000
#define I830_VBLANKSTART_MASK 0xfff
#define I830_VSYNCEND_MASK 0xfff0000
#define I830_VSYNCSTART_MASK 0xfff
#define I830_PIPEA_HORZ_MASK 0x7ff0000
#define I830_PIPEA_VERT_MASK 0x7ff
#define ADPA 0x61100
#define ADPA_DAC_ENABLE (1<<31)
#define ADPA_DAC_DISABLE 0
#define ADPA_PIPE_SELECT_MASK (1<<30)
#define ADPA_PIPE_A_SELECT 0
#define ADPA_PIPE_B_SELECT (1<<30)
#define ADPA_USE_VGA_HVPOLARITY (1<<15)
#define ADPA_SETS_HVPOLARITY 0
#define ADPA_VSYNC_CNTL_DISABLE (1<<11)
#define ADPA_VSYNC_CNTL_ENABLE 0
#define ADPA_HSYNC_CNTL_DISABLE (1<<10)
#define ADPA_HSYNC_CNTL_ENABLE 0
#define ADPA_VSYNC_ACTIVE_HIGH (1<<4)
#define ADPA_VSYNC_ACTIVE_LOW 0
#define ADPA_HSYNC_ACTIVE_HIGH (1<<3)
#define ADPA_HSYNC_ACTIVE_LOW 0
#define DVOA 0x61120
#define DVOB 0x61140
#define DVOC 0x61160
#define DVO_ENABLE (1<<31)
#define DVOA_SRCDIM 0x61124
#define DVOB_SRCDIM 0x61144
#define DVOC_SRCDIM 0x61164
#define LVDS 0x61180
#define PIPEACONF 0x70008
#define PIPEACONF_ENABLE (1<<31)
#define PIPEACONF_DISABLE 0
#define PIPEACONF_DOUBLE_WIDE (1<<30)
#define PIPEACONF_SINGLE_WIDE 0
#define PIPEACONF_PIPE_UNLOCKED 0
#define PIPEACONF_PIPE_LOCKED (1<<25)
#define PIPEACONF_PALETTE 0
#define PIPEACONF_GAMMA (1<<24)
#define PIPEBCONF 0x71008
#define PIPEBCONF_ENABLE (1<<31)
#define PIPEBCONF_DISABLE 0
#define PIPEBCONF_GAMMA (1<<24)
#define PIPEBCONF_PALETTE 0
#define DSPACNTR 0x70180
#define DSPBCNTR 0x71180
#define DISPLAY_PLANE_ENABLE (1<<31)
#define DISPLAY_PLANE_DISABLE 0
#define DISPPLANE_GAMMA_ENABLE (1<<30)
#define DISPPLANE_GAMMA_DISABLE 0
#define DISPPLANE_PIXFORMAT_MASK (0xf<<26)
#define DISPPLANE_8BPP (0x2<<26)
#define DISPPLANE_15_16BPP (0x4<<26)
#define DISPPLANE_16BPP (0x5<<26)
#define DISPPLANE_32BPP_NO_ALPHA (0x6<<26)
#define DISPPLANE_32BPP (0x7<<26)
#define DISPPLANE_STEREO_ENABLE (1<<25)
#define DISPPLANE_STEREO_DISABLE 0
#define DISPPLANE_SEL_PIPE_MASK (1<<24)
#define DISPPLANE_SEL_PIPE_A 0
#define DISPPLANE_SEL_PIPE_B (1<<24)
#define DISPPLANE_SRC_KEY_ENABLE (1<<22)
#define DISPPLANE_SRC_KEY_DISABLE 0
#define DISPPLANE_LINE_DOUBLE (1<<20)
#define DISPPLANE_NO_LINE_DOUBLE 0
#define DISPPLANE_STEREO_POLARITY_FIRST 0
#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18)
/* plane B only */
#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15)
#define DISPPLANE_ALPHA_TRANS_DISABLE 0
#define DISPPLANE_SPRITE_ABOVE_DISPLAYA 0
#define DISPPLANE_SPRITE_ABOVE_OVERLAY (1)
#define DSPABASE 0x70184
#define DSPASTRIDE 0x70188
#define DSPBBASE 0x71184
#define DSPBADDR DSPBBASE
#define DSPBSTRIDE 0x71188
/* Various masks for reserved bits, etc. */
#define I830_FWATER1_MASK (~((1<<11)|(1<<10)|(1<<9)| \
(1<<8)|(1<<26)|(1<<25)|(1<<24)|(1<<5)|(1<<4)|(1<<3)| \
(1<<2)|(1<<1)|1|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)))
#define I830_FWATER2_MASK ~(0)
#define DV0A_RESERVED ((1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<16)|(1<<5)|(1<<1)|1)
#define DV0B_RESERVED ((1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<16)|(1<<5)|(1<<1)|1)
#define VGA0_N_DIVISOR_MASK ((1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16))
#define VGA0_M1_DIVISOR_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8))
#define VGA0_M2_DIVISOR_MASK ((1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1)
#define VGA0_M1M2N_RESERVED ~(VGA0_N_DIVISOR_MASK|VGA0_M1_DIVISOR_MASK|VGA0_M2_DIVISOR_MASK)
#define VGA0_POSTDIV_MASK ((1<<7)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1)
#define VGA1_POSTDIV_MASK ((1<<15)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8))
#define VGA_POSTDIV_RESERVED ~(VGA0_POSTDIV_MASK|VGA1_POSTDIV_MASK|(1<<7)|(1<<15))
#define DPLLA_POSTDIV_MASK ((1<<23)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16))
#define DPLLA_RESERVED ((1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<22)|(1<<15)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1)
#define ADPA_RESERVED ((1<<2)|(1<<1)|1|(1<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16))
#define SUPER_WORD 32
#define BURST_A_MASK ((1<<11)|(1<<10)|(1<<9)|(1<<8))
#define BURST_B_MASK ((1<<26)|(1<<25)|(1<<24))
#define WATER_A_MASK ((1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1)
#define WATER_B_MASK ((1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16))
#define WATER_RESERVED ((1<<31)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<23)|(1<<22)|(1<<21)|(1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<7)|(1<<6))
#define PIPEACONF_RESERVED ((1<<29)|(1<<28)|(1<<27)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)|0xffff)
#define PIPEBCONF_RESERVED ((1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<26)|(1<<25)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)|0xffff)
#define DSPACNTR_RESERVED ((1<<23)|(1<<19)|(1<<17)|(1<<16)|0xffff)
#define DSPBCNTR_RESERVED ((1<<23)|(1<<19)|(1<<17)|(1<<16)|0x7ffe)
#define I830_GMCH_CTRL 0x52
#define I830_GMCH_ENABLED 0x4
#define I830_GMCH_MEM_MASK 0x1
#define I830_GMCH_MEM_64M 0x1
#define I830_GMCH_MEM_128M 0
#define I830_GMCH_GMS_MASK 0x70
#define I830_GMCH_GMS_DISABLED 0x00
#define I830_GMCH_GMS_LOCAL 0x10
#define I830_GMCH_GMS_STOLEN_512 0x20
#define I830_GMCH_GMS_STOLEN_1024 0x30
#define I830_GMCH_GMS_STOLEN_8192 0x40
#define I830_RDRAM_CHANNEL_TYPE 0x03010
#define I830_RDRAM_ND(x) (((x) & 0x20) >> 5)
#define I830_RDRAM_DDT(x) (((x) & 0x18) >> 3)
#define I855_GMCH_GMS_MASK (0x7 << 4)
#define I855_GMCH_GMS_DISABLED 0x00
#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4)
#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4)
#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4)
#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4)
#define I85X_CAPID 0x44
#define I85X_VARIANT_MASK 0x7
#define I85X_VARIANT_SHIFT 5
#define I855_GME 0x0
#define I855_GM 0x4
#define I852_GME 0x2
#define I852_GM 0x5
/* BLT commands */
#define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3))
#define COLOR_BLT_WRITE_ALPHA (1<<21)
#define COLOR_BLT_WRITE_RGB (1<<20)
#define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|(0x4))
#define XY_COLOR_BLT_WRITE_ALPHA (1<<21)
#define XY_COLOR_BLT_WRITE_RGB (1<<20)
#define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1)
#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21)
#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20)
#define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|0x4)
#define SRC_COPY_BLT_WRITE_ALPHA (1<<21)
#define SRC_COPY_BLT_WRITE_RGB (1<<20)
#define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)|0x7)
#define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8))
#define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12))
#define XY_MONO_PAT_BLT_WRITE_ALPHA (1<<21)
#define XY_MONO_PAT_BLT_WRITE_RGB (1<<20)
#define XY_MONO_SRC_BLT_CMD ((0x2<<29)|(0x54<<22)|(0x6))
#define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21)
#define XY_MONO_SRC_BLT_WRITE_RGB (1<<20)
/* 3d state */
#define STATE3D_FOG_MODE ((3<<29)|(0x1d<<24)|(0x89<<16)|2)
#define FOG_MODE_VERTEX (1<<31)
#define STATE3D_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16))
#define DISABLE_TEX_TRANSFORM (1<<28)
#define TEXTURE_SET(x) (x<<29)
#define STATE3D_RASTERIZATION_RULES ((3<<29)|(0x07<<24))
#define POINT_RASTER_ENABLE (1<<15)
#define POINT_RASTER_OGL (1<<13)
#define STATE3D_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16))
#define DISABLE_VIEWPORT_TRANSFORM (1<<31)
#define DISABLE_PERSPECTIVE_DIVIDE (1<<29)
#define MI_SET_CONTEXT (0x18<<23)
#define CTXT_NO_RESTORE (1)
#define CTXT_PALETTE_SAVE_DISABLE (1<<3)
#define CTXT_PALETTE_RESTORE_DISABLE (1<<2)
/* Dword 0 */
#define MI_VERTEX_BUFFER (0x17<<23)
#define MI_VERTEX_BUFFER_IDX(x) (x<<20)
#define MI_VERTEX_BUFFER_PITCH(x) (x<<13)
#define MI_VERTEX_BUFFER_WIDTH(x) (x<<6)
/* Dword 1 */
#define MI_VERTEX_BUFFER_DISABLE (1)
/* Overlay Flip */
#define MI_OVERLAY_FLIP (0x11<<23)
#define MI_OVERLAY_FLIP_CONTINUE (0<<21)
#define MI_OVERLAY_FLIP_ON (1<<21)
#define MI_OVERLAY_FLIP_OFF (2<<21)
/* Wait for Events */
#define MI_WAIT_FOR_EVENT (0x03<<23)
#define MI_WAIT_FOR_OVERLAY_FLIP (1<<16)
/* Flush */
#define MI_FLUSH (0x04<<23)
#define MI_WRITE_DIRTY_STATE (1<<4)
#define MI_END_SCENE (1<<3)
#define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2)
#define MI_INVALIDATE_MAP_CACHE (1<<0)
/* Noop */
#define MI_NOOP 0x00
#define MI_NOOP_WRITE_ID (1<<22)
#define MI_NOOP_ID_MASK (1<<22 - 1)
#define STATE3D_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x01<<16))
/* STATE3D_FOG_MODE stuff */
#define ENABLE_FOG_SOURCE (1<<27)
#define ENABLE_FOG_CONST (1<<24)
#define ENABLE_FOG_DENSITY (1<<23)
#define MAX_DISPLAY_PIPES 2
typedef enum {
CrtIndex = 0,
TvIndex,
DfpIndex,
LfpIndex,
Tv2Index,
Dfp2Index,
UnknownIndex,
Unknown2Index,
NumDisplayTypes,
NumKnownDisplayTypes = UnknownIndex
} DisplayType;
/* What's connected to the pipes (as reported by the BIOS) */
#define PIPE_ACTIVE_MASK 0xff
#define PIPE_CRT_ACTIVE (1 << CrtIndex)
#define PIPE_TV_ACTIVE (1 << TvIndex)
#define PIPE_DFP_ACTIVE (1 << DfpIndex)
#define PIPE_LCD_ACTIVE (1 << LfpIndex)
#define PIPE_TV2_ACTIVE (1 << Tv2Index)
#define PIPE_DFP2_ACTIVE (1 << Dfp2Index)
#define PIPE_UNKNOWN_ACTIVE ((1 << UnknownIndex) | \
(1 << Unknown2Index))
#define PIPE_SIZED_DISP_MASK (PIPE_DFP_ACTIVE | \
PIPE_LCD_ACTIVE | \
PIPE_DFP2_ACTIVE)
#define PIPE_A_SHIFT 0
#define PIPE_B_SHIFT 8
#define PIPE_SHIFT(n) ((n) == 0 ? \
PIPE_A_SHIFT : PIPE_B_SHIFT)
/*
* Some BIOS scratch area registers. The 845 (and 830?) store the amount
* of video memory available to the BIOS in SWF1.
*/
#define SWF0 0x71410
#define SWF1 0x71414
#define SWF2 0x71418
#define SWF3 0x7141c
#define SWF4 0x71420
#define SWF5 0x71424
#define SWF6 0x71428
/*
* 855 scratch registers.
*/
#define SWF00 0x70410
#define SWF01 0x70414
#define SWF02 0x70418
#define SWF03 0x7041c
#define SWF04 0x70420
#define SWF05 0x70424
#define SWF06 0x70428
#define SWF10 SWF0
#define SWF11 SWF1
#define SWF12 SWF2
#define SWF13 SWF3
#define SWF14 SWF4
#define SWF15 SWF5
#define SWF16 SWF6
#define SWF30 0x72414
#define SWF31 0x72418
#define SWF32 0x7241c
/*
* Overlay registers. These are overlay registers accessed via MMIO.
* Those loaded via the overlay register page are defined in i830_video.c.
*/
#define OVADD 0x30000
#define DOVSTA 0x30008
#define OC_BUF (0x3<<20)
#define OGAMC5 0x30010
#define OGAMC4 0x30014
#define OGAMC3 0x30018
#define OGAMC2 0x3001c
#define OGAMC1 0x30020
#define OGAMC0 0x30024
/*
* Palette registers
*/
#define PALETTE_A 0x0a000
#define PALETTE_B 0x0a800
#endif /* _I810_REG_H */

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# src/mesa/drivers/dri/mach64/Makefile
TOP = ../../../../..
include $(TOP)/configs/current
LIBNAME = mach64_dri.so
include ../Makefile.defines
DRIVER_SOURCES = \
mach64_context.c \
mach64_ioctl.c \
mach64_screen.c \
mach64_span.c \
mach64_state.c \
mach64_tex.c \
mach64_texmem.c \
mach64_texstate.c \
mach64_tris.c \
mach64_vb.c \
mach64_dd.c \
mach64_lock.c
C_SOURCES = \
$(COMMON_SOURCES) \
$(DRIVER_SOURCES)
ASM_SOURCES =
include ../Makefile.targets

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* Jos<EFBFBD>Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "main/glheader.h"
#include "main/context.h"
#include "main/simple_list.h"
#include "main/imports.h"
#include "swrast/swrast.h"
#include "swrast_setup/swrast_setup.h"
#include "vbo/vbo.h"
#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
#include "drivers/common/driverfuncs.h"
#include "mach64_context.h"
#include "mach64_ioctl.h"
#include "mach64_dd.h"
#include "mach64_span.h"
#include "mach64_state.h"
#include "mach64_tex.h"
#include "mach64_tris.h"
#include "mach64_vb.h"
#include "utils.h"
#include "vblank.h"
#ifndef MACH64_DEBUG
int MACH64_DEBUG = (0);
#endif
static const struct dri_debug_control debug_control[] =
{
{ "sync", DEBUG_ALWAYS_SYNC },
{ "api", DEBUG_VERBOSE_API },
{ "msg", DEBUG_VERBOSE_MSG },
{ "lru", DEBUG_VERBOSE_LRU },
{ "dri", DEBUG_VERBOSE_DRI },
{ "ioctl", DEBUG_VERBOSE_IOCTL },
{ "prims", DEBUG_VERBOSE_PRIMS },
{ "count", DEBUG_VERBOSE_COUNT },
{ "nowait", DEBUG_NOWAIT },
{ "fall", DEBUG_VERBOSE_FALLBACK },
{ NULL, 0 }
};
static const struct dri_extension card_extensions[] =
{
{ "GL_ARB_multitexture", NULL },
{ "GL_EXT_texture_edge_clamp", NULL },
{ "GL_MESA_ycbcr_texture", NULL },
{ NULL, NULL }
};
/* Create the device specific context.
*/
GLboolean mach64CreateContext( gl_api api,
const struct gl_config *glVisual,
__DRIcontext *driContextPriv,
void *sharedContextPrivate )
{
struct gl_context *ctx, *shareCtx;
__DRIscreen *driScreen = driContextPriv->driScreenPriv;
struct dd_function_table functions;
mach64ContextPtr mmesa;
mach64ScreenPtr mach64Screen;
int i, heap;
GLuint *c_textureSwapsPtr = NULL;
#if DO_DEBUG
MACH64_DEBUG = driParseDebugString(getenv("MACH64_DEBUG"), debug_control);
#endif
/* Allocate the mach64 context */
mmesa = (mach64ContextPtr) CALLOC( sizeof(*mmesa) );
if ( !mmesa )
return GL_FALSE;
/* Init default driver functions then plug in our Mach64-specific functions
* (the texture functions are especially important)
*/
_mesa_init_driver_functions( &functions );
mach64InitDriverFuncs( &functions );
mach64InitIoctlFuncs( &functions );
mach64InitTextureFuncs( &functions );
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((mach64ContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
mmesa->glCtx = _mesa_create_context(API_OPENGL, glVisual, shareCtx,
&functions, (void *)mmesa);
if (!mmesa->glCtx) {
FREE(mmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = mmesa;
ctx = mmesa->glCtx;
mmesa->driContext = driContextPriv;
mmesa->driScreen = driScreen;
mmesa->driDrawable = NULL;
mmesa->hHWContext = driContextPriv->hHWContext;
mmesa->driHwLock = &driScreen->pSAREA->lock;
mmesa->driFd = driScreen->fd;
mach64Screen = mmesa->mach64Screen = (mach64ScreenPtr)driScreen->private;
/* Parse configuration files */
driParseConfigFiles (&mmesa->optionCache, &mach64Screen->optionCache,
mach64Screen->driScreen->myNum, "mach64");
mmesa->sarea = (drm_mach64_sarea_t *)((char *)driScreen->pSAREA +
sizeof(drm_sarea_t));
mmesa->CurrentTexObj[0] = NULL;
mmesa->CurrentTexObj[1] = NULL;
(void) memset( mmesa->texture_heaps, 0, sizeof( mmesa->texture_heaps ) );
make_empty_list( &mmesa->swapped );
mmesa->firstTexHeap = mach64Screen->firstTexHeap;
mmesa->lastTexHeap = mach64Screen->firstTexHeap + mach64Screen->numTexHeaps;
for ( i = mmesa->firstTexHeap ; i < mmesa->lastTexHeap ; i++ ) {
mmesa->texture_heaps[i] = driCreateTextureHeap( i, mmesa,
mach64Screen->texSize[i],
6, /* align to 64-byte boundary, use 12 for page-size boundary */
MACH64_NR_TEX_REGIONS,
(drmTextureRegionPtr)mmesa->sarea->tex_list[i],
&mmesa->sarea->tex_age[i],
&mmesa->swapped,
sizeof( mach64TexObj ),
(destroy_texture_object_t *) mach64DestroyTexObj );
#if ENABLE_PERF_BOXES
c_textureSwapsPtr = & mmesa->c_textureSwaps;
#endif
driSetTextureSwapCounterLocation( mmesa->texture_heaps[i],
c_textureSwapsPtr );
}
mmesa->RenderIndex = -1; /* Impossible value */
mmesa->vert_buf = NULL;
mmesa->num_verts = 0;
mmesa->new_state = MACH64_NEW_ALL;
mmesa->dirty = MACH64_UPLOAD_ALL;
/* Set the maximum texture size small enough that we can
* guarentee that both texture units can bind a maximal texture
* and have them both in memory (on-card or AGP) at once.
* Test for 2 textures * bytes/texel * size * size. There's no
* need to account for mipmaps since we only upload one level.
*/
ctx->Const.MaxTextureUnits = 2;
ctx->Const.MaxTextureImageUnits = 2;
ctx->Const.MaxTextureCoordUnits = 2;
ctx->Const.MaxDrawBuffers = 1;
heap = mach64Screen->IsPCI ? MACH64_CARD_HEAP : MACH64_AGP_HEAP;
driCalculateMaxTextureLevels( & mmesa->texture_heaps[heap],
1,
& ctx->Const,
mach64Screen->cpp,
10, /* max 2D texture size is 1024x1024 */
0, /* 3D textures unsupported. */
0, /* cube textures unsupported. */
0, /* texture rectangles unsupported. */
1, /* mipmapping unsupported. */
GL_TRUE, /* need to have both textures in
either local or AGP memory */
0 );
#if ENABLE_PERF_BOXES
mmesa->boxes = ( getenv( "LIBGL_PERFORMANCE_BOXES" ) != NULL );
#endif
/* Allocate the vertex buffer
*/
mmesa->vert_buf = _mesa_align_malloc(MACH64_BUFFER_SIZE, 32);
if ( !mmesa->vert_buf )
return GL_FALSE;
mmesa->vert_used = 0;
mmesa->vert_total = MACH64_BUFFER_SIZE;
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_vbo_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
/* Install the customized pipeline:
*/
/* _tnl_destroy_pipeline( ctx ); */
/* _tnl_install_pipeline( ctx, mach64_pipeline ); */
/* Configure swrast and T&L to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_tnl_allow_pixel_fog( ctx, GL_FALSE );
_tnl_allow_vertex_fog( ctx, GL_TRUE );
driInitExtensions( ctx, card_extensions, GL_TRUE );
mach64InitVB( ctx );
mach64InitTriFuncs( ctx );
mach64DDInitStateFuncs( ctx );
mach64DDInitSpanFuncs( ctx );
mach64DDInitState( mmesa );
mmesa->do_irqs = (mmesa->mach64Screen->irq && !getenv("MACH64_NO_IRQS"));
driContextPriv->driverPrivate = (void *)mmesa;
if (driQueryOptionb(&mmesa->optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
FALLBACK(mmesa, MACH64_FALLBACK_DISABLE, 1);
}
return GL_TRUE;
}
/* Destroy the device specific context.
*/
void mach64DestroyContext( __DRIcontext *driContextPriv )
{
mach64ContextPtr mmesa = (mach64ContextPtr) driContextPriv->driverPrivate;
assert(mmesa); /* should never be null */
if ( mmesa ) {
GLboolean release_texture_heaps;
release_texture_heaps = (mmesa->glCtx->Shared->RefCount == 1);
_swsetup_DestroyContext( mmesa->glCtx );
_tnl_DestroyContext( mmesa->glCtx );
_vbo_DestroyContext( mmesa->glCtx );
_swrast_DestroyContext( mmesa->glCtx );
if (release_texture_heaps) {
/* This share group is about to go away, free our private
* texture object data.
*/
int i;
for ( i = mmesa->firstTexHeap ; i < mmesa->lastTexHeap ; i++ ) {
driDestroyTextureHeap( mmesa->texture_heaps[i] );
mmesa->texture_heaps[i] = NULL;
}
assert( is_empty_list( & mmesa->swapped ) );
}
mach64FreeVB( mmesa->glCtx );
/* Free the vertex buffer */
if ( mmesa->vert_buf )
_mesa_align_free( mmesa->vert_buf );
/* free the Mesa context */
mmesa->glCtx->DriverCtx = NULL;
_mesa_destroy_context(mmesa->glCtx);
FREE( mmesa );
}
}
/* Force the context `c' to be the current context and associate with it
* buffer `b'.
*/
GLboolean
mach64MakeCurrent( __DRIcontext *driContextPriv,
__DRIdrawable *driDrawPriv,
__DRIdrawable *driReadPriv )
{
if ( driContextPriv ) {
GET_CURRENT_CONTEXT(ctx);
mach64ContextPtr oldMach64Ctx = ctx ? MACH64_CONTEXT(ctx) : NULL;
mach64ContextPtr newMach64Ctx = (mach64ContextPtr) driContextPriv->driverPrivate;
if ( newMach64Ctx != oldMach64Ctx ) {
newMach64Ctx->new_state |= MACH64_NEW_CONTEXT;
newMach64Ctx->dirty = MACH64_UPLOAD_ALL;
}
if ( newMach64Ctx->driDrawable != driDrawPriv ) {
if (driDrawPriv->swap_interval == (unsigned)-1) {
driDrawPriv->vblFlags = (newMach64Ctx->do_irqs)
? driGetDefaultVBlankFlags(&newMach64Ctx->optionCache)
: VBLANK_FLAG_NO_IRQ;
driDrawableInitVBlank( driDrawPriv );
}
newMach64Ctx->driDrawable = driDrawPriv;
mach64CalcViewport( newMach64Ctx->glCtx );
}
_mesa_make_current( newMach64Ctx->glCtx,
(struct gl_framebuffer *) driDrawPriv->driverPrivate,
(struct gl_framebuffer *) driReadPriv->driverPrivate );
newMach64Ctx->new_state |= MACH64_NEW_CLIP;
} else {
_mesa_make_current( NULL, NULL, NULL );
}
return GL_TRUE;
}
/* Force the context `c' to be unbound from its buffer.
*/
GLboolean
mach64UnbindContext( __DRIcontext *driContextPriv )
{
return GL_TRUE;
}

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* Jos<EFBFBD>Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#ifndef __MACH64_CONTEXT_H__
#define __MACH64_CONTEXT_H__
#include "dri_util.h"
#include "drm.h"
#include "mach64_drm.h"
#include "main/mtypes.h"
#include "mach64_reg.h"
#include "texmem.h"
struct mach64_context;
typedef struct mach64_context mach64ContextRec;
typedef struct mach64_context *mach64ContextPtr;
#include "mach64_lock.h"
#include "mach64_screen.h"
/* Experimental driver options */
#define MACH64_CLIENT_STATE_EMITS 0
/* Performace monitoring */
#define ENABLE_PERF_BOXES 1
/* Native vertex format */
#define MACH64_NATIVE_VTXFMT 1
/* Flags for what context state needs to be updated:
*/
#define MACH64_NEW_ALPHA 0x0001
#define MACH64_NEW_DEPTH 0x0002
#define MACH64_NEW_FOG 0x0004
#define MACH64_NEW_CLIP 0x0008
#define MACH64_NEW_CULL 0x0010
#define MACH64_NEW_MASKS 0x0020
#define MACH64_NEW_RENDER_UNUSED 0x0040
#define MACH64_NEW_WINDOW 0x0080
#define MACH64_NEW_TEXTURE 0x0100
#define MACH64_NEW_CONTEXT 0x0200
#define MACH64_NEW_ALL 0x03ff
/* Flags for software fallback cases:
*/
#define MACH64_FALLBACK_TEXTURE 0x0001
#define MACH64_FALLBACK_DRAW_BUFFER 0x0002
#define MACH64_FALLBACK_READ_BUFFER 0x0004
#define MACH64_FALLBACK_STENCIL 0x0008
#define MACH64_FALLBACK_RENDER_MODE 0x0010
#define MACH64_FALLBACK_LOGICOP 0x0020
#define MACH64_FALLBACK_SEP_SPECULAR 0x0040
#define MACH64_FALLBACK_BLEND_EQ 0x0080
#define MACH64_FALLBACK_BLEND_FUNC 0x0100
#define MACH64_FALLBACK_DISABLE 0x0200
#define CARD32 GLuint /* KW: For building in mesa tree */
#if MACH64_NATIVE_VTXFMT
/* The vertex structures.
*/
/* The size of this union is not of relevence:
*/
union mach64_vertex_t {
GLfloat f[16];
GLuint ui[16];
GLushort us2[16][2];
GLubyte ub4[16][4];
};
typedef union mach64_vertex_t mach64Vertex, *mach64VertexPtr;
#else
/* Use the templated vertex format:
*/
#define TAG(x) mach64##x
#include "tnl_dd/t_dd_vertex.h"
#undef TAG
#endif /* MACH64_NATIVE_VTXFMT */
/* Subpixel offsets for window coordinates:
* These are enough to fix most glean tests except polygonOffset.
* There are also still some gaps that show in e.g. the tunnel Mesa demo
* or the lament xscreensaver hack.
*/
#define SUBPIXEL_X (0.0125F)
#define SUBPIXEL_Y (0.15F)
typedef void (*mach64_tri_func)( mach64ContextPtr,
mach64Vertex *,
mach64Vertex *,
mach64Vertex * );
typedef void (*mach64_line_func)( mach64ContextPtr,
mach64Vertex *,
mach64Vertex * );
typedef void (*mach64_point_func)( mach64ContextPtr,
mach64Vertex * );
struct mach64_texture_object {
driTextureObject base;
GLuint bufAddr;
GLint heap; /* same as base.heap->heapId */
/* For communicating values from mach64AllocTexObj(), mach64SetTexImages()
* to mach64UpdateTextureUnit(). Alternately, we can use the tObj values or
* set the context registers directly.
*/
GLint widthLog2;
GLint heightLog2;
GLint maxLog2;
GLint hasAlpha;
GLint textureFormat;
GLboolean BilinearMin;
GLboolean BilinearMag;
GLboolean ClampS;
GLboolean ClampT;
};
typedef struct mach64_texture_object mach64TexObj, *mach64TexObjPtr;
struct mach64_context {
struct gl_context *glCtx;
/* Driver and hardware state management
*/
GLuint new_state;
GLuint dirty; /* Hardware state to be updated */
drm_mach64_context_regs_t setup;
GLuint NewGLState;
GLuint Fallback;
GLuint SetupIndex;
GLuint SetupNewInputs;
GLuint RenderIndex;
GLfloat hw_viewport[16];
GLfloat depth_scale;
GLuint vertex_size;
GLuint vertex_stride_shift;
GLuint vertex_format;
GLuint num_verts;
GLubyte *verts;
CARD32 Color; /* Current draw color */
CARD32 ClearColor; /* Color used to clear color buffer */
CARD32 ClearDepth; /* Value used to clear depth buffer */
/* Map GL texture units onto hardware
*/
GLint multitex;
GLint tmu_source[2];
GLint tex_dest[2];
/* Texture object bookkeeping
*/
mach64TexObjPtr CurrentTexObj[2];
GLint firstTexHeap, lastTexHeap;
driTexHeap *texture_heaps[MACH64_NR_TEX_HEAPS];
driTextureObject swapped;
/* Fallback rasterization functions
*/
mach64_point_func draw_point;
mach64_line_func draw_line;
mach64_tri_func draw_tri;
/* Culling */
GLfloat backface_sign;
/* DMA buffers
*/
void *vert_buf;
size_t vert_total;
unsigned vert_used;
GLuint hw_primitive;
GLenum render_primitive;
/* Visual, drawable, cliprect and scissor information
*/
GLint drawOffset, drawPitch;
GLint drawX, drawY; /* origin of drawable in draw buffer */
GLint readOffset, readPitch;
GLuint numClipRects; /* Cliprects for the draw buffer */
drm_clip_rect_t *pClipRects;
GLint scissor;
drm_clip_rect_t ScissorRect; /* Current software scissor */
/* Mirrors of some DRI state
*/
__DRIcontext *driContext; /* DRI context */
__DRIscreen *driScreen; /* DRI screen */
__DRIdrawable *driDrawable; /* DRI drawable bound to this ctx */
unsigned int lastStamp; /* mirror driDrawable->lastStamp */
drm_context_t hHWContext;
drm_hw_lock_t *driHwLock;
int driFd;
mach64ScreenPtr mach64Screen; /* Screen private DRI data */
drm_mach64_sarea_t *sarea; /* Private SAREA data */
GLuint hardwareWentIdle;
#if ENABLE_PERF_BOXES
/* Performance counters
*/
GLuint boxes; /* Draw performance boxes */
GLuint c_clears;
GLuint c_drawWaits;
GLuint c_textureSwaps;
GLuint c_textureBytes;
GLuint c_agpTextureBytes;
GLuint c_texsrc_agp;
GLuint c_texsrc_card;
GLuint c_vertexBuffers;
#endif
/* VBI
*/
GLuint do_irqs;
/* Configuration cache
*/
driOptionCache optionCache;
};
#define MACH64_CONTEXT(ctx) ((mach64ContextPtr)(ctx->DriverCtx))
extern GLboolean mach64CreateContext( gl_api api,
const struct gl_config *glVisual,
__DRIcontext *driContextPriv,
void *sharedContextPrivate );
extern void mach64DestroyContext( __DRIcontext * );
extern GLboolean mach64MakeCurrent( __DRIcontext *driContextPriv,
__DRIdrawable *driDrawPriv,
__DRIdrawable *driReadPriv );
extern GLboolean mach64UnbindContext( __DRIcontext *driContextPriv );
/* ================================================================
* Byte ordering
*/
#if MESA_LITTLE_ENDIAN == 1
#define LE32_IN( x ) ( *(GLuint *)(x) )
#define LE32_IN_FLOAT( x ) ( *(GLfloat *)(x) )
#define LE32_OUT( x, y ) do { *(GLuint *)(x) = (y); } while (0)
#define LE32_OUT_FLOAT( x, y ) do { *(GLfloat *)(x) = (y); } while (0)
#else
#if defined(__OpenBSD__) || defined(__NetBSD__)
#include <machine/endian.h>
#define bswap_32 bswap32
#else
#include <byteswap.h>
#endif
#define LE32_IN( x ) bswap_32( *(GLuint *)(x) )
#define LE32_IN_FLOAT( x ) \
({ \
GLuint __tmp = bswap_32( *(GLuint *)(x) ); \
*(GLfloat *)&__tmp; \
})
#define LE32_OUT( x, y ) do { *(GLuint *)(x) = bswap_32( y ); } while (0)
#define LE32_OUT_FLOAT( x, y ) \
do { \
GLuint __tmp; \
*(GLfloat *)&__tmp = (y); \
*(GLuint *)(x) = bswap_32( __tmp ); \
} while (0)
#endif
/* ================================================================
* DMA buffers
*/
#define DMALOCALS CARD32 *buf=NULL; int requested=0; int outcount=0
/* called while locked for interleaved client-side state emits */
#define DMAGETPTR( dwords ) \
do { \
requested = (dwords); \
buf = (CARD32 *)mach64AllocDmaLocked( mmesa, ((dwords)*4) ); \
outcount = 0; \
} while(0)
#define DMAOUTREG( reg, val ) \
do { \
LE32_OUT( &buf[outcount++], ADRINDEX( reg ) ); \
LE32_OUT( &buf[outcount++], ( val ) ); \
} while(0)
#define DMAADVANCE() \
do { \
if (outcount < requested) { \
mmesa->vert_used -= (requested - outcount) * 4; \
} \
} while(0)
/* ================================================================
* Debugging:
*/
#define DO_DEBUG 1
#if DO_DEBUG
extern int MACH64_DEBUG;
#else
#define MACH64_DEBUG 0
#endif
#define DEBUG_ALWAYS_SYNC 0x001
#define DEBUG_VERBOSE_API 0x002
#define DEBUG_VERBOSE_MSG 0x004
#define DEBUG_VERBOSE_LRU 0x008
#define DEBUG_VERBOSE_DRI 0x010
#define DEBUG_VERBOSE_IOCTL 0x020
#define DEBUG_VERBOSE_PRIMS 0x040
#define DEBUG_VERBOSE_COUNT 0x080
#define DEBUG_NOWAIT 0x100
#define DEBUG_VERBOSE_FALLBACK 0x200
#endif /* __MACH64_CONTEXT_H__ */

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "mach64_context.h"
#include "mach64_ioctl.h"
#include "mach64_dd.h"
#include "main/context.h"
#include "utils.h"
/* Return the current color buffer size.
*/
static void mach64DDGetBufferSize( struct gl_framebuffer *buffer,
GLuint *width, GLuint *height )
{
GET_CURRENT_CONTEXT(ctx);
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
LOCK_HARDWARE( mmesa );
*width = mmesa->driDrawable->w;
*height = mmesa->driDrawable->h;
UNLOCK_HARDWARE( mmesa );
}
/* Return various strings for glGetString().
*/
static const GLubyte *mach64DDGetString( struct gl_context *ctx, GLenum name )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
static char buffer[128];
unsigned offset;
const char * card_name = "Mach64 [Rage Pro]";
GLuint agp_mode = mmesa->mach64Screen->IsPCI ? 0 :
mmesa->mach64Screen->AGPMode;
switch ( name ) {
case GL_VENDOR:
return (GLubyte*)"Gareth Hughes, Leif Delgass, José Fonseca";
case GL_RENDERER:
offset = driGetRendererString( buffer, card_name, agp_mode );
return (GLubyte *)buffer;
default:
return NULL;
}
}
/* Send all commands to the hardware. If vertex buffers or indirect
* buffers are in use, then we need to make sure they are sent to the
* hardware. All commands that are normally sent to the ring are
* already considered `flushed'.
*/
static void mach64DDFlush( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
LOCK_HARDWARE( mmesa );
FLUSH_DMA_LOCKED( mmesa );
UNLOCK_HARDWARE( mmesa );
#if ENABLE_PERF_BOXES
if ( mmesa->boxes ) {
LOCK_HARDWARE( mmesa );
mach64PerformanceBoxesLocked( mmesa );
UNLOCK_HARDWARE( mmesa );
}
/* Log the performance counters if necessary */
mach64PerformanceCounters( mmesa );
#endif
}
/* Make sure all commands have been sent to the hardware and have
* completed processing.
*/
static void mach64DDFinish( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
#if ENABLE_PERF_BOXES
/* Bump the performance counter */
mmesa->c_drawWaits++;
#endif
mach64DDFlush( ctx );
mach64WaitForIdle( mmesa );
}
/* Initialize the driver's misc functions.
*/
void mach64InitDriverFuncs( struct dd_function_table *functions )
{
functions->GetBufferSize = mach64DDGetBufferSize;
functions->GetString = mach64DDGetString;
functions->Finish = mach64DDFinish;
functions->Flush = mach64DDFlush;
}

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
*
*/
#ifndef __MACH64_DD_H__
#define __MACH64_DD_H__
extern void mach64InitDriverFuncs( struct dd_function_table *functions );
#endif

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* Jos<EFBFBD>Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include <errno.h>
#include "mach64_context.h"
#include "mach64_state.h"
#include "mach64_ioctl.h"
#include "mach64_tex.h"
#include "main/imports.h"
#include "main/macros.h"
#include "swrast/swrast.h"
#include "vblank.h"
#define MACH64_TIMEOUT 10 /* the DRM already has a timeout, so keep this small */
/* =============================================================
* Hardware vertex buffer handling
*/
/* Get a new VB from the pool of vertex buffers in AGP space.
*/
drmBufPtr mach64GetBufferLocked( mach64ContextPtr mmesa )
{
int fd = mmesa->mach64Screen->driScreen->fd;
int index = 0;
int size = 0;
drmDMAReq dma;
drmBufPtr buf = NULL;
int to = 0;
int ret;
dma.context = mmesa->hHWContext;
dma.send_count = 0;
dma.send_list = NULL;
dma.send_sizes = NULL;
dma.flags = 0;
dma.request_count = 1;
dma.request_size = MACH64_BUFFER_SIZE;
dma.request_list = &index;
dma.request_sizes = &size;
dma.granted_count = 0;
while ( !buf && ( to++ < MACH64_TIMEOUT ) ) {
ret = drmDMA( fd, &dma );
if ( ret == 0 ) {
buf = &mmesa->mach64Screen->buffers->list[index];
buf->used = 0;
#if ENABLE_PERF_BOXES
/* Bump the performance counter */
mmesa->c_vertexBuffers++;
#endif
return buf;
}
}
if ( !buf ) {
drmCommandNone( fd, DRM_MACH64_RESET );
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "Error: Could not get new VB... exiting\n" );
exit( -1 );
}
return buf;
}
void mach64FlushVerticesLocked( mach64ContextPtr mmesa )
{
drm_clip_rect_t *pbox = mmesa->pClipRects;
int nbox = mmesa->numClipRects;
void *buffer = mmesa->vert_buf;
int count = mmesa->vert_used;
int prim = mmesa->hw_primitive;
int fd = mmesa->driScreen->fd;
drm_mach64_vertex_t vertex;
int i;
mmesa->num_verts = 0;
mmesa->vert_used = 0;
if ( !count )
return;
if ( mmesa->dirty & ~MACH64_UPLOAD_CLIPRECTS )
mach64EmitHwStateLocked( mmesa );
if ( !nbox )
count = 0;
if ( nbox > MACH64_NR_SAREA_CLIPRECTS )
mmesa->dirty |= MACH64_UPLOAD_CLIPRECTS;
if ( !count || !(mmesa->dirty & MACH64_UPLOAD_CLIPRECTS) ) {
int to = 0;
int ret;
/* FIXME: Is this really necessary */
if ( nbox == 1 )
mmesa->sarea->nbox = 0;
else
mmesa->sarea->nbox = nbox;
vertex.prim = prim;
vertex.buf = buffer;
vertex.used = count;
vertex.discard = 1;
do {
ret = drmCommandWrite( fd, DRM_MACH64_VERTEX,
&vertex, sizeof(drm_mach64_vertex_t) );
} while ( ( ret == -EAGAIN ) && ( to++ < MACH64_TIMEOUT ) );
if ( ret ) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "Error flushing vertex buffer: return = %d\n", ret );
exit( -1 );
}
} else {
for ( i = 0 ; i < nbox ; ) {
int nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS, nbox );
drm_clip_rect_t *b = mmesa->sarea->boxes;
int discard = 0;
int to = 0;
int ret;
mmesa->sarea->nbox = nr - i;
for ( ; i < nr ; i++ ) {
*b++ = pbox[i];
}
/* Finished with the buffer?
*/
if ( nr == nbox ) {
discard = 1;
}
mmesa->sarea->dirty |= MACH64_UPLOAD_CLIPRECTS;
vertex.prim = prim;
vertex.buf = buffer;
vertex.used = count;
vertex.discard = discard;
do {
ret = drmCommandWrite( fd, DRM_MACH64_VERTEX,
&vertex, sizeof(drm_mach64_vertex_t) );
} while ( ( ret == -EAGAIN ) && ( to++ < MACH64_TIMEOUT ) );
if ( ret ) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "Error flushing vertex buffer: return = %d\n", ret );
exit( -1 );
}
}
}
mmesa->dirty &= ~MACH64_UPLOAD_CLIPRECTS;
}
/* ================================================================
* Texture uploads
*/
void mach64FireBlitLocked( mach64ContextPtr mmesa, void *buffer,
GLint offset, GLint pitch, GLint format,
GLint x, GLint y, GLint width, GLint height )
{
drm_mach64_blit_t blit;
int to = 0;
int ret;
blit.buf = buffer;
blit.offset = offset;
blit.pitch = pitch;
blit.format = format;
blit.x = x;
blit.y = y;
blit.width = width;
blit.height = height;
do {
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_BLIT,
&blit, sizeof(drm_mach64_blit_t) );
} while ( ( ret == -EAGAIN ) && ( to++ < MACH64_TIMEOUT ) );
if ( ret ) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_BLIT: return = %d\n", ret );
exit( -1 );
}
}
/* ================================================================
* SwapBuffers with client-side throttling
*/
static void delay( void ) {
/* Prevent an optimizing compiler from removing a spin loop */
}
/* Throttle the frame rate -- only allow MACH64_MAX_QUEUED_FRAMES
* pending swap buffers requests at a time.
*
* GH: We probably don't want a timeout here, as we can wait as
* long as we want for a frame to complete. If it never does, then
* the card has locked.
*/
static int mach64WaitForFrameCompletion( mach64ContextPtr mmesa )
{
int fd = mmesa->driFd;
int i;
int wait = 0;
int frames;
while ( 1 ) {
drm_mach64_getparam_t gp;
int ret;
if ( mmesa->sarea->frames_queued < MACH64_MAX_QUEUED_FRAMES ) {
break;
}
if (MACH64_DEBUG & DEBUG_NOWAIT) {
return 1;
}
gp.param = MACH64_PARAM_FRAMES_QUEUED;
gp.value = &frames; /* also copied into sarea->frames_queued by DRM */
ret = drmCommandWriteRead( fd, DRM_MACH64_GETPARAM, &gp, sizeof(gp) );
if ( ret ) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_GETPARAM: return = %d\n", ret );
exit( -1 );
}
/* Spin in place a bit so we aren't hammering the register */
wait++;
for ( i = 0 ; i < 1024 ; i++ ) {
delay();
}
}
return wait;
}
/* Copy the back color buffer to the front color buffer.
*/
void mach64CopyBuffer( __DRIdrawable *dPriv )
{
mach64ContextPtr mmesa;
GLint nbox, i, ret;
drm_clip_rect_t *pbox;
GLboolean missed_target;
assert(dPriv);
assert(dPriv->driContextPriv);
assert(dPriv->driContextPriv->driverPrivate);
mmesa = (mach64ContextPtr) dPriv->driContextPriv->driverPrivate;
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "\n********************************\n" );
fprintf( stderr, "\n%s( %p )\n\n",
__FUNCTION__, mmesa->glCtx );
fflush( stderr );
}
/* Flush any outstanding vertex buffers */
FLUSH_BATCH( mmesa );
LOCK_HARDWARE( mmesa );
/* Throttle the frame rate -- only allow one pending swap buffers
* request at a time.
*/
if ( !mach64WaitForFrameCompletion( mmesa ) ) {
mmesa->hardwareWentIdle = 1;
} else {
mmesa->hardwareWentIdle = 0;
}
#if ENABLE_PERF_BOXES
if ( mmesa->boxes ) {
mach64PerformanceBoxesLocked( mmesa );
}
#endif
UNLOCK_HARDWARE( mmesa );
driWaitForVBlank( dPriv, &missed_target );
LOCK_HARDWARE( mmesa );
/* use front buffer cliprects */
nbox = dPriv->numClipRects;
pbox = dPriv->pClipRects;
for ( i = 0 ; i < nbox ; ) {
GLint nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS , nbox );
drm_clip_rect_t *b = mmesa->sarea->boxes;
GLint n = 0;
for ( ; i < nr ; i++ ) {
*b++ = pbox[i];
n++;
}
mmesa->sarea->nbox = n;
ret = drmCommandNone( mmesa->driFd, DRM_MACH64_SWAP );
if ( ret ) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_SWAP: return = %d\n", ret );
exit( -1 );
}
}
if ( MACH64_DEBUG & DEBUG_ALWAYS_SYNC ) {
mach64WaitForIdleLocked( mmesa );
}
UNLOCK_HARDWARE( mmesa );
mmesa->dirty |= (MACH64_UPLOAD_CONTEXT |
MACH64_UPLOAD_MISC |
MACH64_UPLOAD_CLIPRECTS);
#if ENABLE_PERF_BOXES
/* Log the performance counters if necessary */
mach64PerformanceCounters( mmesa );
#endif
}
#if ENABLE_PERF_BOXES
/* ================================================================
* Performance monitoring
*/
void mach64PerformanceCounters( mach64ContextPtr mmesa )
{
if (MACH64_DEBUG & DEBUG_VERBOSE_COUNT) {
/* report performance counters */
fprintf( stderr, "mach64CopyBuffer: vertexBuffers:%i drawWaits:%i clears:%i\n",
mmesa->c_vertexBuffers, mmesa->c_drawWaits, mmesa->c_clears );
}
mmesa->c_vertexBuffers = 0;
mmesa->c_drawWaits = 0;
mmesa->c_clears = 0;
if ( mmesa->c_textureSwaps || mmesa->c_textureBytes || mmesa->c_agpTextureBytes ) {
if (MACH64_DEBUG & DEBUG_VERBOSE_COUNT) {
fprintf( stderr, " textureSwaps:%i textureBytes:%i agpTextureBytes:%i\n",
mmesa->c_textureSwaps, mmesa->c_textureBytes, mmesa->c_agpTextureBytes );
}
mmesa->c_textureSwaps = 0;
mmesa->c_textureBytes = 0;
mmesa->c_agpTextureBytes = 0;
}
mmesa->c_texsrc_agp = 0;
mmesa->c_texsrc_card = 0;
if (MACH64_DEBUG & DEBUG_VERBOSE_COUNT)
fprintf( stderr, "---------------------------------------------------------\n" );
}
void mach64PerformanceBoxesLocked( mach64ContextPtr mmesa )
{
GLint ret;
drm_mach64_clear_t clear;
GLint x, y, w, h;
GLuint color;
GLint nbox;
GLint x1, y1, x2, y2;
drm_clip_rect_t *b = mmesa->sarea->boxes;
/* save cliprects */
nbox = mmesa->sarea->nbox;
x1 = b[0].x1;
y1 = b[0].y1;
x2 = b[0].x2;
y2 = b[0].y2;
/* setup a single cliprect and call the clear ioctl for each box */
mmesa->sarea->nbox = 1;
w = h = 8;
x = mmesa->drawX;
y = mmesa->drawY;
b[0].x1 = x;
b[0].x2 = x + w;
b[0].y1 = y;
b[0].y2 = y + h;
clear.flags = MACH64_BACK;
clear.clear_depth = 0;
/* Red box if DDFinish was called to wait for rendering to complete */
if ( mmesa->c_drawWaits ) {
color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 0, 0, 0 );
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
x += w;
b[0].x1 = x;
b[0].x2 = x + w;
/* draw a green box if we had to wait for previous frame(s) to complete */
if ( !mmesa->hardwareWentIdle ) {
color = mach64PackColor( mmesa->mach64Screen->cpp, 0, 255, 0, 0 );
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
x += w;
w = 20;
b[0].x1 = x;
/* show approx. ratio of AGP/card textures used - Blue = AGP, Purple = Card */
if ( mmesa->c_texsrc_agp || mmesa->c_texsrc_card ) {
color = mach64PackColor( mmesa->mach64Screen->cpp, 0, 0, 255, 0 );
w = ((GLfloat)mmesa->c_texsrc_agp / (GLfloat)(mmesa->c_texsrc_agp + mmesa->c_texsrc_card))*20;
if (w > 1) {
b[0].x2 = x + w;
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
x += w;
w = 20 - w;
if (w > 1) {
b[0].x1 = x;
b[0].x2 = x + w;
color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 0, 255, 0 );
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
}
x += w;
w = 8;
b[0].x1 = x;
b[0].x2 = x + w;
/* Yellow box if we swapped textures */
if ( mmesa->c_textureSwaps ) {
color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 255, 0, 0 );
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
h = 4;
x += 8;
b[0].x1 = x;
b[0].y2 = y + h;
/* Purple bar for card memory texture blits/uploads */
if ( mmesa->c_textureBytes ) {
color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 0, 255, 0 );
w = mmesa->c_textureBytes / 16384;
if ( w <= 0 )
w = 1;
if (w > (mmesa->driDrawable->w - 44))
w = mmesa->driDrawable->w - 44;
b[0].x2 = x + w;
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
/* Blue bar for AGP memory texture blits/uploads */
if ( mmesa->c_agpTextureBytes ) {
color = mach64PackColor( mmesa->mach64Screen->cpp, 0, 0, 255, 0 );
w = mmesa->c_agpTextureBytes / 16384;
if ( w <= 0 )
w = 1;
if (w > (mmesa->driDrawable->w - 44))
w = mmesa->driDrawable->w - 44;
y += 4;
b[0].x2 = x + w;
b[0].y1 = y;
b[0].y2 = y + h;
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
/* Pink bar for number of vertex buffers used */
if ( mmesa->c_vertexBuffers ) {
color = mach64PackColor( mmesa->mach64Screen->cpp, 196, 128, 128, 0 );
w = mmesa->c_vertexBuffers;
if (w > (mmesa->driDrawable->w))
w = mmesa->driDrawable->w;
h = 8;
x = mmesa->drawX;
y = mmesa->drawY + 8;
b[0].x1 = x;
b[0].x2 = x + w;
b[0].y1 = y;
b[0].y2 = y + h;
clear.x = x;
clear.y = y;
clear.w = w;
clear.h = h;
clear.clear_color = color;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if (ret < 0) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
/* restore cliprects */
mmesa->sarea->nbox = nbox;
b[0].x1 = x1;
b[0].y1 = y1;
b[0].x2 = x2;
b[0].y2 = y2;
}
#endif
/* ================================================================
* Buffer clear
*/
static void mach64DDClear( struct gl_context *ctx, GLbitfield mask )
{
mach64ContextPtr mmesa = MACH64_CONTEXT( ctx );
__DRIdrawable *dPriv = mmesa->driDrawable;
drm_mach64_clear_t clear;
GLuint flags = 0;
GLint i;
GLint ret;
GLint cx, cy, cw, ch;
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "mach64DDClear\n");
}
#if ENABLE_PERF_BOXES
/* Bump the performance counter */
mmesa->c_clears++;
#endif
FLUSH_BATCH( mmesa );
/* The only state changes we care about here are the RGBA colormask
* and scissor/clipping. We'll just update that state, if needed.
*/
if ( mmesa->new_state & (MACH64_NEW_MASKS | MACH64_NEW_CLIP) ) {
const GLuint save_state = mmesa->new_state;
mmesa->new_state &= (MACH64_NEW_MASKS | MACH64_NEW_CLIP);
mach64DDUpdateHWState( ctx );
mmesa->new_state = save_state & ~(MACH64_NEW_MASKS | MACH64_NEW_CLIP);
}
if ( mask & BUFFER_BIT_FRONT_LEFT ) {
flags |= MACH64_FRONT;
mask &= ~BUFFER_BIT_FRONT_LEFT;
}
if ( mask & BUFFER_BIT_BACK_LEFT ) {
flags |= MACH64_BACK;
mask &= ~BUFFER_BIT_BACK_LEFT;
}
if ( ( mask & BUFFER_BIT_DEPTH ) && ctx->Depth.Mask ) {
flags |= MACH64_DEPTH;
mask &= ~BUFFER_BIT_DEPTH;
}
if ( mask )
_swrast_Clear( ctx, mask );
if ( !flags )
return;
LOCK_HARDWARE( mmesa );
/* compute region after locking: */
cx = ctx->DrawBuffer->_Xmin;
cy = ctx->DrawBuffer->_Ymin;
cw = ctx->DrawBuffer->_Xmax - cx;
ch = ctx->DrawBuffer->_Ymax - cy;
/* Flip top to bottom */
cx += mmesa->drawX;
cy = mmesa->drawY + dPriv->h - cy - ch;
/* HACK?
*/
if ( mmesa->dirty & ~MACH64_UPLOAD_CLIPRECTS ) {
mach64EmitHwStateLocked( mmesa );
}
for ( i = 0 ; i < mmesa->numClipRects ; ) {
int nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS, mmesa->numClipRects );
drm_clip_rect_t *box = mmesa->pClipRects;
drm_clip_rect_t *b = mmesa->sarea->boxes;
GLint n = 0;
if (cw != dPriv->w || ch != dPriv->h) {
/* clear subregion */
for ( ; i < nr ; i++ ) {
GLint x = box[i].x1;
GLint y = box[i].y1;
GLint w = box[i].x2 - x;
GLint h = box[i].y2 - y;
if ( x < cx ) w -= cx - x, x = cx;
if ( y < cy ) h -= cy - y, y = cy;
if ( x + w > cx + cw ) w = cx + cw - x;
if ( y + h > cy + ch ) h = cy + ch - y;
if ( w <= 0 ) continue;
if ( h <= 0 ) continue;
b->x1 = x;
b->y1 = y;
b->x2 = x + w;
b->y2 = y + h;
b++;
n++;
}
} else {
/* clear whole window */
for ( ; i < nr ; i++ ) {
*b++ = box[i];
n++;
}
}
mmesa->sarea->nbox = n;
if ( MACH64_DEBUG & DEBUG_VERBOSE_IOCTL ) {
fprintf( stderr,
"DRM_MACH64_CLEAR: flag 0x%x color %x depth %x nbox %d\n",
flags,
(GLuint)mmesa->ClearColor,
(GLuint)mmesa->ClearDepth,
mmesa->sarea->nbox );
}
clear.flags = flags;
clear.x = cx;
clear.y = cy;
clear.w = cw;
clear.h = ch;
clear.clear_color = mmesa->ClearColor;
clear.clear_depth = mmesa->ClearDepth;
ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
&clear, sizeof(drm_mach64_clear_t) );
if ( ret ) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
exit( -1 );
}
}
UNLOCK_HARDWARE( mmesa );
mmesa->dirty |= (MACH64_UPLOAD_CONTEXT |
MACH64_UPLOAD_MISC |
MACH64_UPLOAD_CLIPRECTS);
}
void mach64WaitForIdleLocked( mach64ContextPtr mmesa )
{
int fd = mmesa->driFd;
int to = 0;
int ret;
do {
ret = drmCommandNone( fd, DRM_MACH64_IDLE );
} while ( ( ret == -EBUSY ) && ( to++ < MACH64_TIMEOUT ) );
if ( ret < 0 ) {
drmCommandNone( fd, DRM_MACH64_RESET );
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "Error: Mach64 timed out... exiting\n" );
exit( -1 );
}
}
/* Flush the DMA queue to the hardware */
void mach64FlushDMALocked( mach64ContextPtr mmesa )
{
int fd = mmesa->driFd;
int ret;
ret = drmCommandNone( fd, DRM_MACH64_FLUSH );
if ( ret < 0 ) {
drmCommandNone( fd, DRM_MACH64_RESET );
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "Error flushing DMA... exiting\n" );
exit( -1 );
}
mmesa->dirty |= (MACH64_UPLOAD_CONTEXT |
MACH64_UPLOAD_MISC |
MACH64_UPLOAD_CLIPRECTS);
}
/* For client-side state emits - currently unused */
void mach64UploadHwStateLocked( mach64ContextPtr mmesa )
{
drm_mach64_sarea_t *sarea = mmesa->sarea;
drm_mach64_context_regs_t *regs = &sarea->context_state;
unsigned int dirty = sarea->dirty;
CARD32 offset = ((regs->tex_size_pitch & 0xf0) >> 2);
DMALOCALS;
DMAGETPTR( 19*2 );
if ( dirty & MACH64_UPLOAD_MISC ) {
DMAOUTREG( MACH64_DP_MIX, regs->dp_mix );
DMAOUTREG( MACH64_DP_SRC, regs->dp_src );
DMAOUTREG( MACH64_CLR_CMP_CNTL, regs->clr_cmp_cntl );
DMAOUTREG( MACH64_GUI_TRAJ_CNTL, regs->gui_traj_cntl );
DMAOUTREG( MACH64_SC_LEFT_RIGHT, regs->sc_left_right );
DMAOUTREG( MACH64_SC_TOP_BOTTOM, regs->sc_top_bottom );
sarea->dirty &= ~MACH64_UPLOAD_MISC;
}
if ( dirty & MACH64_UPLOAD_DST_OFF_PITCH ) {
DMAOUTREG( MACH64_DST_OFF_PITCH, regs->dst_off_pitch );
sarea->dirty &= ~MACH64_UPLOAD_DST_OFF_PITCH;
}
if ( dirty & MACH64_UPLOAD_Z_OFF_PITCH ) {
DMAOUTREG( MACH64_Z_OFF_PITCH, regs->z_off_pitch );
sarea->dirty &= ~MACH64_UPLOAD_Z_OFF_PITCH;
}
if ( dirty & MACH64_UPLOAD_Z_ALPHA_CNTL ) {
DMAOUTREG( MACH64_Z_CNTL, regs->z_cntl );
DMAOUTREG( MACH64_ALPHA_TST_CNTL, regs->alpha_tst_cntl );
sarea->dirty &= ~MACH64_UPLOAD_Z_ALPHA_CNTL;
}
if ( dirty & MACH64_UPLOAD_SCALE_3D_CNTL ) {
DMAOUTREG( MACH64_SCALE_3D_CNTL, regs->scale_3d_cntl );
sarea->dirty &= ~MACH64_UPLOAD_SCALE_3D_CNTL;
}
if ( dirty & MACH64_UPLOAD_DP_FOG_CLR ) {
DMAOUTREG( MACH64_DP_FOG_CLR, regs->dp_fog_clr );
sarea->dirty &= ~MACH64_UPLOAD_DP_FOG_CLR;
}
if ( dirty & MACH64_UPLOAD_DP_WRITE_MASK ) {
DMAOUTREG( MACH64_DP_WRITE_MASK, regs->dp_write_mask );
sarea->dirty &= ~MACH64_UPLOAD_DP_WRITE_MASK;
}
if ( dirty & MACH64_UPLOAD_DP_PIX_WIDTH ) {
DMAOUTREG( MACH64_DP_PIX_WIDTH, regs->dp_pix_width );
sarea->dirty &= ~MACH64_UPLOAD_DP_PIX_WIDTH;
}
if ( dirty & MACH64_UPLOAD_SETUP_CNTL ) {
DMAOUTREG( MACH64_SETUP_CNTL, regs->setup_cntl );
sarea->dirty &= ~MACH64_UPLOAD_SETUP_CNTL;
}
if ( dirty & MACH64_UPLOAD_TEXTURE ) {
DMAOUTREG( MACH64_TEX_SIZE_PITCH, regs->tex_size_pitch );
DMAOUTREG( MACH64_TEX_CNTL, regs->tex_cntl );
DMAOUTREG( MACH64_SECONDARY_TEX_OFF, regs->secondary_tex_off );
DMAOUTREG( MACH64_TEX_0_OFF + offset, regs->tex_offset );
sarea->dirty &= ~MACH64_UPLOAD_TEXTURE;
}
#if 0
if ( dirty & MACH64_UPLOAD_CLIPRECTS ) {
DMAOUTREG( MACH64_SC_LEFT_RIGHT, regs->sc_left_right );
DMAOUTREG( MACH64_SC_TOP_BOTTOM, regs->sc_top_bottom );
sarea->dirty &= ~MACH64_UPLOAD_CLIPRECTS;
}
#endif
sarea->dirty = 0;
DMAADVANCE();
}
void mach64InitIoctlFuncs( struct dd_function_table *functions )
{
functions->Clear = mach64DDClear;
}

151
src/mesa/drivers/dri/mach64/mach64_ioctl.h
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@ -1,151 +0,0 @@
/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#ifndef __MACH64_IOCTL_H__
#define __MACH64_IOCTL_H__
#include <stdio.h>
#include <stdlib.h>
#include "mach64_dri.h"
#include "mach64_reg.h"
#include "mach64_lock.h"
#define MACH64_BUFFER_MAX_DWORDS (MACH64_BUFFER_SIZE / sizeof(CARD32))
extern drmBufPtr mach64GetBufferLocked( mach64ContextPtr mmesa );
extern void mach64FlushVerticesLocked( mach64ContextPtr mmesa );
extern void mach64FlushDMALocked( mach64ContextPtr mmesa );
extern void mach64UploadHwStateLocked( mach64ContextPtr mmesa );
static INLINE void *mach64AllocDmaLow( mach64ContextPtr mmesa, int bytes )
{
CARD32 *head;
if ( mmesa->vert_used + bytes > mmesa->vert_total ) {
LOCK_HARDWARE( mmesa );
mach64FlushVerticesLocked( mmesa );
UNLOCK_HARDWARE( mmesa );
}
head = (CARD32 *)((char *)mmesa->vert_buf + mmesa->vert_used);
mmesa->vert_used += bytes;
return head;
}
static INLINE void *mach64AllocDmaLocked( mach64ContextPtr mmesa, int bytes )
{
CARD32 *head;
if ( mmesa->vert_used + bytes > mmesa->vert_total ) {
mach64FlushVerticesLocked( mmesa );
}
head = (CARD32 *)((char *)mmesa->vert_buf + mmesa->vert_used);
mmesa->vert_used += bytes;
return head;
}
extern void mach64FireBlitLocked( mach64ContextPtr mmesa, void *buffer,
GLint offset, GLint pitch, GLint format,
GLint x, GLint y, GLint width, GLint height );
extern void mach64CopyBuffer( __DRIdrawable *dPriv );
#if ENABLE_PERF_BOXES
extern void mach64PerformanceCounters( mach64ContextPtr mmesa );
extern void mach64PerformanceBoxesLocked( mach64ContextPtr mmesa );
#endif
extern void mach64WaitForIdleLocked( mach64ContextPtr mmesa );
extern void mach64InitIoctlFuncs( struct dd_function_table *functions );
/* ================================================================
* Helper macros:
*/
#define FLUSH_BATCH( mmesa ) \
do { \
if ( MACH64_DEBUG & DEBUG_VERBOSE_IOCTL ) \
fprintf( stderr, "FLUSH_BATCH in %s\n", __FUNCTION__ ); \
if ( mmesa->vert_used ) { \
mach64FlushVertices( mmesa ); \
} \
} while (0)
/* According to a comment in ATIMach64Sync (atimach64.c) in the DDX:
*
* "For VTB's and later, the first CPU read of the framebuffer will return
* zeroes [...] This appears to be due to some kind of engine
* caching of framebuffer data I haven't found any way of disabling, or
* otherwise circumventing."
*/
#define FINISH_DMA_LOCKED( mmesa ) \
do { \
CARD32 _tmp; \
if ( MACH64_DEBUG & DEBUG_VERBOSE_IOCTL ) \
fprintf( stderr, "FINISH_DMA_LOCKED in %s\n", __FUNCTION__ ); \
if ( mmesa->vert_used ) { \
mach64FlushVerticesLocked( mmesa ); \
} \
mach64WaitForIdleLocked( mmesa ); \
/* pre-read framebuffer to counter caching problem */ \
_tmp = *(volatile CARD32 *)mmesa->driScreen->pFB; \
} while (0)
#define FLUSH_DMA_LOCKED( mmesa ) \
do { \
if ( MACH64_DEBUG & DEBUG_VERBOSE_IOCTL ) \
fprintf( stderr, "FLUSH_DMA_LOCKED in %s\n", __FUNCTION__ ); \
if ( mmesa->vert_used ) { \
mach64FlushVerticesLocked( mmesa ); \
} \
mach64FlushDMALocked( mmesa ); \
} while (0)
#define mach64FlushVertices( mmesa ) \
do { \
LOCK_HARDWARE( mmesa ); \
mach64FlushVerticesLocked( mmesa ); \
UNLOCK_HARDWARE( mmesa ); \
} while (0)
#define mach64WaitForIdle( mmesa ) \
do { \
LOCK_HARDWARE( mmesa ); \
mach64WaitForIdleLocked( mmesa ); \
UNLOCK_HARDWARE( mmesa ); \
} while (0)
#endif /* __MACH64_IOCTL_H__ */

95
src/mesa/drivers/dri/mach64/mach64_lock.c
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@ -1,95 +0,0 @@
/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "mach64_context.h"
#include "mach64_state.h"
#include "mach64_lock.h"
#include "drirenderbuffer.h"
#if DEBUG_LOCKING
char *prevLockFile = NULL;
int prevLockLine = 0;
#endif
/* Update the hardware state. This is called if another context has
* grabbed the hardware lock, which includes the X server. This
* function also updates the driver's window state after the X server
* moves, resizes or restacks a window -- the change will be reflected
* in the drawable position and clip rects. Since the X server grabs
* the hardware lock when it changes the window state, this routine will
* automatically be called after such a change.
*/
void mach64GetLock( mach64ContextPtr mmesa, GLuint flags )
{
__DRIdrawable *dPriv = mmesa->driDrawable;
__DRIscreen *sPriv = mmesa->driScreen;
drm_mach64_sarea_t *sarea = mmesa->sarea;
int i;
drmGetLock( mmesa->driFd, mmesa->hHWContext, flags );
/* The window might have moved, so we might need to get new clip
* rects.
*
* NOTE: This releases and regrabs the hw lock to allow the X server
* to respond to the DRI protocol request for new drawable info.
* Since the hardware state depends on having the latest drawable
* clip rects, all state checking must be done _after_ this call.
*/
DRI_VALIDATE_DRAWABLE_INFO( sPriv, dPriv );
if ( mmesa->lastStamp != dPriv->lastStamp ) {
mmesa->lastStamp = dPriv->lastStamp;
if (mmesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT)
mach64SetCliprects( mmesa->glCtx, GL_BACK_LEFT );
else
mach64SetCliprects( mmesa->glCtx, GL_FRONT_LEFT );
driUpdateFramebufferSize( mmesa->glCtx, dPriv );
mach64CalcViewport( mmesa->glCtx );
}
mmesa->dirty |= (MACH64_UPLOAD_CONTEXT
| MACH64_UPLOAD_MISC
| MACH64_UPLOAD_CLIPRECTS);
/* EXA render acceleration uses the texture engine, so restore it */
mmesa->dirty |= (MACH64_UPLOAD_TEXTURE);
if ( sarea->ctx_owner != mmesa->hHWContext ) {
sarea->ctx_owner = mmesa->hHWContext;
mmesa->dirty = MACH64_UPLOAD_ALL;
}
for ( i = mmesa->firstTexHeap ; i < mmesa->lastTexHeap ; i++ ) {
DRI_AGE_TEXTURES( mmesa->texture_heaps[i] );
}
}

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
*
*/
#ifndef __MACH64_LOCK_H__
#define __MACH64_LOCK_H__
extern void mach64GetLock( mach64ContextPtr mmesa, GLuint flags );
/* Turn DEBUG_LOCKING on to find locking conflicts.
*/
#define DEBUG_LOCKING 1
#if DEBUG_LOCKING
extern char *prevLockFile;
extern int prevLockLine;
#define DEBUG_LOCK() \
do { \
prevLockFile = (__FILE__); \
prevLockLine = (__LINE__); \
} while (0)
#define DEBUG_RESET() \
do { \
prevLockFile = 0; \
prevLockLine = 0; \
} while (0)
#define DEBUG_CHECK_LOCK() \
do { \
if ( prevLockFile ) { \
fprintf( stderr, \
"LOCK SET!\n\tPrevious %s:%d\n\tCurrent: %s:%d\n", \
prevLockFile, prevLockLine, __FILE__, __LINE__ ); \
exit( 1 ); \
} \
} while (0)
#else
#define DEBUG_LOCK()
#define DEBUG_RESET()
#define DEBUG_CHECK_LOCK()
#endif
/*
* !!! We may want to separate locks from locks with validation. This
* could be used to improve performance for those things commands that
* do not do any drawing !!!
*/
/* Lock the hardware and validate our state.
*/
#define LOCK_HARDWARE( mmesa ) \
do { \
char __ret = 0; \
DEBUG_CHECK_LOCK(); \
DRM_CAS( mmesa->driHwLock, mmesa->hHWContext, \
(DRM_LOCK_HELD | mmesa->hHWContext), __ret ); \
if ( __ret ) \
mach64GetLock( mmesa, 0 ); \
DEBUG_LOCK(); \
} while (0)
/* Unlock the hardware.
*/
#define UNLOCK_HARDWARE( mmesa ) \
do { \
DRM_UNLOCK( mmesa->driFd, \
mmesa->driHwLock, \
mmesa->hHWContext ); \
DEBUG_RESET(); \
} while (0)
#endif /* __MACH64_LOCK_H__ */

257
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Mesa 3-D graphics library
* Version: 3.5
*
* Copyright (C) 1999-2001 Brian Paul All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Original authors:
* Keith Whitwell <keithw@valinux.com>
*
* Adapted to Mach64 by:
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "math/m_translate.h"
#ifndef LOCALVARS
#define LOCALVARS
#endif
void TAG(translate_vertex)(struct gl_context *ctx,
const VERTEX *src,
SWvertex *dst)
{
LOCALVARS
GLuint format = GET_VERTEX_FORMAT();
UNVIEWPORT_VARS;
CARD32 *p = (CARD32 *)src + 10 - mmesa->vertex_size;
dst->attrib[FRAG_ATTRIB_WPOS][3] = 1.0;
switch ( format ) {
case TEX1_VERTEX_FORMAT:
#ifdef MACH64_PREMULT_TEXCOORDS
{
float rhw = 1.0 / LE32_IN_FLOAT( p + 2 );
dst->attrib[FRAG_ATTRIB_TEX1][0] = rhw*LE32_IN_FLOAT( p++ );
dst->attrib[FRAG_ATTRIB_TEX1][1] = rhw*LE32_IN_FLOAT( p++ );
}
#else
dst->attrib[FRAG_ATTRIB_TEX1][0] = LE32_IN_FLOAT( p++ );
dst->attrib[FRAG_ATTRIB_TEX1][1] = LE32_IN_FLOAT( p++ );
#endif
dst->attrib[FRAG_ATTRIB_TEX1][3] = 1.0;
p++;
case TEX0_VERTEX_FORMAT:
#ifdef MACH64_PREMULT_TEXCOORDS
{
float rhw = 1.0 / LE32_IN_FLOAT( p + 2 );
dst->attrib[FRAG_ATTRIB_TEX0][0] = rhw*LE32_IN_FLOAT( p++ );
dst->attrib[FRAG_ATTRIB_TEX0][1] = rhw*LE32_IN_FLOAT( p++ );
}
#else
dst->attrib[FRAG_ATTRIB_TEX0][0] = LE32_IN_FLOAT( p++ );
dst->attrib[FRAG_ATTRIB_TEX0][1] = LE32_IN_FLOAT( p++ );
#endif
dst->attrib[FRAG_ATTRIB_TEX0][3] = 1.0;
dst->attrib[FRAG_ATTRIB_WPOS][3] = LE32_IN_FLOAT( p++ );
case NOTEX_VERTEX_FORMAT:
dst->attrib[FRAG_ATTRIB_COL1][2] = UBYTE_TO_FLOAT(((GLubyte *)p)[0]);
dst->attrib[FRAG_ATTRIB_COL1][1] = UBYTE_TO_FLOAT(((GLubyte *)p)[1]);
dst->attrib[FRAG_ATTRIB_COL1][0] = UBYTE_TO_FLOAT(((GLubyte *)p)[2]);
dst->attrib[FRAG_ATTRIB_FOGC][0] = ((GLubyte *)p)[3]; /*XXX int->float?*/
p++;
case TINY_VERTEX_FORMAT:
dst->attrib[FRAG_ATTRIB_WPOS][2] = UNVIEWPORT_Z( LE32_IN( p++ ) );
dst->color[2] = ((GLubyte *)p)[0];
dst->color[1] = ((GLubyte *)p)[1];
dst->color[0] = ((GLubyte *)p)[2];
dst->color[3] = ((GLubyte *)p)[3];
p++;
{
GLuint xy = LE32_IN( p );
dst->attrib[FRAG_ATTRIB_WPOS][0] = UNVIEWPORT_X( (GLfloat)(GLshort)( xy >> 16 ) );
dst->attrib[FRAG_ATTRIB_WPOS][1] = UNVIEWPORT_Y( (GLfloat)(GLshort)( xy & 0xffff ) );
}
}
assert( p + 1 - (CARD32 *)src == 10 );
dst->pointSize = ctx->Point.Size;
}
void TAG(print_vertex)( struct gl_context *ctx, const VERTEX *v )
{
LOCALVARS
GLuint format = GET_VERTEX_FORMAT();
CARD32 *p = (CARD32 *)v + 10 - mmesa->vertex_size;
switch ( format ) {
case TEX1_VERTEX_FORMAT:
{
GLfloat u, v, w;
#ifdef MACH64_PREMULT_TEXCOORDS
float rhw = 1.0 / LE32_IN_FLOAT( p + 2 );
u = rhw*LE32_IN_FLOAT( p++ );
v = rhw*LE32_IN_FLOAT( p++ );
#else
u = LE32_IN_FLOAT( p++ );
v = LE32_IN_FLOAT( p++ );
#endif
w = LE32_IN_FLOAT( p++ );
fprintf( stderr, "u1 %f v1 %f w1 %f\n", u, v, w );
}
case TEX0_VERTEX_FORMAT:
{
GLfloat u, v, w;
#ifdef MACH64_PREMULT_TEXCOORDS
float rhw = 1.0 / LE32_IN_FLOAT( p + 2 );
u = rhw*LE32_IN_FLOAT( p++ );
v = rhw*LE32_IN_FLOAT( p++ );
#else
u = LE32_IN_FLOAT( p++ );
v = LE32_IN_FLOAT( p++ );
#endif
w = LE32_IN_FLOAT( p++ );
fprintf( stderr, "u0 %f v0 %f w0 %f\n", u, v, w );
}
case NOTEX_VERTEX_FORMAT:
{
GLubyte r, g, b, a;
b = ((GLubyte *)p)[0];
g = ((GLubyte *)p)[1];
r = ((GLubyte *)p)[2];
a = ((GLubyte *)p)[3];
p++;
fprintf(stderr, "spec: r %d g %d b %d a %d\n", r, g, b, a);
}
case TINY_VERTEX_FORMAT:
{
GLuint xy;
GLfloat x, y, z;
GLubyte r, g, b, a;
z = LE32_IN( p++ ) / 65536.0;
b = ((GLubyte *)p)[0];
g = ((GLubyte *)p)[1];
r = ((GLubyte *)p)[2];
a = ((GLubyte *)p)[3];
p++;
xy = LE32_IN( p );
x = (GLfloat)(GLshort)( xy >> 16 ) / 4.0;
y = (GLfloat)(GLshort)( xy & 0xffff ) / 4.0;
fprintf(stderr, "x %f y %f z %f\n", x, y, z);
fprintf(stderr, "r %d g %d b %d a %d\n", r, g, b, a);
}
}
assert( p + 1 - (CARD32 *)v == 10 );
fprintf(stderr, "\n");
}
/* Interpolate the elements of the VB not included in typical hardware
* vertices.
*
* NOTE: All these arrays are guarenteed by tnl to be writeable and
* have good stride.
*/
#ifndef INTERP_QUALIFIER
#define INTERP_QUALIFIER static
#endif
#define GET_COLOR(ptr, idx) ((ptr)->data[idx])
INTERP_QUALIFIER void TAG(interp_extras)( struct gl_context *ctx,
GLfloat t,
GLuint dst, GLuint out, GLuint in,
GLboolean force_boundary )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
if (VB->BackfaceColorPtr) {
assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));
INTERP_4F( t,
GET_COLOR(VB->BackfaceColorPtr, dst),
GET_COLOR(VB->BackfaceColorPtr, out),
GET_COLOR(VB->BackfaceColorPtr, in) );
if (VB->BackfaceSecondaryColorPtr) {
INTERP_3F( t,
GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
GET_COLOR(VB->BackfaceSecondaryColorPtr, out),
GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );
}
}
if (VB->EdgeFlag) {
VB->EdgeFlag[dst] = VB->EdgeFlag[out] || force_boundary;
}
INTERP_VERTEX(ctx, t, dst, out, in, force_boundary);
}
INTERP_QUALIFIER void TAG(copy_pv_extras)( struct gl_context *ctx,
GLuint dst, GLuint src )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
if (VB->BackfaceColorPtr) {
COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst),
GET_COLOR(VB->BackfaceColorPtr, src) );
if (VB->BackfaceSecondaryColorPtr) {
COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );
}
}
COPY_PV_VERTEX(ctx, dst, src);
}
#undef INTERP_QUALIFIER
#undef GET_COLOR
#undef IND
#undef TAG

562
src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Mesa 3-D graphics library
* Version: 3.5
*
* Copyright (C) 1999-2001 Brian Paul All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Original authors:
* Keith Whitwell <keithw@valinux.com>
*
* Adapted to Mach64 by:
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
/* DO_XYZW: Emit xyz and maybe w coordinates.
* DO_RGBA: Emit color.
* DO_SPEC: Emit specular color.
* DO_FOG: Emit fog coordinate in specular alpha.
* DO_TEX0: Emit tex0 u,v coordinates.
* DO_TEX1: Emit tex1 u,v coordinates.
* DO_PTEX: Emit tex0,1 q coordinates where possible.
*
* Additionally, this template assumes it is emitting *transformed*
* vertices; the modifications to emit untransformed vertices (ie. to
* t&l hardware) are probably too great to cooexist with the code
* already in this file.
*/
#define VIEWPORT_X(x) ((GLint) ((s[0] * (x) + s[12]) * 4.0))
#define VIEWPORT_Y(y) ((GLint) ((s[5] * (y) + s[13]) * 4.0))
#define VIEWPORT_Z(z) (((GLuint) (s[10] * (z) + s[14])) << 15)
#ifndef LOCALVARS
#define LOCALVARS
#endif
static void TAG(emit)( struct gl_context *ctx,
GLuint start, GLuint end,
void *dest,
GLuint stride )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
#if DO_TEX1
GLfloat (*tc1)[4];
GLuint tc1_stride;
#if DO_PTEX
GLuint tc1_size;
#endif
#endif
#if DO_TEX0
GLfloat (*tc0)[4];
GLuint tc0_stride;
#if DO_PTEX
GLuint tc0_size;
#endif
#endif
#if DO_SPEC
GLfloat (*spec)[4];
GLuint spec_stride;
#endif
#if DO_FOG
GLfloat (*fog)[4];
GLuint fog_stride;
#endif
#if DO_RGBA
GLfloat (*col)[4];
GLuint col_stride;
#endif
GLfloat (*coord)[4];
GLuint coord_stride;
VERTEX *v = (VERTEX *)dest;
const GLfloat *s = GET_VIEWPORT_MAT();
#if DO_TEX1 || DO_TEX0 || DO_XYZW
const GLubyte *mask = VB->ClipMask;
#endif
int i;
#if !DO_XYZW
(void) s; /* Quiet compiler */
#endif
/* fprintf(stderr, "%s(big) importable %d %d..%d\n", */
/* __FUNCTION__, VB->importable_data, start, end); */
#if DO_TEX1
{
const GLuint t1 = GET_TEXSOURCE(1);
tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
#if DO_PTEX
tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;
#endif
}
#endif
#if DO_TEX0
{
const GLuint t0 = GET_TEXSOURCE(0);
tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
#if DO_PTEX
tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;
#endif
}
#endif
#if DO_SPEC
if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
}
#endif
#if DO_FOG
if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
static GLfloat tmp[4] = {0, 0, 0, 0};
fog = &tmp;
fog_stride = 0;
}
#endif
#if DO_RGBA
col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
#endif
coord = VB->NdcPtr->data;
coord_stride = VB->NdcPtr->stride;
if (start) {
#if DO_TEX1
STRIDE_4F(tc1, start * tc1_stride);
#endif
#if DO_TEX0
STRIDE_4F(tc0, start * tc0_stride);
#endif
#if DO_SPEC
STRIDE_4F(spec, start * spec_stride);
#endif
#if DO_FOG
STRIDE_4F(fog, start * fog_stride);
#endif
#if DO_RGBA
STRIDE_4F(col, start * col_stride);
#endif
STRIDE_4F(coord, start * coord_stride);
}
for (i=start; i < end; i++, v = (VERTEX *)((GLubyte *)v + stride)) {
CARD32 *p = (CARD32 *)v;
#if DO_TEX1 || DO_TEX0
GLfloat w;
if (mask[i] == 0) {
/* unclipped */
w = coord[0][3];
} else {
/* clipped */
w = 1.0;
}
#endif
#if DO_TEX1
#if DO_PTEX
if (tc1_size == 4) {
#ifdef MACH64_PREMULT_TEXCOORDS
LE32_OUT_FLOAT( p++, w*tc1[0][0] ); /* VERTEX_?_SECONDARY_S */
LE32_OUT_FLOAT( p++, w*tc1[0][1] ); /* VERTEX_?_SECONDARY_T */
LE32_OUT_FLOAT( p++, w*tc1[0][3] ); /* VERTEX_?_SECONDARY_W */
#else /* !MACH64_PREMULT_TEXCOORDS */
float rhw = 1.0 / tc1[0][3];
LE32_OUT_FLOAT( p++, rhw*tc1[0][0] ); /* VERTEX_?_SECONDARY_S */
LE32_OUT_FLOAT( p++, rhw*tc1[0][1] ); /* VERTEX_?_SECONDARY_T */
LE32_OUT_FLOAT( p++, w*tc1[0][3] ); /* VERTEX_?_SECONDARY_W */
#endif /* !MACH64_PREMULT_TEXCOORDS */
} else {
#endif /* DO_PTEX */
#ifdef MACH64_PREMULT_TEXCOORDS
LE32_OUT_FLOAT( p++, w*tc1[0][0] ); /* VERTEX_?_SECONDARY_S */
LE32_OUT_FLOAT( p++, w*tc1[0][1] ); /* VERTEX_?_SECONDARY_T */
LE32_OUT_FLOAT( p++, w ); /* VERTEX_?_SECONDARY_W */
#else /* !MACH64_PREMULT_TEXCOORDS */
LE32_OUT_FLOAT( p++, tc1[0][0] ); /* VERTEX_?_SECONDARY_S */
LE32_OUT_FLOAT( p++, tc1[0][1] ); /* VERTEX_?_SECONDARY_T */
LE32_OUT_FLOAT( p++, w ); /* VERTEX_?_SECONDARY_W */
#endif /* !MACH64_PREMULT_TEXCOORDS */
#if DO_PTEX
}
#endif /* DO_PTEX */
STRIDE_4F(tc1, tc1_stride);
#else /* !DO_TEX1 */
p += 3;
#endif /* !DO_TEX1 */
#if DO_TEX0
#if DO_PTEX
if (tc0_size == 4) {
#ifdef MACH64_PREMULT_TEXCOORDS
LE32_OUT_FLOAT( p++, w*tc0[0][0] ); /* VERTEX_?_S */
LE32_OUT_FLOAT( p++, w*tc0[0][1] ); /* VERTEX_?_T */
LE32_OUT_FLOAT( p++, w*tc0[0][3] ); /* VERTEX_?_W */
#else /* !MACH64_PREMULT_TEXCOORDS */
float rhw = 1.0 / tc0[0][3];
LE32_OUT_FLOAT( p++, rhw*tc0[0][0] ); /* VERTEX_?_S */
LE32_OUT_FLOAT( p++, rhw*tc0[0][1] ); /* VERTEX_?_T */
LE32_OUT_FLOAT( p++, w*tc0[0][3] ); /* VERTEX_?_W */
#endif /* !MACH64_PREMULT_TEXCOORDS */
} else {
#endif /* DO_PTEX */
#ifdef MACH64_PREMULT_TEXCOORDS
LE32_OUT_FLOAT( p++, w*tc0[0][0] ); /* VERTEX_?_S */
LE32_OUT_FLOAT( p++, w*tc0[0][1] ); /* VERTEX_?_T */
LE32_OUT_FLOAT( p++, w ); /* VERTEX_?_W */
#else /* !MACH64_PREMULT_TEXCOORDS */
LE32_OUT_FLOAT( p++, tc0[0][0] ); /* VERTEX_?_S */
LE32_OUT_FLOAT( p++, tc0[0][1] ); /* VERTEX_?_T */
LE32_OUT_FLOAT( p++, w ); /* VERTEX_?_W */
#endif /* !MACH64_PREMULT_TEXCOORDS */
#if DO_PTEX
}
#endif /* DO_PTEX */
STRIDE_4F(tc0, tc0_stride);
#else /* !DO_TEX0 */
p += 3;
#endif /* !DO_TEX0 */
#if DO_SPEC
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[0], spec[0][2]); /* VERTEX_?_SPEC_B */
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[1], spec[0][1]); /* VERTEX_?_SPEC_G */
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[2], spec[0][0]); /* VERTEX_?_SPEC_R */
STRIDE_4F(spec, spec_stride);
#endif
#if DO_FOG
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[3], fog[0][0]); /* VERTEX_?_SPEC_A */
/* ((GLubyte *)p)[3] = fog[0][0] * 255.0; */
STRIDE_4F(fog, fog_stride);
#endif
p++;
#if DO_XYZW
if (mask[i] == 0) {
/* unclipped */
LE32_OUT( p++, VIEWPORT_Z( coord[0][2] ) ); /* VERTEX_?_Z */
} else {
#endif
p++;
#if DO_XYZW
}
#endif
#if DO_RGBA
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[0], col[0][2]);
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[1], col[0][1]);
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[2], col[0][0]);
UNCLAMPED_FLOAT_TO_UBYTE(((GLubyte *)p)[3], col[0][3]);
p++;
STRIDE_4F(col, col_stride);
#else
p++;
#endif
#if DO_XYZW
if (mask[i] == 0) {
/* unclipped */
LE32_OUT( p,
(VIEWPORT_X( coord[0][0] ) << 16) | /* VERTEX_?_X */
(VIEWPORT_Y( coord[0][1] ) & 0xffff) ); /* VERTEX_?_Y */
if (MACH64_DEBUG & DEBUG_VERBOSE_PRIMS) {
fprintf( stderr, "%s: vert %d: %.2f %.2f %.2f %x\n",
__FUNCTION__,
i,
(LE32_IN( p ) >> 16)/4.0,
(LE32_IN( p ) & 0xffff)/4.0,
LE32_IN( p - 2 )/65536.0,
*(GLuint *)(p - 1) );
}
}
#endif
#if DO_TEX1 || DO_TEX0 || DO_XYZW
STRIDE_4F(coord, coord_stride);
#endif
assert( p + 1 - (CARD32 *)v == 10 );
}
}
#if DO_XYZW && DO_RGBA
static GLboolean TAG(check_tex_sizes)( struct gl_context *ctx )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
/* Force 'missing' texcoords to something valid.
*/
if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
/* No hardware support for projective texture. Can fake it for
* TEX0 only.
*/
if ((DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {
PTEX_FALLBACK();
return GL_FALSE;
}
if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {
if (DO_TEX1) {
PTEX_FALLBACK();
}
return GL_FALSE;
}
return GL_TRUE;
}
static void TAG(interp)( struct gl_context *ctx,
GLfloat t,
GLuint edst, GLuint eout, GLuint ein,
GLboolean force_boundary )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
GLubyte *ddverts = GET_VERTEX_STORE();
GLuint size = GET_VERTEX_SIZE();
const GLfloat *dstclip = VB->ClipPtr->data[edst];
GLfloat w;
const GLfloat *s = GET_VIEWPORT_MAT();
CARD32 *dst = (CARD32 *)(ddverts + (edst * size));
CARD32 *in = (CARD32 *)(ddverts + (ein * size));
CARD32 *out = (CARD32 *)(ddverts + (eout * size));
(void)s;
w = (dstclip[3] == 0.0F) ? 1.0 : (1.0 / dstclip[3]);
#if DO_TEX1
{
GLfloat temp;
#if DO_PTEX
GLfloat wout = VB->NdcPtr->data[eout][3];
GLfloat win = VB->NdcPtr->data[ein][3];
GLfloat qout = LE32_IN_FLOAT( out + 2 ) / wout;
GLfloat qin = LE32_IN_FLOAT( in + 2 ) / win;
GLfloat qdst, rqdst;
INTERP_F( t, qdst, qout, qin );
rqdst = 1.0 / qdst;
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp*rqdst ); /* VERTEX_?_SECONDARY_S */
dst++; out++; in++;
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp*rqdst ); /* VERTEX_?_SECONDARY_T */
dst++; out++; in++;
LE32_OUT_FLOAT( dst, w*rqdst ); /* VERTEX_?_SECONDARY_W */
dst++; out++; in++;
#else /* !DO_PTEX */
#ifdef MACH64_PREMULT_TEXCOORDS
GLfloat qout = w / LE32_IN_FLOAT( out + 2 );
GLfloat qin = w / LE32_IN_FLOAT( in + 2 );
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_SECONDARY_S */
dst++; out++; in++;
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_SECONDARY_T */
dst++; out++; in++;
#else /* !MACH64_PREMULT_TEXCOORDS */
INTERP_F( t, temp, LE32_IN_FLOAT( out ), LE32_IN_FLOAT( in ) );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_SECONDARY_S */
dst++; out++; in++;
INTERP_F( t, temp, LE32_IN_FLOAT( out ), LE32_IN_FLOAT( in ) );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_SECONDARY_T */
dst++; out++; in++;
#endif /* !MACH64_PREMULT_TEXCOORDS */
LE32_OUT_FLOAT( dst, w ); /* VERTEX_?_SECONDARY_W */
dst++; out++; in++;
#endif /* !DO_PTEX */
}
#else /* !DO_TEX1 */
dst += 3; out += 3; in += 3;
#endif /* !DO_TEX1 */
#if DO_TEX0
{
GLfloat temp;
#if DO_PTEX
GLfloat wout = VB->NdcPtr->data[eout][3];
GLfloat win = VB->NdcPtr->data[ein][3];
GLfloat qout = LE32_IN_FLOAT( out + 2 ) / wout;
GLfloat qin = LE32_IN_FLOAT( in + 2 ) / win;
GLfloat qdst, rqdst;
INTERP_F( t, qdst, qout, qin );
rqdst = 1.0 / qdst;
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp*rqdst ); /* VERTEX_?_S */
dst++; out++; in++;
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp*rqdst ); /* VERTEX_?_T */
dst++; out++; in++;
LE32_OUT_FLOAT( dst, w*rqdst ); /* VERTEX_?_W */
dst++; out++; in++;
#else /* !DO_PTEX */
#ifdef MACH64_PREMULT_TEXCOORDS
GLfloat qout = w / LE32_IN_FLOAT( out + 2 );
GLfloat qin = w / LE32_IN_FLOAT( in + 2 );
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_S */
dst++; out++; in++;
INTERP_F( t, temp, LE32_IN_FLOAT( out ) * qout, LE32_IN_FLOAT( in ) * qin );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_T */
dst++; out++; in++;
#else /* !MACH64_PREMULT_TEXCOORDS */
INTERP_F( t, temp, LE32_IN_FLOAT( out ), LE32_IN_FLOAT( in ) );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_S */
dst++; out++; in++;
INTERP_F( t, temp, LE32_IN_FLOAT( out ), LE32_IN_FLOAT( in ) );
LE32_OUT_FLOAT( dst, temp ); /* VERTEX_?_T */
dst++; out++; in++;
#endif /* !MACH64_PREMULT_TEXCOORDS */
LE32_OUT_FLOAT( dst, w ); /* VERTEX_?_W */
dst++; out++; in++;
#endif /* !DO_PTEX */
}
#else /* !DO_TEX0 */
dst += 3; out += 3; in += 3;
#endif /* !DO_TEX0 */
#if DO_SPEC
INTERP_UB( t, ((GLubyte *)dst)[0], ((GLubyte *)out)[0], ((GLubyte *)in)[0] ); /* VERTEX_?_SPEC_B */
INTERP_UB( t, ((GLubyte *)dst)[1], ((GLubyte *)out)[1], ((GLubyte *)in)[1] ); /* VERTEX_?_SPEC_G */
INTERP_UB( t, ((GLubyte *)dst)[2], ((GLubyte *)out)[2], ((GLubyte *)in)[2] ); /* VERTEX_?_SPEC_R */
#endif
#if DO_FOG
INTERP_UB( t, ((GLubyte *)dst)[3], ((GLubyte *)out)[3], ((GLubyte *)in)[3] ); /* VERTEX_?_SPEC_A */
#endif /* DO_FOG */
dst++; out++; in++;
LE32_OUT( dst, VIEWPORT_Z( dstclip[2] * w ) ); /* VERTEX_?_Z */
dst++; out++; in++;
INTERP_UB( t, ((GLubyte *)dst)[0], ((GLubyte *)out)[0], ((GLubyte *)in)[0] ); /* VERTEX_?_B */
INTERP_UB( t, ((GLubyte *)dst)[1], ((GLubyte *)out)[1], ((GLubyte *)in)[1] ); /* VERTEX_?_G */
INTERP_UB( t, ((GLubyte *)dst)[2], ((GLubyte *)out)[2], ((GLubyte *)in)[2] ); /* VERTEX_?_R */
INTERP_UB( t, ((GLubyte *)dst)[3], ((GLubyte *)out)[3], ((GLubyte *)in)[3] ); /* VERTEX_?_A */
dst++; /*out++; in++;*/
LE32_OUT( dst,
(VIEWPORT_X( dstclip[0] * w ) << 16) | /* VERTEX_?_X */
(VIEWPORT_Y( dstclip[1] * w ) & 0xffff) ); /* VERTEX_?_Y */
assert( dst + 1 - (CARD32 *)(ddverts + (edst * size)) == 10 );
assert( in + 2 - (CARD32 *)(ddverts + (ein * size)) == 10 );
assert( out + 2 - (CARD32 *)(ddverts + (eout * size)) == 10 );
if (MACH64_DEBUG & DEBUG_VERBOSE_PRIMS) {
fprintf( stderr, "%s: dst vert: %.2f %.2f %.2f %x\n",
__FUNCTION__,
(GLshort)(LE32_IN( dst ) >> 16)/4.0,
(GLshort)(LE32_IN( dst ) & 0xffff)/4.0,
LE32_IN( dst - 2 )/65536.0,
*(GLuint *)(dst - 1) );
}
}
#endif /* DO_RGBA && DO_XYZW */
static void TAG(copy_pv)( struct gl_context *ctx, GLuint edst, GLuint esrc )
{
#if DO_SPEC || DO_FOG || DO_RGBA
LOCALVARS
GLubyte *verts = GET_VERTEX_STORE();
GLuint size = GET_VERTEX_SIZE();
GLuint *dst = (GLuint *)(verts + (edst * size));
GLuint *src = (GLuint *)(verts + (esrc * size));
#endif
#if DO_SPEC || DO_FOG
dst[6] = src[6]; /* VERTEX_?_SPEC_ARGB */
#endif
#if DO_RGBA
dst[8] = src[8]; /* VERTEX_?_ARGB */
#endif
}
static void TAG(init)( void )
{
setup_tab[IND].emit = TAG(emit);
#if DO_XYZW && DO_RGBA
setup_tab[IND].check_tex_sizes = TAG(check_tex_sizes);
setup_tab[IND].interp = TAG(interp);
#endif
setup_tab[IND].copy_pv = TAG(copy_pv);
#if DO_TEX1
setup_tab[IND].vertex_format = TEX1_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 10;
#elif DO_TEX0
setup_tab[IND].vertex_format = TEX0_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 7;
#elif DO_SPEC || DO_FOG
setup_tab[IND].vertex_format = NOTEX_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 4;
#else
setup_tab[IND].vertex_format = TINY_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 3;
#endif
}
#undef IND
#undef TAG

406
src/mesa/drivers/dri/mach64/mach64_reg.h
View File

@ -1,406 +0,0 @@
/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#ifndef __MACH64_REG_H__
#define __MACH64_REG_H__
/*
* Not sure how this compares with the G200, but the Rage Pro has two
* banks of registers, with bank 0 at (aperture base + memmap offset - 1KB)
* and bank 1 at (aperture base + memmap offset - 2KB). But, to send them
* via DMA, we need to encode them as memory map select rather than physical
* offsets.
*/
#define DWMREG0 0x0400
#define DWMREG0_END 0x07ff
#define DWMREG1 0x0000
#define DWMREG1_END 0x03ff
#define ISREG0(r) ( ( (r) >= DWMREG0 ) && ( (r) <= DWMREG0_END ) )
#define ADRINDEX0(r) ( ((r) - DWMREG0) >> 2 )
#define ADRINDEX1(r) ( ( ((r) - DWMREG1) >> 2 ) | 0x0100 )
#define ADRINDEX(r) ( ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r) )
#define MMREG0 0x0000
#define MMREG0_END 0x00ff
#define ISMMREG0(r) ( ( (r) >= MMREG0 ) && ( (r) <= MMREG0_END ) )
#define MMSELECT0(r) ( ((r)<<2) + DWMREG0 )
#define MMSELECT1(r) ( ( (((r) & 0xff)<<2) + DWMREG1 ) )
#define MMSELECT(r) ( ISMMREG0(r) ? MMSELECT0(r) : MMSELECT1(r) )
/* FIXME: If register reads are necessary, we should account for endianess here */
#define MACH64_BASE(reg) ((CARD32)(mmesa->mach64Screen->mmio.map))
#define MACH64_ADDR(reg) (MACH64_BASE(reg) + reg)
#define MACH64_DEREF(reg) *(__volatile__ CARD32 *)MACH64_ADDR(reg)
#define MACH64_READ(reg) MACH64_DEREF(reg)
/* ================================================================
* Registers
*/
#define MACH64_ALPHA_TST_CNTL 0x0550
# define MACH64_ALPHA_TEST_EN (1 << 0)
# define MACH64_ALPHA_TEST_MASK (7 << 4)
# define MACH64_ALPHA_TEST_NEVER (0 << 4)
# define MACH64_ALPHA_TEST_LESS (1 << 4)
# define MACH64_ALPHA_TEST_LEQUAL (2 << 4)
# define MACH64_ALPHA_TEST_EQUAL (3 << 4)
# define MACH64_ALPHA_TEST_GEQUAL (4 << 4)
# define MACH64_ALPHA_TEST_GREATER (5 << 4)
# define MACH64_ALPHA_TEST_NOTEQUAL (6 << 4)
# define MACH64_ALPHA_TEST_ALWAYS (7 << 4)
# define MACH64_ALPHA_MOD_MSB (1 << 7)
# define MACH64_ALPHA_DST_MASK (7 << 8)
# define MACH64_ALPHA_DST_ZERO (0 << 8)
# define MACH64_ALPHA_DST_ONE (1 << 8)
# define MACH64_ALPHA_DST_SRCALPHA (4 << 8)
# define MACH64_ALPHA_DST_INVSRCALPHA (5 << 8)
# define MACH64_ALPHA_DST_DSTALPHA (6 << 8)
# define MACH64_ALPHA_DST_INVDSTALPHA (7 << 8)
# define MACH64_ALPHA_TST_SRC_TEXEL (0 << 12)
# define MACH64_ALPHA_TST_SRC_SRCALPHA (1 << 12)
# define MACH64_REF_ALPHA_MASK (0xff << 16)
# define MACH64_REF_ALPHA_SHIFT 16
# define MACH64_COMPOSITE_SHADOW (1 << 30)
# define MACH64_SPECULAR_LIGHT_EN (1 << 31)
#define MACH64_BUS_CNTL 0x04a0
# define MACH64_BUS_MSTR_RESET (1 << 1)
# define MACH64_BUS_FLUSH_BUF (1 << 2)
# define MACH64_BUS_MASTER_DIS (1 << 6)
# define MACH64_BUS_EXT_REG_EN (1 << 27)
#define MACH64_COMPOSITE_SHADOW_ID 0x0798
#define MACH64_CLR_CMP_CLR 0x0700
#define MACH64_CLR_CMP_CNTL 0x0708
#define MACH64_CLR_CMP_MASK 0x0704
#define MACH64_DP_BKGD_CLR 0x06c0
#define MACH64_DP_FOG_CLR 0x06c4
#define MACH64_DP_FGRD_BKGD_CLR 0x06e0
#define MACH64_DP_FRGD_CLR 0x06c4
#define MACH64_DP_FGRD_CLR_MIX 0x06dc
#define MACH64_DP_MIX 0x06d4
# define BKGD_MIX_NOT_D (0 << 0)
# define BKGD_MIX_ZERO (1 << 0)
# define BKGD_MIX_ONE (2 << 0)
# define MACH64_BKGD_MIX_D (3 << 0)
# define BKGD_MIX_NOT_S (4 << 0)
# define BKGD_MIX_D_XOR_S (5 << 0)
# define BKGD_MIX_NOT_D_XOR_S (6 << 0)
# define MACH64_BKGD_MIX_S (7 << 0)
# define BKGD_MIX_NOT_D_OR_NOT_S (8 << 0)
# define BKGD_MIX_D_OR_NOT_S (9 << 0)
# define BKGD_MIX_NOT_D_OR_S (10 << 0)
# define BKGD_MIX_D_OR_S (11 << 0)
# define BKGD_MIX_D_AND_S (12 << 0)
# define BKGD_MIX_NOT_D_AND_S (13 << 0)
# define BKGD_MIX_D_AND_NOT_S (14 << 0)
# define BKGD_MIX_NOT_D_AND_NOT_S (15 << 0)
# define BKGD_MIX_D_PLUS_S_DIV2 (23 << 0)
# define FRGD_MIX_NOT_D (0 << 16)
# define FRGD_MIX_ZERO (1 << 16)
# define FRGD_MIX_ONE (2 << 16)
# define FRGD_MIX_D (3 << 16)
# define FRGD_MIX_NOT_S (4 << 16)
# define FRGD_MIX_D_XOR_S (5 << 16)
# define FRGD_MIX_NOT_D_XOR_S (6 << 16)
# define MACH64_FRGD_MIX_S (7 << 16)
# define FRGD_MIX_NOT_D_OR_NOT_S (8 << 16)
# define FRGD_MIX_D_OR_NOT_S (9 << 16)
# define FRGD_MIX_NOT_D_OR_S (10 << 16)
# define FRGD_MIX_D_OR_S (11 << 16)
# define FRGD_MIX_D_AND_S (12 << 16)
# define FRGD_MIX_NOT_D_AND_S (13 << 16)
# define FRGD_MIX_D_AND_NOT_S (14 << 16)
# define FRGD_MIX_NOT_D_AND_NOT_S (15 << 16)
# define FRGD_MIX_D_PLUS_S_DIV2 (23 << 16)
#define MACH64_DP_PIX_WIDTH 0x06d0
# define MACH64_COMPOSITE_PIX_WIDTH_MASK (0xf << 4)
# define MACH64_HOST_TRIPLE_ENABLE (1 << 13)
# define MACH64_BYTE_ORDER_MSB_TO_LSB (0 << 24)
# define MACH64_BYTE_ORDER_LSB_TO_MSB (1 << 24)
# define MACH64_SCALE_PIX_WIDTH_MASK (0xf << 28)
#define MACH64_DP_SRC 0x06d8
# define MACH64_BKGD_SRC_BKGD_CLR (0 << 0)
# define MACH64_BKGD_SRC_FRGD_CLR (1 << 0)
# define MACH64_BKGD_SRC_HOST (2 << 0)
# define MACH64_BKGD_SRC_BLIT (3 << 0)
# define MACH64_BKGD_SRC_PATTERN (4 << 0)
# define MACH64_BKGD_SRC_3D (5 << 0)
# define MACH64_FRGD_SRC_BKGD_CLR (0 << 8)
# define MACH64_FRGD_SRC_FRGD_CLR (1 << 8)
# define MACH64_FRGD_SRC_HOST (2 << 8)
# define MACH64_FRGD_SRC_BLIT (3 << 8)
# define MACH64_FRGD_SRC_PATTERN (4 << 8)
# define MACH64_FRGD_SRC_3D (5 << 8)
# define MACH64_MONO_SRC_ONE (0 << 16)
# define MACH64_MONO_SRC_PATTERN (1 << 16)
# define MACH64_MONO_SRC_HOST (2 << 16)
# define MACH64_MONO_SRC_BLIT (3 << 16)
#define MACH64_DP_WRITE_MASK 0x06c8
#define MACH64_DST_CNTL 0x0530
# define MACH64_DST_X_RIGHT_TO_LEFT (0 << 0)
# define MACH64_DST_X_LEFT_TO_RIGHT (1 << 0)
# define MACH64_DST_Y_BOTTOM_TO_TOP (0 << 1)
# define MACH64_DST_Y_TOP_TO_BOTTOM (1 << 1)
# define MACH64_DST_X_MAJOR (0 << 2)
# define MACH64_DST_Y_MAJOR (1 << 2)
# define MACH64_DST_X_TILE (1 << 3)
# define MACH64_DST_Y_TILE (1 << 4)
# define MACH64_DST_LAST_PEL (1 << 5)
# define MACH64_DST_POLYGON_ENABLE (1 << 6)
# define MACH64_DST_24_ROTATION_ENABLE (1 << 7)
#define MACH64_DST_HEIGHT_WIDTH 0x0518
#define MACH64_DST_OFF_PITCH 0x0500
#define MACH64_DST_WIDTH_HEIGHT 0x06ec
#define MACH64_DST_X_Y 0x06e8
#define MACH64_DST_Y_X 0x050c
#define MACH64_FIFO_STAT 0x0710
# define MACH64_FIFO_SLOT_MASK 0x0000ffff
# define MACH64_FIFO_ERR (1 << 31)
#define MACH64_GEN_TEST_CNTL 0x04d0
#define MACH64_GUI_CMDFIFO_DEBUG 0x0170
#define MACH64_GUI_CMDFIFO_DATA 0x0174
#define MACH64_GUI_CNTL 0x0178
#define MACH64_GUI_STAT 0x0738
# define MACH64_GUI_ACTIVE (1 << 0)
#define MACH64_GUI_TRAJ_CNTL 0x0730
#define MACH64_HOST_CNTL 0x0640
#define MACH64_HOST_DATA0 0x0600
#define MACH64_HW_DEBUG 0x047c
#define MACH64_ONE_OVER_AREA 0x029c
#define MACH64_ONE_OVER_AREA_UC 0x0300
#define MACH64_PAT_REG0 0x0680
#define MACH64_PAT_REG1 0x0684
#define MACH64_SC_LEFT_RIGHT 0x06a8
#define MACH64_SC_TOP_BOTTOM 0x06b4
#define MACH64_SCALE_3D_CNTL 0x05fc
# define MACH64_SCALE_PIX_EXPAND_ZERO_EXTEND (0 << 0)
# define MACH64_SCALE_PIX_EXPAND_DYNAMIC_RANGE (1 << 0)
# define MACH64_SCALE_DITHER_ERROR_DIFFUSE (0 << 1)
# define MACH64_SCALE_DITHER_2D_TABLE (1 << 1)
# define MACH64_DITHER_EN (1 << 2)
# define MACH64_DITHER_INIT_CURRENT (O << 3)
# define MACH64_DITHER_INIT_RESET (1 << 3)
# define MACH64_ROUND_EN (1 << 4)
# define MACH64_TEX_CACHE_DIS (1 << 5)
# define MACH64_SCALE_3D_FCN_MASK (3 << 6)
# define MACH64_SCALE_3D_FCN_NOP (0 << 6)
# define MACH64_SCALE_3D_FCN_SCALE (1 << 6)
# define MACH64_SCALE_3D_FCN_TEXTURE (2 << 6)
# define MACH64_SCALE_3D_FCN_SHADE (3 << 6)
# define MACH64_TEXTURE_DISABLE (1 << 6)
# define MACH64_EDGE_ANTI_ALIAS (1 << 8)
# define MACH64_TEX_CACHE_SPLIT (1 << 9)
# define MACH64_APPLE_YUV_MODE (1 << 10)
# define MACH64_ALPHA_FOG_EN_MASK (3 << 11)
# define MACH64_ALPHA_FOG_DIS (0 << 11)
# define MACH64_ALPHA_FOG_EN_ALPHA (1 << 11)
# define MACH64_ALPHA_FOG_EN_FOG (2 << 11)
# define MACH64_ALPHA_BLEND_SAT (1 << 13)
# define MACH64_RED_DITHER_MAX (1 << 14)
# define MACH64_SIGNED_DST_CLAMP (1 << 15)
# define MACH64_ALPHA_BLEND_SRC_MASK (7 << 16)
# define MACH64_ALPHA_BLEND_SRC_ZERO (0 << 16)
# define MACH64_ALPHA_BLEND_SRC_ONE (1 << 16)
# define MACH64_ALPHA_BLEND_SRC_DSTCOLOR (2 << 16)
# define MACH64_ALPHA_BLEND_SRC_INVDSTCOLOR (3 << 16)
# define MACH64_ALPHA_BLEND_SRC_SRCALPHA (4 << 16)
# define MACH64_ALPHA_BLEND_SRC_INVSRCALPHA (5 << 16)
# define MACH64_ALPHA_BLEND_SRC_DSTALPHA (6 << 16)
# define MACH64_ALPHA_BLEND_SRC_INVDSTALPHA (7 << 16)
# define MACH64_ALPHA_BLEND_DST_MASK (7 << 19)
# define MACH64_ALPHA_BLEND_DST_ZERO (0 << 19)
# define MACH64_ALPHA_BLEND_DST_ONE (1 << 19)
# define MACH64_ALPHA_BLEND_DST_SRCCOLOR (2 << 19)
# define MACH64_ALPHA_BLEND_DST_INVSRCCOLOR (3 << 19)
# define MACH64_ALPHA_BLEND_DST_SRCALPHA (4 << 19)
# define MACH64_ALPHA_BLEND_DST_INVSRCALPHA (5 << 19)
# define MACH64_ALPHA_BLEND_DST_DSTALPHA (6 << 19)
# define MACH64_ALPHA_BLEND_DST_INVDSTALPHA (7 << 19)
# define MACH64_TEX_LIGHT_FCN_MASK (3 << 22)
# define MACH64_TEX_LIGHT_FCN_REPLACE (0 << 22)
# define MACH64_TEX_LIGHT_FCN_MODULATE (1 << 22)
# define MACH64_TEX_LIGHT_FCN_ALPHA_DECAL (2 << 22)
# define MACH64_MIP_MAP_DISABLE (1 << 24)
# define MACH64_BILINEAR_TEX_EN (1 << 25)
# define MACH64_TEX_BLEND_FCN_MASK (3 << 26)
# define MACH64_TEX_BLEND_FCN_NEAREST (0 << 26)
# define MACH64_TEX_BLEND_FCN_LINEAR (2 << 26)
# define MACH64_TEX_BLEND_FCN_TRILINEAR (3 << 26)
# define MACH64_TEX_AMASK_AEN (1 << 28)
# define MACH64_TEX_AMASK_BLEND_EDGE (1 << 29)
# define MACH64_TEX_MAP_AEN (1 << 30)
# define MACH64_SRC_3D_HOST_FIFO (1 << 31)
#define MACH64_SCRATCH_REG0 0x0480
#define MACH64_SCRATCH_REG1 0x0484
#define MACH64_SECONDARY_TEX_OFF 0x0778
#define MACH64_SETUP_CNTL 0x0304
# define MACH64_DONT_START_TRI (1 << 0)
# define MACH64_DONT_START_ANY (1 << 2)
# define MACH64_FLAT_SHADE_MASK (3 << 3)
# define MACH64_FLAT_SHADE_OFF (0 << 3)
# define MACH64_FLAT_SHADE_VERTEX_1 (1 << 3)
# define MACH64_FLAT_SHADE_VERTEX_2 (2 << 3)
# define MACH64_FLAT_SHADE_VERTEX_3 (3 << 3)
# define MACH64_SOLID_MODE_OFF (0 << 5)
# define MACH64_SOLID_MODE_ON (1 << 5)
# define MACH64_LOG_MAX_INC_ADJ (1 << 6)
# define MACH64_SET_UP_CONTINUE (1 << 31)
#define MACH64_SRC_CNTL 0x05b4
#define MACH64_SRC_HEIGHT1 0x0594
#define MACH64_SRC_HEIGHT2 0x05ac
#define MACH64_SRC_HEIGHT1_WIDTH1 0x0598
#define MACH64_SRC_HEIGHT2_WIDTH2 0x05b0
#define MACH64_SRC_OFF_PITCH 0x0580
#define MACH64_SRC_WIDTH1 0x0590
#define MACH64_SRC_Y_X 0x058c
#define MACH64_TEX_0_OFF 0x05c0
#define MACH64_TEX_CNTL 0x0774
# define MACH64_LOD_BIAS_SHIFT 0
# define MACH64_LOD_BIAS_MASK (0xf << 0)
# define MACH64_COMP_FACTOR_SHIFT 4
# define MACH64_COMP_FACTOR_MASK (0xf << 4)
# define MACH64_TEXTURE_COMPOSITE (1 << 8)
# define MACH64_COMP_COMBINE_BLEND (0 << 9)
# define MACH64_COMP_COMBINE_MODULATE (1 << 9)
# define MACH64_COMP_BLEND_NEAREST (0 << 11)
# define MACH64_COMP_BLEND_BILINEAR (1 << 11)
# define MACH64_COMP_FILTER_NEAREST (0 << 12)
# define MACH64_COMP_FILTER_BILINEAR (1 << 12)
# define MACH64_COMP_ALPHA (1 << 13)
# define MACH64_TEXTURE_TILING (1 << 14)
# define MACH64_COMPOSITE_TEX_TILING (1 << 15)
# define MACH64_TEX_COLLISION_DISABLE (1 << 16)
# define MACH64_TEXTURE_CLAMP_S (1 << 17)
# define MACH64_TEXTURE_CLAMP_T (1 << 18)
# define MACH64_TEX_ST_MULT_W (0 << 19)
# define MACH64_TEX_ST_DIRECT (1 << 19)
# define MACH64_TEX_SRC_LOCAL (0 << 20)
# define MACH64_TEX_SRC_AGP (1 << 20)
# define MACH64_TEX_UNCOMPRESSED (0 << 21)
# define MACH64_TEX_VQ_COMPRESSED (1 << 21)
# define MACH64_COMP_TEX_UNCOMPRESSED (0 << 22)
# define MACH64_COMP_TEX_VQ_COMPRESSED (1 << 22)
# define MACH64_TEX_CACHE_FLUSH (1 << 23)
# define MACH64_SEC_TEX_CLAMP_S (1 << 24)
# define MACH64_SEC_TEX_CLAMP_T (1 << 25)
# define MACH64_TEX_WRAP_S (1 << 28)
# define MACH64_TEX_WRAP_T (1 << 29)
# define MACH64_TEX_CACHE_SIZE_4K (1 << 30)
# define MACH64_TEX_CACHE_SIZE_2K (1 << 30)
# define MACH64_SECONDARY_STW (1 << 31)
#define MACH64_TEX_PALETTE 0x077c
#define MACH64_TEX_PALETTE_INDEX 0x0740
#define MACH64_TEX_SIZE_PITCH 0x0770
#define MACH64_VERTEX_1_ARGB 0x0254
#define MACH64_VERTEX_1_S 0x0240
#define MACH64_VERTEX_1_SECONDARY_S 0x0328
#define MACH64_VERTEX_1_SECONDARY_T 0x032c
#define MACH64_VERTEX_1_SECONDARY_W 0x0330
#define MACH64_VERTEX_1_SPEC_ARGB 0x024c
#define MACH64_VERTEX_1_T 0x0244
#define MACH64_VERTEX_1_W 0x0248
#define MACH64_VERTEX_1_X_Y 0x0258
#define MACH64_VERTEX_1_Z 0x0250
#define MACH64_VERTEX_2_ARGB 0x0274
#define MACH64_VERTEX_2_S 0x0260
#define MACH64_VERTEX_2_SECONDARY_S 0x0334
#define MACH64_VERTEX_2_SECONDARY_T 0x0338
#define MACH64_VERTEX_2_SECONDARY_W 0x033c
#define MACH64_VERTEX_2_SPEC_ARGB 0x026c
#define MACH64_VERTEX_2_T 0x0264
#define MACH64_VERTEX_2_W 0x0268
#define MACH64_VERTEX_2_X_Y 0x0278
#define MACH64_VERTEX_2_Z 0x0270
#define MACH64_VERTEX_3_ARGB 0x0294
#define MACH64_VERTEX_3_S 0x0280
#define MACH64_VERTEX_3_SECONDARY_S 0x02a0
#define MACH64_VERTEX_3_SECONDARY_T 0x02a4
#define MACH64_VERTEX_3_SECONDARY_W 0x02a8
#define MACH64_VERTEX_3_SPEC_ARGB 0x028c
#define MACH64_VERTEX_3_T 0x0284
#define MACH64_VERTEX_3_W 0x0288
#define MACH64_VERTEX_3_X_Y 0x0298
#define MACH64_VERTEX_3_Z 0x0290
#define MACH64_Z_CNTL 0x054c
# define MACH64_Z_EN (1 << 0)
# define MACH64_Z_SRC_2D (1 << 1)
# define MACH64_Z_TEST_MASK (7 << 4)
# define MACH64_Z_TEST_NEVER (0 << 4)
# define MACH64_Z_TEST_LESS (1 << 4)
# define MACH64_Z_TEST_LEQUAL (2 << 4)
# define MACH64_Z_TEST_EQUAL (3 << 4)
# define MACH64_Z_TEST_GEQUAL (4 << 4)
# define MACH64_Z_TEST_GREATER (5 << 4)
# define MACH64_Z_TEST_NOTEQUAL (6 << 4)
# define MACH64_Z_TEST_ALWAYS (7 << 4)
# define MACH64_Z_MASK_EN (1 << 8)
#define MACH64_Z_OFF_PITCH 0x0548
#define MACH64_DATATYPE_CI8 2
#define MACH64_DATATYPE_ARGB1555 3
#define MACH64_DATATYPE_RGB565 4
#define MACH64_DATATYPE_ARGB8888 6
#define MACH64_DATATYPE_RGB332 7
#define MACH64_DATATYPE_Y8 8
#define MACH64_DATATYPE_RGB8 9
#define MACH64_DATATYPE_VYUY422 11
#define MACH64_DATATYPE_YVYU422 12
#define MACH64_DATATYPE_AYUV444 14
#define MACH64_DATATYPE_ARGB4444 15
#define MACH64_LAST_FRAME_REG MACH64_PAT_REG0
#define MACH64_LAST_DISPATCH_REG MACH64_PAT_REG1
#endif /* __MACH64_REG_H__ */

462
src/mesa/drivers/dri/mach64/mach64_screen.c
View File

@ -1,462 +0,0 @@
/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* Jos<EFBFBD>Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "mach64_context.h"
#include "mach64_ioctl.h"
#include "mach64_span.h"
#include "main/context.h"
#include "main/imports.h"
#include "main/framebuffer.h"
#include "main/renderbuffer.h"
#include "utils.h"
#include "vblank.h"
#include "GL/internal/dri_interface.h"
/* Mach64 configuration
*/
#include "xmlpool.h"
PUBLIC const char __driConfigOptions[] =
DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
DRI_CONF_SECTION_END
DRI_CONF_SECTION_DEBUG
DRI_CONF_NO_RAST(false)
#if ENABLE_PERF_BOXES
DRI_CONF_PERFORMANCE_BOXES(false)
#endif
DRI_CONF_SECTION_END
DRI_CONF_END;
#if ENABLE_PERF_BOXES
static const GLuint __driNConfigOptions = 3;
#else
static const GLuint __driNConfigOptions = 2;
#endif
static const __DRIconfig **
mach64FillInModes( __DRIscreen *psp,
unsigned pixel_bits, unsigned depth_bits,
unsigned stencil_bits, GLboolean have_back_buffer )
{
__DRIconfig **configs;
struct gl_config * m;
GLenum fb_format;
GLenum fb_type;
unsigned depth_buffer_factor;
unsigned back_buffer_factor;
unsigned i;
/* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
* enough to add support. Basically, if a context is created with an
* fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
* will never be used.
*/
static const GLenum back_buffer_modes[] = {
GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
};
uint8_t depth_bits_array[2];
uint8_t stencil_bits_array[2];
uint8_t msaa_samples_array[1];
depth_bits_array[0] = depth_bits;
depth_bits_array[1] = depth_bits;
/* Just like with the accumulation buffer, always provide some modes
* with a stencil buffer. It will be a sw fallback, but some apps won't
* care about that.
*/
stencil_bits_array[0] = 0;
stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
msaa_samples_array[0] = 0;
depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
back_buffer_factor = (have_back_buffer) ? 2 : 1;
if (pixel_bits == 16) {
fb_format = GL_RGB;
fb_type = GL_UNSIGNED_SHORT_5_6_5;
}
else {
fb_format = GL_BGRA;
fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
}
configs = driCreateConfigs(fb_format, fb_type,
depth_bits_array, stencil_bits_array,
depth_buffer_factor, back_buffer_modes,
back_buffer_factor,
msaa_samples_array, 1, GL_TRUE);
if (configs == NULL) {
fprintf(stderr, "[%s:%u] Error creating FBConfig!\n",
__func__, __LINE__);
return NULL;
}
/* Mark the visual as slow if there are "fake" stencil bits.
*/
for (i = 0; configs[i]; i++) {
m = &configs[i]->modes;
if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
m->visualRating = GLX_SLOW_CONFIG;
}
}
return (const __DRIconfig **) configs;
}
/* Create the device specific screen private data struct.
*/
static mach64ScreenRec *
mach64CreateScreen( __DRIscreen *sPriv )
{
mach64ScreenPtr mach64Screen;
ATIDRIPtr serverInfo = (ATIDRIPtr)sPriv->pDevPriv;
int i;
if (sPriv->devPrivSize != sizeof(ATIDRIRec)) {
fprintf(stderr,"\nERROR! sizeof(ATIDRIRec) does not match passed size from device driver\n");
return GL_FALSE;
}
if ( MACH64_DEBUG & DEBUG_VERBOSE_DRI )
fprintf( stderr, "%s\n", __FUNCTION__ );
/* Allocate the private area */
mach64Screen = (mach64ScreenPtr) CALLOC( sizeof(*mach64Screen) );
if ( !mach64Screen ) return NULL;
/* parse information in __driConfigOptions */
driParseOptionInfo (&mach64Screen->optionCache,
__driConfigOptions, __driNConfigOptions);
mach64Screen->IsPCI = serverInfo->IsPCI;
{
drm_mach64_getparam_t gp;
int ret;
gp.param = MACH64_PARAM_IRQ_NR;
gp.value = (void *) &mach64Screen->irq;
ret = drmCommandWriteRead( sPriv->fd, DRM_MACH64_GETPARAM,
&gp, sizeof(gp));
if (ret) {
fprintf(stderr, "DRM_MACH64_GETPARAM (MACH64_PARAM_IRQ_NR): %d\n", ret);
FREE( mach64Screen );
return NULL;
}
}
mach64Screen->mmio.handle = serverInfo->regs;
mach64Screen->mmio.size = serverInfo->regsSize;
if ( drmMap( sPriv->fd,
mach64Screen->mmio.handle,
mach64Screen->mmio.size,
(drmAddressPtr)&mach64Screen->mmio.map ) != 0 ) {
FREE( mach64Screen );
return NULL;
}
mach64Screen->buffers = drmMapBufs( sPriv->fd );
if ( !mach64Screen->buffers ) {
drmUnmap( (drmAddress)mach64Screen->mmio.map,
mach64Screen->mmio.size );
FREE( mach64Screen );
return NULL;
}
if ( !mach64Screen->IsPCI ) {
mach64Screen->agpTextures.handle = serverInfo->agp;
mach64Screen->agpTextures.size = serverInfo->agpSize;
if ( drmMap( sPriv->fd,
mach64Screen->agpTextures.handle,
mach64Screen->agpTextures.size,
(drmAddressPtr)&mach64Screen->agpTextures.map ) ) {
drmUnmapBufs( mach64Screen->buffers );
drmUnmap( (drmAddress)mach64Screen->mmio.map, mach64Screen->mmio.size );
FREE( mach64Screen );
return NULL;
}
}
mach64Screen->AGPMode = serverInfo->AGPMode;
mach64Screen->chipset = serverInfo->chipset;
mach64Screen->width = serverInfo->width;
mach64Screen->height = serverInfo->height;
mach64Screen->mem = serverInfo->mem;
mach64Screen->cpp = serverInfo->cpp;
mach64Screen->frontOffset = serverInfo->frontOffset;
mach64Screen->frontPitch = serverInfo->frontPitch;
mach64Screen->backOffset = serverInfo->backOffset;
mach64Screen->backPitch = serverInfo->backPitch;
mach64Screen->depthOffset = serverInfo->depthOffset;
mach64Screen->depthPitch = serverInfo->depthPitch;
mach64Screen->texOffset[MACH64_CARD_HEAP] = serverInfo->textureOffset;
mach64Screen->texSize[MACH64_CARD_HEAP] = serverInfo->textureSize;
mach64Screen->logTexGranularity[MACH64_CARD_HEAP] =
serverInfo->logTextureGranularity;
if ( mach64Screen->IsPCI ) {
mach64Screen->numTexHeaps = MACH64_NR_TEX_HEAPS - 1;
mach64Screen->firstTexHeap = MACH64_CARD_HEAP;
mach64Screen->texOffset[MACH64_AGP_HEAP] = 0;
mach64Screen->texSize[MACH64_AGP_HEAP] = 0;
mach64Screen->logTexGranularity[MACH64_AGP_HEAP] = 0;
} else {
if (serverInfo->textureSize > 0) {
mach64Screen->numTexHeaps = MACH64_NR_TEX_HEAPS;
mach64Screen->firstTexHeap = MACH64_CARD_HEAP;
} else {
mach64Screen->numTexHeaps = MACH64_NR_TEX_HEAPS - 1;
mach64Screen->firstTexHeap = MACH64_AGP_HEAP;
}
mach64Screen->texOffset[MACH64_AGP_HEAP] = serverInfo->agpTextureOffset;
mach64Screen->texSize[MACH64_AGP_HEAP] = serverInfo->agpSize;
mach64Screen->logTexGranularity[MACH64_AGP_HEAP] = serverInfo->logAgpTextureGranularity;
}
mach64Screen->driScreen = sPriv;
i = 0;
if ( mach64Screen->irq != 0 ) {
mach64Screen->extensions[i++] = &driSwapControlExtension.base;
mach64Screen->extensions[i++] = &driMediaStreamCounterExtension.base;
}
mach64Screen->extensions[i++] = NULL;
sPriv->extensions = mach64Screen->extensions;
return mach64Screen;
}
/* Destroy the device specific screen private data struct.
*/
static void
mach64DestroyScreen( __DRIscreen *driScreen )
{
mach64ScreenRec *mach64Screen = (mach64ScreenRec *) driScreen->private;
if ( !mach64Screen )
return;
if ( MACH64_DEBUG & DEBUG_VERBOSE_DRI )
fprintf( stderr, "%s\n", __FUNCTION__ );
if ( !mach64Screen->IsPCI ) {
drmUnmap( (drmAddress)mach64Screen->agpTextures.map,
mach64Screen->agpTextures.size );
}
drmUnmapBufs( mach64Screen->buffers );
drmUnmap( (drmAddress)mach64Screen->mmio.map, mach64Screen->mmio.size );
FREE( mach64Screen );
driScreen->private = NULL;
}
/* Create and initialize the Mesa and driver specific pixmap buffer
* data.
*/
static GLboolean
mach64CreateBuffer( __DRIscreen *driScrnPriv,
__DRIdrawable *driDrawPriv,
const struct gl_config *mesaVis,
GLboolean isPixmap )
{
mach64ScreenPtr screen = (mach64ScreenPtr) driScrnPriv->private;
if (isPixmap) {
return GL_FALSE; /* not implemented */
}
else {
struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
{
driRenderbuffer *frontRb
= driNewRenderbuffer(MESA_FORMAT_ARGB8888,
NULL,
screen->cpp,
screen->frontOffset, screen->frontPitch,
driDrawPriv);
mach64SetSpanFunctions(frontRb, mesaVis);
_mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
}
if (mesaVis->doubleBufferMode) {
driRenderbuffer *backRb
= driNewRenderbuffer(MESA_FORMAT_ARGB8888,
NULL,
screen->cpp,
screen->backOffset, screen->backPitch,
driDrawPriv);
mach64SetSpanFunctions(backRb, mesaVis);
_mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
}
if (mesaVis->depthBits == 16) {
driRenderbuffer *depthRb
= driNewRenderbuffer(MESA_FORMAT_Z16,
NULL, screen->cpp,
screen->depthOffset, screen->depthPitch,
driDrawPriv);
mach64SetSpanFunctions(depthRb, mesaVis);
_mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
}
else if (mesaVis->depthBits == 24) {
/* XXX I don't think 24-bit Z is supported - so this isn't used */
driRenderbuffer *depthRb
= driNewRenderbuffer(MESA_FORMAT_Z24_S8,
NULL,
screen->cpp,
screen->depthOffset, screen->depthPitch,
driDrawPriv);
mach64SetSpanFunctions(depthRb, mesaVis);
_mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
}
_mesa_add_soft_renderbuffers(fb,
GL_FALSE, /* color */
GL_FALSE, /* depth */
mesaVis->stencilBits > 0,
mesaVis->accumRedBits > 0,
GL_FALSE, /* alpha */
GL_FALSE /* aux */);
driDrawPriv->driverPrivate = (void *) fb;
return (driDrawPriv->driverPrivate != NULL);
}
}
static void
mach64DestroyBuffer(__DRIdrawable *driDrawPriv)
{
_mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
}
/* Copy the back color buffer to the front color buffer */
static void
mach64SwapBuffers(__DRIdrawable *dPriv)
{
if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
mach64ContextPtr mmesa;
struct gl_context *ctx;
mmesa = (mach64ContextPtr) dPriv->driContextPriv->driverPrivate;
ctx = mmesa->glCtx;
if (ctx->Visual.doubleBufferMode) {
_mesa_notifySwapBuffers( ctx ); /* flush pending rendering comands */
mach64CopyBuffer( dPriv );
}
}
else {
/* XXX this shouldn't be an error but we can't handle it for now */
_mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
}
}
/* Initialize the driver specific screen private data.
*/
static GLboolean
mach64InitDriver( __DRIscreen *driScreen )
{
driScreen->private = (void *) mach64CreateScreen( driScreen );
if ( !driScreen->private ) {
mach64DestroyScreen( driScreen );
return GL_FALSE;
}
return GL_TRUE;
}
/**
* This is the driver specific part of the createNewScreen entry point.
*
* \todo maybe fold this into intelInitDriver
*
* \return the struct gl_config supported by this driver
*/
static const __DRIconfig **
mach64InitScreen(__DRIscreen *psp)
{
static const __DRIversion ddx_expected = { 6, 4, 0 };
static const __DRIversion dri_expected = { 4, 0, 0 };
static const __DRIversion drm_expected = { 2, 0, 0 };
ATIDRIPtr dri_priv = (ATIDRIPtr) psp->pDevPriv;
if ( ! driCheckDriDdxDrmVersions2( "Mach64",
&psp->dri_version, & dri_expected,
&psp->ddx_version, & ddx_expected,
&psp->drm_version, & drm_expected ) ) {
return NULL;
}
if (!mach64InitDriver(psp))
return NULL;
return mach64FillInModes( psp, dri_priv->cpp * 8, 16, 0, 1);
}
const struct __DriverAPIRec driDriverAPI = {
.InitScreen = mach64InitScreen,
.DestroyScreen = mach64DestroyScreen,
.CreateContext = mach64CreateContext,
.DestroyContext = mach64DestroyContext,
.CreateBuffer = mach64CreateBuffer,
.DestroyBuffer = mach64DestroyBuffer,
.SwapBuffers = mach64SwapBuffers,
.MakeCurrent = mach64MakeCurrent,
.UnbindContext = mach64UnbindContext,
.GetSwapInfo = NULL,
.GetDrawableMSC = driDrawableGetMSC32,
.WaitForMSC = driWaitForMSC32,
.WaitForSBC = NULL,
.SwapBuffersMSC = NULL
};
/* This is the table of extensions that the loader will dlsym() for. */
PUBLIC const __DRIextension *__driDriverExtensions[] = {
&driCoreExtension.base,
&driLegacyExtension.base,
NULL
};

80
src/mesa/drivers/dri/mach64/mach64_screen.h
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#ifndef __MACH64_SCREEN_H__
#define __MACH64_SCREEN_H__
#include "xmlconfig.h"
typedef struct {
drm_handle_t handle; /* Handle to the DRM region */
drmSize size; /* Size of the DRM region */
drmAddress *map; /* Mapping of the DRM region */
} mach64RegionRec, *mach64RegionPtr;
typedef struct {
int chipset;
int width;
int height;
int mem;
int cpp;
unsigned int frontOffset;
unsigned int frontPitch;
unsigned int backOffset;
unsigned int backPitch;
unsigned int depthOffset;
unsigned int depthPitch;
int IsPCI;
int AGPMode;
unsigned int irq; /* IRQ number (0 means none) */
/* Shared Texture data */
int firstTexHeap, numTexHeaps;
int texOffset[MACH64_NR_TEX_HEAPS];
int texSize[MACH64_NR_TEX_HEAPS];
int logTexGranularity[MACH64_NR_TEX_HEAPS];
mach64RegionRec mmio;
mach64RegionRec agpTextures;
drmBufMapPtr buffers;
__DRIscreen *driScreen;
driOptionCache optionCache;
const __DRIextension *extensions[4];
} mach64ScreenRec, *mach64ScreenPtr;
#endif /* __MACH64_SCREEN_H__ */

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src/mesa/drivers/dri/mach64/mach64_span.c
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* Jos<EFBFBD>Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "mach64_context.h"
#include "mach64_ioctl.h"
#include "mach64_span.h"
#include "swrast/swrast.h"
#define DBG 0
#define LOCAL_VARS \
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx); \
__DRIscreen *sPriv = mmesa->driScreen; \
__DRIdrawable *dPriv = mmesa->driDrawable; \
driRenderbuffer *drb = (driRenderbuffer *) rb; \
GLuint height = dPriv->h; \
GLushort p; \
(void) p;
#define LOCAL_DEPTH_VARS \
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx); \
__DRIdrawable *dPriv = mmesa->driDrawable; \
__DRIscreen *driScreen = mmesa->driScreen; \
driRenderbuffer *drb = (driRenderbuffer *) rb; \
GLuint height = dPriv->h; \
char *buf = (char *)(driScreen->pFB + drb->offset + \
(dPriv->x + dPriv->y * drb->pitch) * 2)
#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
#define Y_FLIP( _y ) (height - _y - 1)
#define HW_LOCK()
/* FIXME could/should we use dPriv->numClipRects like the other drivers? */
#define HW_CLIPLOOP() \
do { \
int _nc = mmesa->numClipRects; \
\
while ( _nc-- ) { \
int minx = mmesa->pClipRects[_nc].x1 - mmesa->drawX; \
int miny = mmesa->pClipRects[_nc].y1 - mmesa->drawY; \
int maxx = mmesa->pClipRects[_nc].x2 - mmesa->drawX; \
int maxy = mmesa->pClipRects[_nc].y2 - mmesa->drawY;
#define HW_ENDCLIPLOOP() \
} \
} while (0)
#define HW_UNLOCK()
/* ================================================================
* Color buffer
*/
/* 16 bit, RGB565 color spanline and pixel functions
*/
#define SPANTMP_PIXEL_FMT GL_RGB
#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
#define TAG(x) mach64##x##_RGB565
#define TAG2(x,y) mach64##x##_RGB565##y
#define GET_PTR(X,Y) (sPriv->pFB + drb->offset \
+ ((dPriv->y + (Y)) * drb->pitch + (dPriv->x + (X))) * drb->cpp)
#include "spantmp2.h"
/* 32 bit, ARGB8888 color spanline and pixel functions
*/
/* FIXME the old code always read back alpha as 0xff, i.e. fully opaque.
Was there a reason to do so ? If so that'll won't work with that template... */
#define SPANTMP_PIXEL_FMT GL_BGRA
#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
#define TAG(x) mach64##x##_ARGB8888
#define TAG2(x,y) mach64##x##_ARGB8888##y
#define GET_PTR(X,Y) (sPriv->pFB + drb->offset \
+ ((dPriv->y + (Y)) * drb->pitch + (dPriv->x + (X))) * drb->cpp)
#include "spantmp2.h"
/* ================================================================
* Depth buffer
*/
/* 16 bit depthbuffer functions.
*/
#define VALUE_TYPE GLushort
#define WRITE_DEPTH( _x, _y, d ) \
*(GLushort *)(buf + ((_x) + (_y) * drb->pitch) * 2) = d;
#define READ_DEPTH( d, _x, _y ) \
d = *(GLushort *)(buf + ((_x) + (_y) * drb->pitch) * 2);
#define TAG(x) mach64##x##_z16
#include "depthtmp.h"
static void mach64SpanRenderStart( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
LOCK_HARDWARE( mmesa );
FINISH_DMA_LOCKED( mmesa );
}
static void mach64SpanRenderFinish( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
_swrast_flush( ctx );
UNLOCK_HARDWARE( mmesa );
}
void mach64DDInitSpanFuncs( struct gl_context *ctx )
{
struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
swdd->SpanRenderStart = mach64SpanRenderStart;
swdd->SpanRenderFinish = mach64SpanRenderFinish;
}
/**
* Plug in the Get/Put routines for the given driRenderbuffer.
*/
void
mach64SetSpanFunctions(driRenderbuffer *drb, const struct gl_config *vis)
{
if (drb->Base.Format == MESA_FORMAT_RGB565) {
mach64InitPointers_RGB565(&drb->Base);
}
else if (drb->Base.Format == MESA_FORMAT_ARGB8888) {
mach64InitPointers_ARGB8888(&drb->Base);
}
else if (drb->Base.Format == MESA_FORMAT_Z16) {
mach64InitDepthPointers_z16(&drb->Base);
}
}

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src/mesa/drivers/dri/mach64/mach64_span.h
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
*
*/
#ifndef __MACH64_SPAN_H__
#define __MACH64_SPAN_H__
#include "drirenderbuffer.h"
extern void mach64DDInitSpanFuncs( struct gl_context *ctx );
extern void
mach64SetSpanFunctions(driRenderbuffer *rb, const struct gl_config *vis);
#endif

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src/mesa/drivers/dri/mach64/mach64_state.c
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src/mesa/drivers/dri/mach64/mach64_state.h
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
*/
#ifndef __MACH64_STATE_H__
#define __MACH64_STATE_H__
#include "mach64_context.h"
extern void mach64DDInitState( mach64ContextPtr mmesa );
extern void mach64DDInitStateFuncs( struct gl_context *ctx );
extern void mach64SetCliprects( struct gl_context *ctx, GLenum mode );
extern void mach64CalcViewport( struct gl_context *ctx );
extern void mach64DDUpdateState( struct gl_context *ctx );
extern void mach64DDUpdateHWState( struct gl_context *ctx );
extern void mach64EmitHwStateLocked( mach64ContextPtr mmesa );
#endif

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src/mesa/drivers/dri/mach64/mach64_tex.c
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "mach64_context.h"
#include "mach64_ioctl.h"
#include "mach64_tex.h"
#include "main/simple_list.h"
#include "main/enums.h"
#include "main/texstore.h"
#include "main/teximage.h"
#include "main/texobj.h"
#include "main/imports.h"
static void mach64SetTexWrap( mach64TexObjPtr t,
GLenum swrap, GLenum twrap )
{
switch ( swrap ) {
case GL_CLAMP:
case GL_CLAMP_TO_EDGE:
case GL_CLAMP_TO_BORDER:
t->ClampS = GL_TRUE;
break;
case GL_REPEAT:
t->ClampS = GL_FALSE;
break;
}
switch ( twrap ) {
case GL_CLAMP:
case GL_CLAMP_TO_EDGE:
case GL_CLAMP_TO_BORDER:
t->ClampT = GL_TRUE;
break;
case GL_REPEAT:
t->ClampT = GL_FALSE;
break;
}
}
static void mach64SetTexFilter( mach64TexObjPtr t,
GLenum minf, GLenum magf )
{
switch ( minf ) {
case GL_NEAREST:
case GL_NEAREST_MIPMAP_NEAREST:
case GL_NEAREST_MIPMAP_LINEAR:
t->BilinearMin = GL_FALSE;
break;
case GL_LINEAR:
case GL_LINEAR_MIPMAP_NEAREST:
case GL_LINEAR_MIPMAP_LINEAR:
t->BilinearMin = GL_TRUE;
break;
}
switch ( magf ) {
case GL_NEAREST:
t->BilinearMag = GL_FALSE;
break;
case GL_LINEAR:
t->BilinearMag = GL_TRUE;
break;
}
}
static void mach64SetTexBorderColor( mach64TexObjPtr t, const GLfloat c[4] )
{
#if 0
GLuint border = mach64PackColor( 4, c[0], c[1], c[2], c[3] );
#endif
}
static mach64TexObjPtr
mach64AllocTexObj( struct gl_texture_object *texObj )
{
mach64TexObjPtr t;
if ( MACH64_DEBUG & DEBUG_VERBOSE_API )
fprintf( stderr, "%s( %p )\n", __FUNCTION__, texObj );
t = (mach64TexObjPtr) CALLOC_STRUCT( mach64_texture_object );
texObj->DriverData = t;
if ( !t )
return NULL;
/* Initialize non-image-dependent parts of the state:
*/
t->base.tObj = texObj;
t->base.dirty_images[0] = (1 << 0);
t->bufAddr = 0;
make_empty_list( (driTextureObject *) t );
mach64SetTexWrap( t, texObj->Sampler.WrapS, texObj->Sampler.WrapT );
mach64SetTexFilter( t, texObj->Sampler.MinFilter, texObj->Sampler.MagFilter );
mach64SetTexBorderColor( t, texObj->Sampler.BorderColor.f );
return t;
}
/* Called by the _mesa_store_teximage[123]d() functions. */
static gl_format
mach64ChooseTextureFormat( struct gl_context *ctx, GLint internalFormat,
GLenum format, GLenum type )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
(void) format;
(void) type;
switch ( internalFormat ) {
case GL_ALPHA:
case GL_ALPHA4:
case GL_ALPHA8:
case GL_ALPHA12:
case GL_ALPHA16:
case GL_COMPRESSED_ALPHA:
case 2:
case GL_LUMINANCE_ALPHA:
case GL_LUMINANCE4_ALPHA4:
case GL_LUMINANCE6_ALPHA2:
case GL_LUMINANCE8_ALPHA8:
case GL_LUMINANCE12_ALPHA4:
case GL_LUMINANCE12_ALPHA12:
case GL_LUMINANCE16_ALPHA16:
case GL_COMPRESSED_LUMINANCE_ALPHA:
case 4:
case GL_RGBA:
case GL_RGBA2:
case GL_COMPRESSED_RGBA:
if (mmesa->mach64Screen->cpp == 4)
return MESA_FORMAT_ARGB8888;
else
return MESA_FORMAT_ARGB4444;
case GL_RGB5_A1:
if (mmesa->mach64Screen->cpp == 4)
return MESA_FORMAT_ARGB8888;
else
return MESA_FORMAT_ARGB1555;
case GL_RGBA8:
case GL_RGB10_A2:
case GL_RGBA12:
case GL_RGBA16:
case GL_RGBA4:
if (mmesa->mach64Screen->cpp == 4)
return MESA_FORMAT_ARGB8888;
else
return MESA_FORMAT_ARGB4444;
case 3:
case GL_RGB:
case GL_R3_G3_B2:
case GL_RGB4:
case GL_RGB5:
case GL_RGB8:
case GL_RGB10:
case GL_RGB12:
case GL_RGB16:
case GL_COMPRESSED_RGB:
if (mmesa->mach64Screen->cpp == 4)
return MESA_FORMAT_ARGB8888;
else
return MESA_FORMAT_RGB565;
case 1:
case GL_LUMINANCE:
case GL_LUMINANCE4:
case GL_LUMINANCE8:
case GL_LUMINANCE12:
case GL_LUMINANCE16:
case GL_COMPRESSED_LUMINANCE:
if (mmesa->mach64Screen->cpp == 4)
return MESA_FORMAT_ARGB8888; /* inefficient but accurate */
else
return MESA_FORMAT_ARGB1555;
case GL_INTENSITY4:
case GL_INTENSITY:
case GL_INTENSITY8:
case GL_INTENSITY12:
case GL_INTENSITY16:
case GL_COMPRESSED_INTENSITY:
if (mmesa->mach64Screen->cpp == 4)
return MESA_FORMAT_ARGB8888; /* inefficient but accurate */
else
return MESA_FORMAT_ARGB4444;
case GL_COLOR_INDEX:
case GL_COLOR_INDEX1_EXT:
case GL_COLOR_INDEX2_EXT:
case GL_COLOR_INDEX4_EXT:
case GL_COLOR_INDEX8_EXT:
case GL_COLOR_INDEX12_EXT:
case GL_COLOR_INDEX16_EXT:
return MESA_FORMAT_CI8;
case GL_YCBCR_MESA:
if (type == GL_UNSIGNED_SHORT_8_8_APPLE ||
type == GL_UNSIGNED_BYTE)
return MESA_FORMAT_YCBCR;
else
return MESA_FORMAT_YCBCR_REV;
default:
_mesa_problem( ctx, "unexpected format in %s", __FUNCTION__ );
return MESA_FORMAT_NONE;
}
}
static void mach64TexImage1D( struct gl_context *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint border,
GLenum format, GLenum type, const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
driTextureObject * t = (driTextureObject *) texObj->DriverData;
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) mach64AllocTexObj(texObj);
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage1D");
return;
}
}
/* Note, this will call mach64ChooseTextureFormat */
_mesa_store_teximage1d( ctx, target, level, internalFormat,
width, border, format, type,
pixels, packing, texObj, texImage );
mmesa->new_state |= MACH64_NEW_TEXTURE;
}
static void mach64TexSubImage1D( struct gl_context *ctx,
GLenum target,
GLint level,
GLint xoffset,
GLsizei width,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
driTextureObject * t = (driTextureObject *) texObj->DriverData;
assert( t ); /* this _should_ be true */
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) mach64AllocTexObj(texObj);
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage1D");
return;
}
}
_mesa_store_texsubimage1d(ctx, target, level, xoffset, width,
format, type, pixels, packing, texObj,
texImage);
mmesa->new_state |= MACH64_NEW_TEXTURE;
}
static void mach64TexImage2D( struct gl_context *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint border,
GLenum format, GLenum type, const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
driTextureObject * t = (driTextureObject *) texObj->DriverData;
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) mach64AllocTexObj(texObj);
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage2D");
return;
}
}
/* Note, this will call mach64ChooseTextureFormat */
_mesa_store_teximage2d( ctx, target, level, internalFormat,
width, height, border, format, type, pixels,
&ctx->Unpack, texObj, texImage );
mmesa->new_state |= MACH64_NEW_TEXTURE;
}
static void mach64TexSubImage2D( struct gl_context *ctx,
GLenum target,
GLint level,
GLint xoffset, GLint yoffset,
GLsizei width, GLsizei height,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
driTextureObject * t = (driTextureObject *) texObj->DriverData;
assert( t ); /* this _should_ be true */
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) mach64AllocTexObj(texObj);
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage2D");
return;
}
}
_mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
height, format, type, pixels, packing, texObj,
texImage);
mmesa->new_state |= MACH64_NEW_TEXTURE;
}
/* ================================================================
* Device Driver API texture functions
*/
static void mach64DDTexEnv( struct gl_context *ctx, GLenum target,
GLenum pname, const GLfloat *param )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
#if 0
struct gl_texture_unit *texUnit;
GLubyte c[4];
#endif
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %s )\n",
__FUNCTION__, _mesa_lookup_enum_by_nr( pname ) );
}
switch ( pname ) {
case GL_TEXTURE_ENV_MODE:
FLUSH_BATCH( mmesa );
mmesa->new_state |= MACH64_NEW_TEXTURE | MACH64_NEW_ALPHA;
break;
#if 0
case GL_TEXTURE_ENV_COLOR:
texUnit = &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
CLAMPED_FLOAT_TO_UBYTE( c[0], texUnit->EnvColor[0] );
CLAMPED_FLOAT_TO_UBYTE( c[1], texUnit->EnvColor[1] );
CLAMPED_FLOAT_TO_UBYTE( c[2], texUnit->EnvColor[2] );
CLAMPED_FLOAT_TO_UBYTE( c[3], texUnit->EnvColor[3] );
mmesa->env_color = mach64PackColor( 32, c[0], c[1], c[2], c[3] );
if ( mmesa->setup.constant_color_c != mmesa->env_color ) {
FLUSH_BATCH( mmesa );
mmesa->setup.constant_color_c = mmesa->env_color;
mmesa->new_state |= MACH64_NEW_TEXTURE;
/* More complex multitexture/multipass fallbacks for GL_BLEND
* can be done later, but this allows a single pass GL_BLEND
* in some cases (ie. Performer town demo).
*/
mmesa->blend_flags &= ~MACH64_BLEND_ENV_COLOR;
if ( mmesa->env_color != 0x00000000 &&
mmesa->env_color != 0xff000000 &&
mmesa->env_color != 0x00ffffff &&
mmesa->env_color != 0xffffffff )) {
mmesa->blend_flags |= MACH64_BLEND_ENV_COLOR;
}
}
break;
#endif
default:
return;
}
}
static void mach64DDTexParameter( struct gl_context *ctx, GLenum target,
struct gl_texture_object *tObj,
GLenum pname, const GLfloat *params )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
mach64TexObjPtr t = (mach64TexObjPtr)tObj->DriverData;
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %s )\n",
__FUNCTION__, _mesa_lookup_enum_by_nr( pname ) );
}
if ( ( target != GL_TEXTURE_2D ) &&
( target != GL_TEXTURE_1D ) ) {
return;
}
if (!t) {
t = mach64AllocTexObj(tObj);
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexParameter");
return;
}
}
switch ( pname ) {
case GL_TEXTURE_MIN_FILTER:
case GL_TEXTURE_MAG_FILTER:
if ( t->base.bound ) FLUSH_BATCH( mmesa );
mach64SetTexFilter( t, tObj->Sampler.MinFilter, tObj->Sampler.MagFilter );
break;
case GL_TEXTURE_WRAP_S:
case GL_TEXTURE_WRAP_T:
if ( t->base.bound ) FLUSH_BATCH( mmesa );
mach64SetTexWrap( t, tObj->Sampler.WrapS, tObj->Sampler.WrapT );
break;
case GL_TEXTURE_BORDER_COLOR:
if ( t->base.bound ) FLUSH_BATCH( mmesa );
mach64SetTexBorderColor( t, tObj->Sampler.BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
/* From Radeon/Rage128:
* This isn't the most efficient solution but there doesn't appear to
* be a nice alternative. Since there's no LOD clamping,
* we just have to rely on loading the right subset of mipmap levels
* to simulate a clamped LOD.
*
* For mach64 we're only concerned with the base level
* since that's the only texture we upload.
*/
if ( t->base.bound ) FLUSH_BATCH( mmesa );
driSwapOutTextureObject( (driTextureObject *) t );
break;
default:
return;
}
mmesa->new_state |= MACH64_NEW_TEXTURE;
}
static void mach64DDBindTexture( struct gl_context *ctx, GLenum target,
struct gl_texture_object *tObj )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
GLint unit = ctx->Texture.CurrentUnit;
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %p ) unit=%d\n",
__FUNCTION__, tObj, unit );
}
FLUSH_BATCH( mmesa );
if ( mmesa->CurrentTexObj[unit] ) {
mmesa->CurrentTexObj[unit]->base.bound &= ~(1 << unit);
mmesa->CurrentTexObj[unit] = NULL;
}
mmesa->new_state |= MACH64_NEW_TEXTURE;
}
static void mach64DDDeleteTexture( struct gl_context *ctx,
struct gl_texture_object *tObj )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
driTextureObject * t = (driTextureObject *) tObj->DriverData;
if ( t ) {
if ( t->bound && mmesa ) {
FLUSH_BATCH( mmesa );
mmesa->new_state |= MACH64_NEW_TEXTURE;
}
driDestroyTextureObject( t );
/* Free mipmap images and the texture object itself */
_mesa_delete_texture_object(ctx, tObj);
}
}
/**
* Allocate a new texture object.
* Called via ctx->Driver.NewTextureObject.
* Note: we could use containment here to 'derive' the driver-specific
* texture object from the core mesa gl_texture_object. Not done at this time.
*/
static struct gl_texture_object *
mach64NewTextureObject( struct gl_context *ctx, GLuint name, GLenum target )
{
struct gl_texture_object *obj;
obj = _mesa_new_texture_object(ctx, name, target);
mach64AllocTexObj( obj );
return obj;
}
void mach64InitTextureFuncs( struct dd_function_table *functions )
{
functions->TexEnv = mach64DDTexEnv;
functions->ChooseTextureFormat = mach64ChooseTextureFormat;
functions->TexImage1D = mach64TexImage1D;
functions->TexSubImage1D = mach64TexSubImage1D;
functions->TexImage2D = mach64TexImage2D;
functions->TexSubImage2D = mach64TexSubImage2D;
functions->TexParameter = mach64DDTexParameter;
functions->BindTexture = mach64DDBindTexture;
functions->NewTextureObject = mach64NewTextureObject;
functions->DeleteTexture = mach64DDDeleteTexture;
functions->IsTextureResident = driIsTextureResident;
driInitTextureFormats();
}

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#ifndef __MACH64_TEX_H__
#define __MACH64_TEX_H__
extern void mach64UpdateTextureState( struct gl_context *ctx );
extern void mach64UploadTexImages( mach64ContextPtr mach64ctx,
mach64TexObjPtr t );
extern void mach64UploadMultiTexImages( mach64ContextPtr mach64ctx,
mach64TexObjPtr t0, mach64TexObjPtr t1 );
extern void mach64DestroyTexObj( mach64ContextPtr mach64ctx,
mach64TexObjPtr t );
extern void mach64EmitTexStateLocked( mach64ContextPtr mmesa,
mach64TexObjPtr t0,
mach64TexObjPtr t1 );
extern void mach64InitTextureFuncs( struct dd_function_table *functions );
/* ================================================================
* Color conversion macros:
*/
#define MACH64PACKCOLOR332(r, g, b) \
(((r) & 0xe0) | (((g) & 0xe0) >> 3) | (((b) & 0xc0) >> 6))
#define MACH64PACKCOLOR1555(r, g, b, a) \
((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
((a) ? 0x8000 : 0))
#define MACH64PACKCOLOR565(r, g, b) \
((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
#define MACH64PACKCOLOR888(r, g, b) \
(((r) << 16) | ((g) << 8) | (b))
#define MACH64PACKCOLOR8888(r, g, b, a) \
(((a) << 24) | ((r) << 16) | ((g) << 8) | (b))
#define MACH64PACKCOLOR4444(r, g, b, a) \
((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
static INLINE GLuint mach64PackColor( GLuint cpp,
GLubyte r, GLubyte g,
GLubyte b, GLubyte a )
{
switch ( cpp ) {
case 2:
return MACH64PACKCOLOR565( r, g, b );
case 4:
return MACH64PACKCOLOR8888( r, g, b, a );
default:
return 0;
}
}
#endif

511
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@ -1,511 +0,0 @@
/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
* Cedar Park, Texas.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* Jose Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "main/context.h"
#include "main/macros.h"
#include "main/simple_list.h"
#include "main/imports.h"
#include "mach64_context.h"
#include "mach64_ioctl.h"
#include "mach64_tex.h"
/* Destroy hardware state associated with texture `t'.
*/
void mach64DestroyTexObj( mach64ContextPtr mmesa, mach64TexObjPtr t )
{
unsigned i;
/* See if it was the driver's current object.
*/
if ( mmesa != NULL )
{
for ( i = 0 ; i < mmesa->glCtx->Const.MaxTextureUnits ; i++ )
{
if ( t == mmesa->CurrentTexObj[ i ] ) {
assert( t->base.bound & (1 << i) );
mmesa->CurrentTexObj[ i ] = NULL;
}
}
}
}
/* Upload the texture image associated with texture `t' at level `level'
* at the address relative to `start'.
*/
static void mach64UploadAGPSubImage( mach64ContextPtr mmesa,
mach64TexObjPtr t, int level,
int x, int y, int width, int height )
{
mach64ScreenRec *mach64Screen = mmesa->mach64Screen;
struct gl_texture_image *image;
int texelsPerDword = 0;
int dwords;
GLuint texelBytes;
/* Ensure we have a valid texture to upload */
if ( ( level < 0 ) || ( level > mmesa->glCtx->Const.MaxTextureLevels ) )
return;
image = t->base.tObj->Image[0][level];
if ( !image )
return;
texelBytes = _mesa_get_format_bytes(image->TexFormat);
switch ( texelBytes ) {
case 1: texelsPerDword = 4; break;
case 2: texelsPerDword = 2; break;
case 4: texelsPerDword = 1; break;
}
#if 1
/* FIXME: The subimage index calcs are wrong... */
x = 0;
y = 0;
width = image->Width;
height = image->Height;
#endif
dwords = width * height / texelsPerDword;
#if ENABLE_PERF_BOXES
/* Bump the performance counter */
mmesa->c_agpTextureBytes += (dwords << 2);
#endif
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "mach64UploadSubImage: %d,%d of %d,%d at %d,%d\n",
width, height, image->Width, image->Height, x, y );
fprintf( stderr, " blit ofs: 0x%07x pitch: 0x%x dwords: %d\n",
(GLuint)t->bufAddr, (GLint)width, dwords );
}
assert(image->Data);
{
CARD32 *dst = (CARD32 *)((char *)mach64Screen->agpTextures.map + t->base.memBlock->ofs);
const GLubyte *src = (const GLubyte *) image->Data +
(y * image->Width + x) * texelBytes;
const GLuint bytes = width * height * texelBytes;
memcpy(dst, src, bytes);
}
}
/* Upload the texture image associated with texture `t' at level `level'
* at the address relative to `start'.
*/
static void mach64UploadLocalSubImage( mach64ContextPtr mmesa,
mach64TexObjPtr t, int level,
int x, int y, int width, int height )
{
struct gl_texture_image *image;
int texelsPerDword = 0;
int imageWidth, imageHeight;
int remaining, rows;
int format, dwords;
const int maxdwords = (MACH64_BUFFER_MAX_DWORDS - (MACH64_HOSTDATA_BLIT_OFFSET / 4));
CARD32 pitch, offset;
int i;
GLuint texelBytes;
/* Ensure we have a valid texture to upload */
if ( ( level < 0 ) || ( level > mmesa->glCtx->Const.MaxTextureLevels ) )
return;
image = t->base.tObj->Image[0][level];
if ( !image )
return;
texelBytes = _mesa_get_format_bytes(image->TexFormat);
switch ( texelBytes ) {
case 1: texelsPerDword = 4; break;
case 2: texelsPerDword = 2; break;
case 4: texelsPerDword = 1; break;
}
#if 1
/* FIXME: The subimage index calcs are wrong... */
x = 0;
y = 0;
width = image->Width;
height = image->Height;
#endif
imageWidth = image->Width;
imageHeight = image->Height;
format = t->textureFormat;
/* The texel upload routines have a minimum width, so force the size
* if needed.
*/
if ( imageWidth < texelsPerDword ) {
int factor;
factor = texelsPerDword / imageWidth;
imageWidth = texelsPerDword;
imageHeight /= factor;
if ( imageHeight == 0 ) {
/* In this case, the texel converter will actually walk a
* texel or two off the end of the image, but normal malloc
* alignment should prevent it from ever causing a fault.
*/
imageHeight = 1;
}
}
/* We can't upload to a pitch less than 64 texels so we will need to
* linearly upload all modified rows for textures smaller than this.
* This makes the x/y/width/height different for the blitter and the
* texture walker.
*/
if ( imageWidth >= 64 ) {
/* The texture walker and the blitter look identical */
pitch = imageWidth >> 3;
} else {
int factor;
int y2;
int start, end;
start = (y * imageWidth) & ~63;
end = (y + height) * imageWidth;
if ( end - start < 64 ) {
/* Handle the case where the total number of texels
* uploaded is < 64.
*/
x = 0;
y = start / 64;
width = end - start;
height = 1;
} else {
/* Upload some number of full 64 texel blit rows */
factor = 64 / imageWidth;
y2 = y + height - 1;
y /= factor;
y2 /= factor;
x = 0;
width = 64;
height = y2 - y + 1;
}
/* Fixed pitch of 64 */
pitch = 8;
}
dwords = width * height / texelsPerDword;
offset = t->bufAddr;
#if ENABLE_PERF_BOXES
/* Bump the performance counter */
mmesa->c_textureBytes += (dwords << 2);
#endif
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "mach64UploadSubImage: %d,%d of %d,%d at %d,%d\n",
width, height, image->Width, image->Height, x, y );
fprintf( stderr, " blit ofs: 0x%07x pitch: 0x%x dwords: %d\n",
(GLuint)offset, (GLint)width, dwords );
}
/* Subdivide the texture if required (account for the registers added by the drm) */
if ( dwords <= maxdwords ) {
rows = height;
} else {
rows = (maxdwords * texelsPerDword) / (2 * width);
}
for ( i = 0, remaining = height ;
remaining > 0 ;
remaining -= rows, y += rows, i++ )
{
height = MIN2(remaining, rows);
assert(image->Data);
{
const GLubyte *src = (const GLubyte *) image->Data +
(y * image->Width + x) * texelBytes;
mach64FireBlitLocked( mmesa, (void *)src, offset, pitch, format,
x, y, width, height );
}
}
mmesa->new_state |= MACH64_NEW_CONTEXT;
mmesa->dirty |= MACH64_UPLOAD_CONTEXT | MACH64_UPLOAD_MISC;
}
/* Upload the texture images associated with texture `t'. This might
* require removing our own and/or other client's texture objects to
* make room for these images.
*/
void mach64UploadTexImages( mach64ContextPtr mmesa, mach64TexObjPtr t )
{
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %p, %p )\n",
__FUNCTION__, mmesa->glCtx, t );
}
assert(t);
assert(t->base.tObj);
if ( !t->base.memBlock ) {
int heap;
/* NULL heaps are skipped */
heap = driAllocateTexture( mmesa->texture_heaps, MACH64_NR_TEX_HEAPS,
(driTextureObject *) t );
if ( heap == -1 ) {
fprintf( stderr, "%s: upload texture failure, sz=%d\n", __FUNCTION__,
t->base.totalSize );
exit(-1);
return;
}
t->heap = heap;
/* Set the base offset of the texture image */
assert(t->base.memBlock);
t->bufAddr = mmesa->mach64Screen->texOffset[heap] + t->base.memBlock->ofs;
/* Force loading the new state into the hardware */
mmesa->dirty |= (MACH64_UPLOAD_SCALE_3D_CNTL |
MACH64_UPLOAD_TEXTURE);
}
/* Let the world know we've used this memory recently */
driUpdateTextureLRU( (driTextureObject *) t );
/* Upload any images that are new */
if ( t->base.dirty_images[0] ) {
const GLint j = t->base.tObj->BaseLevel;
if (t->heap == MACH64_AGP_HEAP) {
/* Need to make sure any vertex buffers in the queue complete */
mach64WaitForIdleLocked( mmesa );
mach64UploadAGPSubImage( mmesa, t, j, 0, 0,
t->base.tObj->Image[0][j]->Width,
t->base.tObj->Image[0][j]->Height );
} else {
mach64UploadLocalSubImage( mmesa, t, j, 0, 0,
t->base.tObj->Image[0][j]->Width,
t->base.tObj->Image[0][j]->Height );
}
mmesa->setup.tex_cntl |= MACH64_TEX_CACHE_FLUSH;
t->base.dirty_images[0] = 0;
}
mmesa->dirty |= MACH64_UPLOAD_TEXTURE;
}
/* Allocate memory from the same texture heap `heap' for both textures
* `u0' and `u1'.
*/
static int mach64AllocateMultiTex( mach64ContextPtr mmesa,
mach64TexObjPtr u0,
mach64TexObjPtr u1,
int heap, GLboolean alloc_u0 )
{
/* Both objects should be bound */
assert( u0->base.bound && u1->base.bound );
if ( alloc_u0 ) {
/* Evict u0 from its current heap */
if ( u0->base.memBlock ) {
assert( u0->heap != heap );
driSwapOutTextureObject( (driTextureObject *) u0 );
}
/* Try to allocate u0 in the chosen heap */
u0->heap = driAllocateTexture( &mmesa->texture_heaps[heap], 1,
(driTextureObject *) u0 );
if ( u0->heap == -1 ) {
return -1;
}
}
/* Evict u1 from its current heap */
if ( u1->base.memBlock ) {
assert( u1->heap != heap );
driSwapOutTextureObject( (driTextureObject *) u1 );
}
/* Try to allocate u1 in the same heap as u0 */
u1->heap = driAllocateTexture( &mmesa->texture_heaps[heap], 1,
(driTextureObject *) u1 );
if ( u1->heap == -1 ) {
return -1;
}
/* Bound objects are not evicted */
assert( u0->base.memBlock && u1->base.memBlock );
assert( u0->heap == u1->heap );
return heap;
}
/* The mach64 needs to have both primary and secondary textures in either
* local or AGP memory, so we need a "buddy system" to make sure that allocation
* succeeds or fails for both textures.
*/
void mach64UploadMultiTexImages( mach64ContextPtr mmesa,
mach64TexObjPtr t0,
mach64TexObjPtr t1 )
{
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %p, %p %p )\n",
__FUNCTION__, mmesa->glCtx, t0, t1 );
}
assert(t0 && t1);
assert(t0->base.tObj && t1->base.tObj);
if ( !t0->base.memBlock || !t1->base.memBlock || t0->heap != t1->heap ) {
mach64TexObjPtr u0 = NULL;
mach64TexObjPtr u1 = NULL;
unsigned totalSize = t0->base.totalSize + t1->base.totalSize;
int heap, ret;
/* Check if one of the textures is already swapped in a heap and the
* other texture fits in that heap.
*/
if ( t0->base.memBlock && totalSize <= t0->base.heap->size ) {
u0 = t0;
u1 = t1;
} else if ( t1->base.memBlock && totalSize <= t1->base.heap->size ) {
u0 = t1;
u1 = t0;
}
if ( u0 ) {
heap = u0->heap;
ret = mach64AllocateMultiTex( mmesa, u0, u1, heap, GL_FALSE );
} else {
/* Both textures are swapped out or collocation is impossible */
u0 = t0;
u1 = t1;
/* Choose the heap appropriately */
heap = MACH64_CARD_HEAP;
if ( totalSize > mmesa->texture_heaps[heap]->size ) {
heap = MACH64_AGP_HEAP;
}
ret = mach64AllocateMultiTex( mmesa, u0, u1, heap, GL_TRUE );
}
if ( ret == -1 && heap == MACH64_CARD_HEAP ) {
/* Try AGP if local memory failed */
heap = MACH64_AGP_HEAP;
ret = mach64AllocateMultiTex( mmesa, u0, u1, heap, GL_TRUE );
}
if ( ret == -1 ) {
/* FIXME:
* Swap out all textures from the AGP heap and re-run allocation, this
* should succeed in all cases.
*/
fprintf( stderr, "%s: upload multi-texture failure, sz0=%d sz1=%d\n",
__FUNCTION__, t0->base.totalSize, t1->base.totalSize );
exit(-1);
}
/* Set the base offset of the texture image */
assert(t0->base.memBlock);
t0->bufAddr = mmesa->mach64Screen->texOffset[heap] + t0->base.memBlock->ofs;
assert(t1->base.memBlock);
t1->bufAddr = mmesa->mach64Screen->texOffset[heap] + t1->base.memBlock->ofs;
/* Force loading the new state into the hardware */
mmesa->dirty |= (MACH64_UPLOAD_SCALE_3D_CNTL |
MACH64_UPLOAD_TEXTURE);
}
/* Let the world know we've used this memory recently */
driUpdateTextureLRU( (driTextureObject *) t0 );
driUpdateTextureLRU( (driTextureObject *) t1 );
/* Upload any images that are new */
if ( t0->base.dirty_images[0] ) {
const GLint j0 = t0->base.tObj->BaseLevel;
if (t0->heap == MACH64_AGP_HEAP) {
/* Need to make sure any vertex buffers in the queue complete */
mach64WaitForIdleLocked( mmesa );
mach64UploadAGPSubImage( mmesa, t0, j0, 0, 0,
t0->base.tObj->Image[0][j0]->Width,
t0->base.tObj->Image[0][j0]->Height );
} else {
mach64UploadLocalSubImage( mmesa, t0, j0, 0, 0,
t0->base.tObj->Image[0][j0]->Width,
t0->base.tObj->Image[0][j0]->Height );
}
mmesa->setup.tex_cntl |= MACH64_TEX_CACHE_FLUSH;
t0->base.dirty_images[0] = 0;
}
if ( t1->base.dirty_images[0] ) {
const GLint j1 = t1->base.tObj->BaseLevel;
if (t1->heap == MACH64_AGP_HEAP) {
/* Need to make sure any vertex buffers in the queue complete */
mach64WaitForIdleLocked( mmesa );
mach64UploadAGPSubImage( mmesa, t1, j1, 0, 0,
t1->base.tObj->Image[0][j1]->Width,
t1->base.tObj->Image[0][j1]->Height );
} else {
mach64UploadLocalSubImage( mmesa, t1, j1, 0, 0,
t1->base.tObj->Image[0][j1]->Width,
t1->base.tObj->Image[0][j1]->Height );
}
mmesa->setup.tex_cntl |= MACH64_TEX_CACHE_FLUSH;
t1->base.dirty_images[0] = 0;
}
mmesa->dirty |= MACH64_UPLOAD_TEXTURE;
}

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "main/glheader.h"
#include "main/imports.h"
#include "main/context.h"
#include "main/macros.h"
#include "mach64_context.h"
#include "mach64_ioctl.h"
#include "mach64_tris.h"
#include "mach64_tex.h"
static void mach64SetTexImages( mach64ContextPtr mmesa,
const struct gl_texture_object *tObj )
{
mach64TexObjPtr t = (mach64TexObjPtr) tObj->DriverData;
struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel];
int totalSize;
assert(t);
assert(baseImage);
if ( MACH64_DEBUG & DEBUG_VERBOSE_API )
fprintf( stderr, "%s( %p )\n", __FUNCTION__, tObj );
switch (baseImage->TexFormat) {
case MESA_FORMAT_ARGB8888:
t->textureFormat = MACH64_DATATYPE_ARGB8888;
break;
case MESA_FORMAT_ARGB4444:
t->textureFormat = MACH64_DATATYPE_ARGB4444;
break;
case MESA_FORMAT_RGB565:
t->textureFormat = MACH64_DATATYPE_RGB565;
break;
case MESA_FORMAT_ARGB1555:
t->textureFormat = MACH64_DATATYPE_ARGB1555;
break;
case MESA_FORMAT_RGB332:
t->textureFormat = MACH64_DATATYPE_RGB332;
break;
case MESA_FORMAT_RGB888:
t->textureFormat = MACH64_DATATYPE_RGB8;
break;
case MESA_FORMAT_CI8:
t->textureFormat = MACH64_DATATYPE_CI8;
break;
case MESA_FORMAT_YCBCR:
t->textureFormat = MACH64_DATATYPE_YVYU422;
break;
case MESA_FORMAT_YCBCR_REV:
t->textureFormat = MACH64_DATATYPE_VYUY422;
break;
default:
_mesa_problem(mmesa->glCtx, "Bad texture format in %s", __FUNCTION__);
};
totalSize = ( baseImage->Height *
baseImage->Width *
_mesa_get_format_bytes(baseImage->TexFormat) );
totalSize = (totalSize + 31) & ~31;
t->base.totalSize = totalSize;
t->base.firstLevel = tObj->BaseLevel;
t->base.lastLevel = tObj->BaseLevel;
/* Set the texture format */
if ( ( baseImage->_BaseFormat == GL_RGBA ) ||
( baseImage->_BaseFormat == GL_ALPHA ) ||
( baseImage->_BaseFormat == GL_LUMINANCE_ALPHA ) ) {
t->hasAlpha = 1;
} else {
t->hasAlpha = 0;
}
t->widthLog2 = baseImage->WidthLog2;
t->heightLog2 = baseImage->HeightLog2;
t->maxLog2 = baseImage->MaxLog2;
}
static void mach64UpdateTextureEnv( struct gl_context *ctx, int unit )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
GLint source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
const struct gl_texture_object *tObj = texUnit->_Current;
const GLenum format = tObj->Image[0][tObj->BaseLevel]->_BaseFormat;
GLuint s = mmesa->setup.scale_3d_cntl;
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %p, %d )\n",
__FUNCTION__, ctx, unit );
}
/* REPLACE MODULATE DECAL GL_BLEND
*
* ALPHA C = Cf C = Cf undef C = Cf
* A = At A = AfAt A = AfAt
*
* LUMINANCE C = Ct C = CfCt undef C = Cf(1-Ct)+CcCt
* A = Af A = Af A = Af
*
* LUMINANCE_ALPHA C = Ct C = CfCt undef C = Cf(1-Ct)+CcCt
* A = At A = AfAt A = AfAt
*
* INTENSITY C = Ct C = CfCt undef C = Cf(1-Ct)+CcCt
* A = At A = AfAt A = Af(1-At)+AcAt
*
* RGB C = Ct C = CfCt C = Ct C = Cf(1-Ct)+CcCt
* A = Af A = Af A = Af A = Af
*
* RGBA C = Ct C = CfCt C = Cf(1-At)+CtAt C = Cf(1-Ct)+CcCt
* A = At A = AfAt A = Af A = AfAt
*/
if ( unit == 0 ) {
s &= ~MACH64_TEX_LIGHT_FCN_MASK;
/* Set the texture environment state
* Need to verify these are working correctly, but the
* texenv Mesa demo seems to work.
*/
switch ( texUnit->EnvMode ) {
case GL_REPLACE:
switch ( format ) {
case GL_ALPHA:
case GL_LUMINANCE_ALPHA:
case GL_INTENSITY:
/* Not compliant - can't get At */
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
default:
s |= MACH64_TEX_LIGHT_FCN_REPLACE;
}
break;
case GL_MODULATE:
switch ( format ) {
case GL_ALPHA:
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
case GL_RGB:
case GL_LUMINANCE:
/* These should be compliant */
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
case GL_LUMINANCE_ALPHA:
case GL_INTENSITY:
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
case GL_RGBA:
/* Should fallback when blending enabled for complete compliance */
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
default:
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
}
break;
case GL_DECAL:
switch ( format ) {
case GL_RGBA:
s |= MACH64_TEX_LIGHT_FCN_ALPHA_DECAL;
break;
case GL_RGB:
s |= MACH64_TEX_LIGHT_FCN_REPLACE;
break;
case GL_ALPHA:
case GL_LUMINANCE_ALPHA:
/* undefined - disable texturing, pass fragment unmodified */
/* Also, pass fragment alpha instead of texture alpha */
s &= ~MACH64_TEX_MAP_AEN;
s |= MACH64_TEXTURE_DISABLE;
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
case GL_LUMINANCE:
case GL_INTENSITY:
/* undefined - disable texturing, pass fragment unmodified */
s |= MACH64_TEXTURE_DISABLE;
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
default:
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
}
break;
case GL_BLEND:
/* GL_BLEND not supported by RagePRO, use software */
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
case GL_ADD:
case GL_COMBINE:
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
break;
default:
s |= MACH64_TEX_LIGHT_FCN_MODULATE;
}
if ( mmesa->setup.scale_3d_cntl != s ) {
mmesa->setup.scale_3d_cntl = s;
mmesa->dirty |= MACH64_UPLOAD_SCALE_3D_CNTL;
}
} else {
/* blend = 0, modulate = 1 - initialize to blend */
mmesa->setup.tex_cntl &= ~MACH64_COMP_COMBINE_MODULATE;
/* Set the texture composite function for multitexturing*/
switch ( texUnit->EnvMode ) {
case GL_BLEND:
/* GL_BLEND not supported by RagePRO, use software */
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
mmesa->setup.tex_cntl |= MACH64_COMP_COMBINE_MODULATE;
break;
case GL_MODULATE:
/* Should fallback when blending enabled for complete compliance */
mmesa->setup.tex_cntl |= MACH64_COMP_COMBINE_MODULATE;
break;
case GL_REPLACE:
switch ( format ) {
case GL_ALPHA:
mmesa->setup.tex_cntl |= MACH64_COMP_COMBINE_MODULATE;
break;
default: /* not supported by RagePRO */
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
mmesa->setup.tex_cntl |= MACH64_COMP_COMBINE_MODULATE;
}
break;
case GL_DECAL:
switch ( format ) {
case GL_ALPHA:
case GL_LUMINANCE:
case GL_LUMINANCE_ALPHA:
case GL_INTENSITY:
/* undefined, disable compositing and pass fragment unmodified */
mmesa->setup.tex_cntl &= ~MACH64_TEXTURE_COMPOSITE;
break;
default: /* not supported by RagePRO */
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
mmesa->setup.tex_cntl |= MACH64_COMP_COMBINE_MODULATE;
}
break;
case GL_ADD:
case GL_COMBINE:
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
mmesa->setup.tex_cntl |= MACH64_COMP_COMBINE_MODULATE;
break;
default:
mmesa->setup.tex_cntl |= MACH64_COMP_COMBINE_MODULATE;
}
}
}
static void mach64UpdateTextureUnit( struct gl_context *ctx, int unit )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
int source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
const struct gl_texture_object *tObj = ctx->Texture.Unit[source]._Current;
mach64TexObjPtr t = tObj->DriverData;
GLuint d = mmesa->setup.dp_pix_width;
GLuint s = mmesa->setup.scale_3d_cntl;
assert(unit == 0 || unit == 1); /* only two tex units */
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %p, %d ) enabled=0x%x 0x%x\n",
__FUNCTION__, ctx, unit, ctx->Texture.Unit[0]._ReallyEnabled,
ctx->Texture.Unit[1]._ReallyEnabled);
}
if (texUnit->_ReallyEnabled & (TEXTURE_1D_BIT | TEXTURE_2D_BIT)) {
assert(t); /* should have driver tex data by now */
/* Fallback if there's a texture border */
if ( tObj->Image[0][tObj->BaseLevel]->Border > 0 ) {
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
return;
}
/* Upload teximages */
if (t->base.dirty_images[0]) {
mach64SetTexImages( mmesa, tObj );
mmesa->dirty |= (MACH64_UPLOAD_TEX0IMAGE << unit);
}
/* Bind to the given texture unit */
mmesa->CurrentTexObj[unit] = t;
t->base.bound |= (1 << unit);
if ( t->base.memBlock )
driUpdateTextureLRU( (driTextureObject *) t ); /* XXX: should be locked! */
/* register setup */
if ( unit == 0 ) {
d &= ~MACH64_SCALE_PIX_WIDTH_MASK;
d |= (t->textureFormat << 28);
s &= ~(MACH64_TEXTURE_DISABLE |
MACH64_TEX_CACHE_SPLIT |
MACH64_TEX_BLEND_FCN_MASK |
MACH64_TEX_MAP_AEN);
if ( mmesa->multitex ) {
s |= MACH64_TEX_BLEND_FCN_TRILINEAR | MACH64_TEX_CACHE_SPLIT;
} else if ( t->BilinearMin ) {
s |= MACH64_TEX_BLEND_FCN_LINEAR;
} else {
s |= MACH64_TEX_BLEND_FCN_NEAREST;
}
if ( t->BilinearMag ) {
s |= MACH64_BILINEAR_TEX_EN;
} else {
s &= ~MACH64_BILINEAR_TEX_EN;
}
if ( t->hasAlpha ) {
s |= MACH64_TEX_MAP_AEN;
}
mmesa->setup.tex_cntl &= ~(MACH64_TEXTURE_CLAMP_S |
MACH64_TEXTURE_CLAMP_T |
MACH64_SECONDARY_STW);
if ( t->ClampS ) {
mmesa->setup.tex_cntl |= MACH64_TEXTURE_CLAMP_S;
}
if ( t->ClampT ) {
mmesa->setup.tex_cntl |= MACH64_TEXTURE_CLAMP_T;
}
mmesa->setup.tex_size_pitch |= ((t->widthLog2 << 0) |
(t->maxLog2 << 4) |
(t->heightLog2 << 8));
} else {
/* Enable texture mapping mode */
s &= ~MACH64_TEXTURE_DISABLE;
d &= ~MACH64_COMPOSITE_PIX_WIDTH_MASK;
d |= (t->textureFormat << 4);
mmesa->setup.tex_cntl &= ~(MACH64_COMP_ALPHA |
MACH64_SEC_TEX_CLAMP_S |
MACH64_SEC_TEX_CLAMP_T);
mmesa->setup.tex_cntl |= (MACH64_TEXTURE_COMPOSITE |
MACH64_SECONDARY_STW);
if ( t->BilinearMin ) {
mmesa->setup.tex_cntl |= MACH64_COMP_BLEND_BILINEAR;
} else {
mmesa->setup.tex_cntl &= ~MACH64_COMP_BLEND_BILINEAR;
}
if ( t->BilinearMag ) {
mmesa->setup.tex_cntl |= MACH64_COMP_FILTER_BILINEAR;
} else {
mmesa->setup.tex_cntl &= ~MACH64_COMP_FILTER_BILINEAR;
}
if ( t->hasAlpha ) {
mmesa->setup.tex_cntl |= MACH64_COMP_ALPHA;
}
if ( t->ClampS ) {
mmesa->setup.tex_cntl |= MACH64_SEC_TEX_CLAMP_S;
}
if ( t->ClampT ) {
mmesa->setup.tex_cntl |= MACH64_SEC_TEX_CLAMP_T;
}
mmesa->setup.tex_size_pitch |= ((t->widthLog2 << 16) |
(t->maxLog2 << 20) |
(t->heightLog2 << 24));
}
if ( mmesa->setup.scale_3d_cntl != s ) {
mmesa->setup.scale_3d_cntl = s;
mmesa->dirty |= MACH64_UPLOAD_SCALE_3D_CNTL;
}
if ( mmesa->setup.dp_pix_width != d ) {
mmesa->setup.dp_pix_width = d;
mmesa->dirty |= MACH64_UPLOAD_DP_PIX_WIDTH;
}
}
else if (texUnit->_ReallyEnabled) {
/* 3D or cube map texture enabled - fallback */
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_TRUE );
}
else {
/* texture unit disabled */
}
}
/* Update the hardware texture state */
void mach64UpdateTextureState( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
fprintf( stderr, "%s( %p ) en=0x%x 0x%x\n",
__FUNCTION__, ctx, ctx->Texture.Unit[0]._ReallyEnabled,
ctx->Texture.Unit[1]._ReallyEnabled);
}
/* Clear any texturing fallbacks */
FALLBACK( mmesa, MACH64_FALLBACK_TEXTURE, GL_FALSE );
/* Unbind any currently bound textures */
if ( mmesa->CurrentTexObj[0] ) mmesa->CurrentTexObj[0]->base.bound = 0;
if ( mmesa->CurrentTexObj[1] ) mmesa->CurrentTexObj[1]->base.bound = 0;
mmesa->CurrentTexObj[0] = NULL;
mmesa->CurrentTexObj[1] = NULL;
/* Disable all texturing until it is known to be good */
mmesa->setup.scale_3d_cntl |= MACH64_TEXTURE_DISABLE;
mmesa->setup.scale_3d_cntl &= ~MACH64_TEX_MAP_AEN;
mmesa->setup.tex_cntl &= ~MACH64_TEXTURE_COMPOSITE;
mmesa->setup.tex_size_pitch = 0x00000000;
mmesa->tmu_source[0] = 0;
mmesa->tmu_source[1] = 1;
mmesa->multitex = 0;
if (ctx->Texture._EnabledUnits & 0x2) {
/* unit 1 enabled */
if (ctx->Texture._EnabledUnits & 0x1) {
/* units 0 and 1 enabled */
mmesa->multitex = 1;
mach64UpdateTextureUnit( ctx, 0 );
mach64UpdateTextureEnv( ctx, 0 );
mach64UpdateTextureUnit( ctx, 1 );
mach64UpdateTextureEnv( ctx, 1 );
} else {
mmesa->tmu_source[0] = 1;
mmesa->tmu_source[1] = 0;
mach64UpdateTextureUnit( ctx, 0 );
mach64UpdateTextureEnv( ctx, 0 );
}
} else if (ctx->Texture._EnabledUnits & 0x1) {
/* only unit 0 enabled */
mach64UpdateTextureUnit( ctx, 0 );
mach64UpdateTextureEnv( ctx, 0 );
}
mmesa->dirty |= (MACH64_UPLOAD_SCALE_3D_CNTL |
MACH64_UPLOAD_TEXTURE);
}
/* Due to the way we must program texture state into the Rage Pro,
* we must leave these calculations to the absolute last minute.
*/
void mach64EmitTexStateLocked( mach64ContextPtr mmesa,
mach64TexObjPtr t0,
mach64TexObjPtr t1 )
{
drm_mach64_sarea_t *sarea = mmesa->sarea;
drm_mach64_context_regs_t *regs = &(mmesa->setup);
/* for multitex, both textures must be local or AGP */
if ( t0 && t1 )
assert(t0->heap == t1->heap);
if ( t0 ) {
if (t0->heap == MACH64_CARD_HEAP) {
#if ENABLE_PERF_BOXES
mmesa->c_texsrc_card++;
#endif
mmesa->setup.tex_cntl &= ~MACH64_TEX_SRC_AGP;
} else {
#if ENABLE_PERF_BOXES
mmesa->c_texsrc_agp++;
#endif
mmesa->setup.tex_cntl |= MACH64_TEX_SRC_AGP;
}
mmesa->setup.tex_offset = t0->bufAddr;
}
if ( t1 ) {
mmesa->setup.secondary_tex_off = t1->bufAddr;
}
memcpy( &sarea->context_state.tex_size_pitch, &regs->tex_size_pitch,
MACH64_NR_TEXTURE_REGS * sizeof(GLuint) );
}

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#ifndef __MACH64_TRIS_H__
#define __MACH64_TRIS_H__
#include "main/mtypes.h"
extern void mach64InitTriFuncs( struct gl_context *ctx );
extern void mach64Fallback( struct gl_context *ctx, GLuint bit, GLboolean mode );
#define FALLBACK( mmesa, bit, mode ) mach64Fallback( mmesa->glCtx, bit, mode )
#endif /* __MACH64_TRIS_H__ */

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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#include "main/glheader.h"
#include "main/mtypes.h"
#include "main/imports.h"
#include "main/macros.h"
#include "main/colormac.h"
#include "swrast_setup/swrast_setup.h"
#include "tnl/t_context.h"
#include "mach64_context.h"
#include "mach64_vb.h"
#include "mach64_ioctl.h"
#include "mach64_tris.h"
#define MACH64_TEX1_BIT 0x1
#define MACH64_TEX0_BIT 0x2
#define MACH64_RGBA_BIT 0x4
#define MACH64_SPEC_BIT 0x8
#define MACH64_FOG_BIT 0x10
#define MACH64_XYZW_BIT 0x20
#define MACH64_PTEX_BIT 0x40
#define MACH64_MAX_SETUP 0x80
static struct {
void (*emit)( struct gl_context *, GLuint, GLuint, void *, GLuint );
tnl_interp_func interp;
tnl_copy_pv_func copy_pv;
GLboolean (*check_tex_sizes)( struct gl_context *ctx );
GLuint vertex_size;
GLuint vertex_format;
} setup_tab[MACH64_MAX_SETUP];
#define TINY_VERTEX_FORMAT 1
#define NOTEX_VERTEX_FORMAT 2
#define TEX0_VERTEX_FORMAT 3
#define TEX1_VERTEX_FORMAT 4
#define PROJ_TEX1_VERTEX_FORMAT 0
#define TEX2_VERTEX_FORMAT 0
#define TEX3_VERTEX_FORMAT 0
#define PROJ_TEX3_VERTEX_FORMAT 0
#define DO_XYZW (IND & MACH64_XYZW_BIT)
#define DO_RGBA (IND & MACH64_RGBA_BIT)
#define DO_SPEC (IND & MACH64_SPEC_BIT)
#define DO_FOG (IND & MACH64_FOG_BIT)
#define DO_TEX0 (IND & MACH64_TEX0_BIT)
#define DO_TEX1 (IND & MACH64_TEX1_BIT)
#define DO_TEX2 0
#define DO_TEX3 0
#define DO_PTEX (IND & MACH64_PTEX_BIT)
#define VERTEX mach64Vertex
#define LOCALVARS mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
#define GET_VIEWPORT_MAT() mmesa->hw_viewport
#define GET_TEXSOURCE(n) mmesa->tmu_source[n]
#define GET_VERTEX_FORMAT() mmesa->vertex_format
#define GET_VERTEX_STORE() mmesa->verts
#define GET_VERTEX_SIZE() mmesa->vertex_size * sizeof(GLuint)
#define HAVE_HW_VIEWPORT 0
#define HAVE_HW_DIVIDE 0
#define HAVE_RGBA_COLOR 0
#define HAVE_TINY_VERTICES 1
#define HAVE_NOTEX_VERTICES 1
#define HAVE_TEX0_VERTICES 1
#define HAVE_TEX1_VERTICES 1
#define HAVE_TEX2_VERTICES 0
#define HAVE_TEX3_VERTICES 0
#define HAVE_PTEX_VERTICES 0
#define UNVIEWPORT_VARS \
const GLfloat dx = - (GLfloat)mmesa->drawX - SUBPIXEL_X; \
const GLfloat dy = (mmesa->driDrawable->h + \
(GLfloat)mmesa->drawY + SUBPIXEL_Y); \
const GLfloat sz = 1.0 / mmesa->depth_scale
#if MACH64_NATIVE_VTXFMT
#define UNVIEWPORT_X(x) ((GLfloat)(x) / 4.0) + dx
#define UNVIEWPORT_Y(y) - ((GLfloat)(y) / 4.0) + dy
#define UNVIEWPORT_Z(z) (GLfloat)((z) >> 15) * sz
#else
#define UNVIEWPORT_X(x) x + dx;
#define UNVIEWPORT_Y(y) - y + dy;
#define UNVIEWPORT_Z(z) z * sz;
#endif
#define PTEX_FALLBACK() FALLBACK(MACH64_CONTEXT(ctx), MACH64_FALLBACK_TEXTURE, 1)
#define IMPORT_FLOAT_COLORS mach64_import_float_colors
#define IMPORT_FLOAT_SPEC_COLORS mach64_import_float_spec_colors
#define INTERP_VERTEX setup_tab[mmesa->SetupIndex].interp
#define COPY_PV_VERTEX setup_tab[mmesa->SetupIndex].copy_pv
/***********************************************************************
* Generate pv-copying and translation functions *
***********************************************************************/
#if MACH64_NATIVE_VTXFMT
#define TAG(x) mach64_##x
#include "mach64_native_vb.c"
#else
#define TAG(x) mach64_##x
#include "tnl_dd/t_dd_vb.c"
#endif
/***********************************************************************
* Generate vertex emit and interp functions *
***********************************************************************/
#if MACH64_NATIVE_VTXFMT
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT)
#define TAG(x) x##_wg
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_wgs
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_wgt0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_wgt0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_TEX0_BIT|MACH64_PTEX_BIT)
#define TAG(x) x##_wgpt0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_wgst0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|\
MACH64_TEX1_BIT)
#define TAG(x) x##_wgst0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|\
MACH64_PTEX_BIT)
#define TAG(x) x##_wgspt0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT)
#define TAG(x) x##_wgf
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_wgfs
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_wgft0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT|\
MACH64_TEX1_BIT)
#define TAG(x) x##_wgft0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT|\
MACH64_PTEX_BIT)
#define TAG(x) x##_wgfpt0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|\
MACH64_TEX0_BIT)
#define TAG(x) x##_wgfst0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|\
MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_wgfst0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|\
MACH64_TEX0_BIT|MACH64_PTEX_BIT)
#define TAG(x) x##_wgfspt0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_TEX0_BIT)
#define TAG(x) x##_t0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_t0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_FOG_BIT)
#define TAG(x) x##_f
#include "mach64_native_vbtmp.h"
#define IND (MACH64_FOG_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_ft0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_FOG_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_ft0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT)
#define TAG(x) x##_g
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_gs
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gt0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_gt0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gst0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_gst0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT)
#define TAG(x) x##_gf
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_gfs
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gft0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_gft0t1
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gfst0
#include "mach64_native_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|\
MACH64_TEX1_BIT)
#define TAG(x) x##_gfst0t1
#include "mach64_native_vbtmp.h"
#else
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT)
#define TAG(x) x##_wg
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_wgs
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_wgt0
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_wgt0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_TEX0_BIT|MACH64_PTEX_BIT)
#define TAG(x) x##_wgpt0
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_wgst0
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|\
MACH64_TEX1_BIT)
#define TAG(x) x##_wgst0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|\
MACH64_PTEX_BIT)
#define TAG(x) x##_wgspt0
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT)
#define TAG(x) x##_wgf
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_wgfs
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_wgft0
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT|\
MACH64_TEX1_BIT)
#define TAG(x) x##_wgft0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT|\
MACH64_PTEX_BIT)
#define TAG(x) x##_wgfpt0
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|\
MACH64_TEX0_BIT)
#define TAG(x) x##_wgfst0
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|\
MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_wgfst0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_XYZW_BIT|MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|\
MACH64_TEX0_BIT|MACH64_PTEX_BIT)
#define TAG(x) x##_wgfspt0
#include "mach64_vbtmp.h"
#define IND (MACH64_TEX0_BIT)
#define TAG(x) x##_t0
#include "mach64_vbtmp.h"
#define IND (MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_t0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_FOG_BIT)
#define TAG(x) x##_f
#include "mach64_vbtmp.h"
#define IND (MACH64_FOG_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_ft0
#include "mach64_vbtmp.h"
#define IND (MACH64_FOG_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_ft0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT)
#define TAG(x) x##_g
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_gs
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gt0
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_gt0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gst0
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_gst0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT)
#define TAG(x) x##_gf
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT)
#define TAG(x) x##_gfs
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gft0
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_TEX0_BIT|MACH64_TEX1_BIT)
#define TAG(x) x##_gft0t1
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT)
#define TAG(x) x##_gfst0
#include "mach64_vbtmp.h"
#define IND (MACH64_RGBA_BIT|MACH64_FOG_BIT|MACH64_SPEC_BIT|MACH64_TEX0_BIT|\
MACH64_TEX1_BIT)
#define TAG(x) x##_gfst0t1
#include "mach64_vbtmp.h"
#endif
static void init_setup_tab( void )
{
init_wg();
init_wgs();
init_wgt0();
init_wgt0t1();
init_wgpt0();
init_wgst0();
init_wgst0t1();
init_wgspt0();
init_wgf();
init_wgfs();
init_wgft0();
init_wgft0t1();
init_wgfpt0();
init_wgfst0();
init_wgfst0t1();
init_wgfspt0();
init_t0();
init_t0t1();
init_f();
init_ft0();
init_ft0t1();
init_g();
init_gs();
init_gt0();
init_gt0t1();
init_gst0();
init_gst0t1();
init_gf();
init_gfs();
init_gft0();
init_gft0t1();
init_gfst0();
init_gfst0t1();
}
void mach64PrintSetupFlags( char *msg, GLuint flags )
{
fprintf( stderr, "%s: %d %s%s%s%s%s%s%s\n",
msg,
(int)flags,
(flags & MACH64_XYZW_BIT) ? " xyzw," : "",
(flags & MACH64_RGBA_BIT) ? " rgba," : "",
(flags & MACH64_SPEC_BIT) ? " spec," : "",
(flags & MACH64_FOG_BIT) ? " fog," : "",
(flags & MACH64_TEX0_BIT) ? " tex-0," : "",
(flags & MACH64_TEX1_BIT) ? " tex-1," : "",
(flags & MACH64_PTEX_BIT) ? " ptex," : "");
}
void mach64CheckTexSizes( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT( ctx );
if (!setup_tab[mmesa->SetupIndex].check_tex_sizes(ctx)) {
TNLcontext *tnl = TNL_CONTEXT(ctx);
/* Invalidate stored verts
*/
mmesa->SetupNewInputs = ~0;
mmesa->SetupIndex |= MACH64_PTEX_BIT;
if (!mmesa->Fallback &&
!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) {
tnl->Driver.Render.Interp = setup_tab[mmesa->SetupIndex].interp;
tnl->Driver.Render.CopyPV = setup_tab[mmesa->SetupIndex].copy_pv;
}
}
}
void mach64BuildVertices( struct gl_context *ctx,
GLuint start,
GLuint count,
GLuint newinputs )
{
mach64ContextPtr mmesa = MACH64_CONTEXT( ctx );
GLuint stride = mmesa->vertex_size * sizeof(int);
GLubyte *v = ((GLubyte *)mmesa->verts + (start * stride));
newinputs |= mmesa->SetupNewInputs;
mmesa->SetupNewInputs = 0;
if (!newinputs)
return;
if (newinputs & VERT_BIT_POS) {
setup_tab[mmesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
if (newinputs & VERT_BIT_COLOR0)
ind |= MACH64_RGBA_BIT;
if (newinputs & VERT_BIT_COLOR1)
ind |= MACH64_SPEC_BIT;
if (newinputs & VERT_BIT_TEX0)
ind |= MACH64_TEX0_BIT;
if (newinputs & VERT_BIT_TEX1)
ind |= MACH64_TEX1_BIT;
if (newinputs & VERT_BIT_FOG)
ind |= MACH64_FOG_BIT;
if (mmesa->SetupIndex & MACH64_PTEX_BIT)
ind = ~0;
ind &= mmesa->SetupIndex;
if (ind) {
setup_tab[ind].emit( ctx, start, count, v, stride );
}
}
}
void mach64ChooseVertexState( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
mach64ContextPtr mmesa = MACH64_CONTEXT( ctx );
GLuint ind = MACH64_XYZW_BIT|MACH64_RGBA_BIT;
if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
ind |= MACH64_SPEC_BIT;
if (ctx->Fog.Enabled)
ind |= MACH64_FOG_BIT;
if (ctx->Texture._EnabledUnits) {
ind |= MACH64_TEX0_BIT;
if (ctx->Texture.Unit[0]._ReallyEnabled &&
ctx->Texture.Unit[1]._ReallyEnabled) {
ind |= MACH64_TEX1_BIT;
}
}
mmesa->SetupIndex = ind;
if (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)) {
tnl->Driver.Render.Interp = mach64_interp_extras;
tnl->Driver.Render.CopyPV = mach64_copy_pv_extras;
} else {
tnl->Driver.Render.Interp = setup_tab[ind].interp;
tnl->Driver.Render.CopyPV = setup_tab[ind].copy_pv;
}
#if 0
if (MACH64_DEBUG & DEBUG_VERBOSE_MSG) {
mach64PrintSetupFlags( __FUNCTION__, ind );
}
#endif
if (setup_tab[ind].vertex_format != mmesa->vertex_format) {
FLUSH_BATCH(mmesa);
mmesa->vertex_format = setup_tab[ind].vertex_format;
mmesa->vertex_size = setup_tab[ind].vertex_size;
}
}
#if 0
void mach64_emit_contiguous_verts( struct gl_context *ctx,
GLuint start,
GLuint count )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
GLuint vertex_size = mmesa->vertex_size * 4;
GLuint *dest = mach64AllocDmaLow( mmesa, (count-start) * vertex_size);
setup_tab[mmesa->SetupIndex].emit( ctx, start, count, dest, vertex_size );
}
#endif
void mach64InitVB( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
GLuint size = TNL_CONTEXT(ctx)->vb.Size;
mmesa->verts = (GLubyte *)_mesa_align_malloc(size * 4 * 16, 32);
{
static int firsttime = 1;
if (firsttime) {
init_setup_tab();
firsttime = 0;
}
}
}
void mach64FreeVB( struct gl_context *ctx )
{
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx);
if (mmesa->verts) {
_mesa_align_free(mmesa->verts);
mmesa->verts = 0;
}
}

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src/mesa/drivers/dri/mach64/mach64_vb.h
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@ -1,77 +0,0 @@
/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
#ifndef __MACH64_VB_H__
#define __MACH64_VB_H__
#include "main/mtypes.h"
#include "swrast/swrast.h"
#include "mach64_context.h"
/* premultiply texture coordinates by homogenous coordinate */
#define MACH64_PREMULT_TEXCOORDS
#define _MACH64_NEW_VERTEX_STATE (_DD_NEW_SEPARATE_SPECULAR | \
_DD_NEW_TRI_LIGHT_TWOSIDE | \
_DD_NEW_TRI_UNFILLED | \
_NEW_TEXTURE | \
_NEW_FOG)
extern void mach64CheckTexSizes( struct gl_context *ctx );
extern void mach64ChooseVertexState( struct gl_context *ctx );
extern void mach64BuildVertices( struct gl_context *ctx, GLuint start, GLuint count,
GLuint newinputs );
extern void mach64PrintSetupFlags(char *msg, GLuint flags );
extern void mach64InitVB( struct gl_context *ctx );
extern void mach64FreeVB( struct gl_context *ctx );
#if 0
extern void mach64_emit_contiguous_verts( struct gl_context *ctx,
GLuint start,
GLuint count );
extern void mach64_emit_indexed_verts( struct gl_context *ctx,
GLuint start,
GLuint count );
#endif
extern void mach64_translate_vertex( struct gl_context *ctx,
const mach64Vertex *src,
SWvertex *dst );
extern void mach64_print_vertex( struct gl_context *ctx, const mach64Vertex *v );
#endif /* __MACH64_VB_H__ */

770
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/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Mesa 3-D graphics library
* Version: 3.5
*
* Copyright (C) 1999-2001 Brian Paul All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keithw@valinux.com>
*
* Modified for mach64 by:
* Leif Delgass <ldelgass@retinalburn.net>
* José Fonseca <j_r_fonseca@yahoo.co.uk>
*/
/* Unlike the other templates here, this assumes quite a bit about the
* underlying hardware. Specifically it assumes a d3d-like vertex
* format, with a layout more or less constrained to look like the
* following:
*
* union {
* struct {
* float x, y, z, w;
* struct { char r, g, b, a; } color;
* struct { char r, g, b, fog; } spec;
* float u0, v0;
* float u1, v1;
* float u2, v2;
* float u3, v3;
* } v;
* struct {
* float x, y, z, w;
* struct { char r, g, b, a; } color;
* struct { char r, g, b, fog; } spec;
* float u0, v0, q0;
* float u1, v1, q1;
* float u2, v2, q2;
* float u3, v3, q3;
* } pv;
* struct {
* float x, y, z;
* struct { char r, g, b, a; } color;
* } tv;
* float f[16];
* unsigned int ui[16];
* unsigned char ub4[4][16];
* }
*
* DO_XYZW: Emit xyz and maybe w coordinates.
* DO_RGBA: Emit color.
* DO_SPEC: Emit specular color.
* DO_FOG: Emit fog coordinate in specular alpha.
* DO_TEX0: Emit tex0 u,v coordinates.
* DO_TEX1: Emit tex1 u,v coordinates.
* DO_TEX2: Emit tex2 u,v coordinates.
* DO_TEX3: Emit tex3 u,v coordinates.
* DO_PTEX: Emit tex0,1,2,3 q coordinates where possible.
*
* HAVE_RGBA_COLOR: Hardware takes color in rgba order (else bgra).
*
* HAVE_HW_VIEWPORT: Hardware performs viewport transform.
* HAVE_HW_DIVIDE: Hardware performs perspective divide.
*
* HAVE_TINY_VERTICES: Hardware understands v.tv format.
* HAVE_PTEX_VERTICES: Hardware understands v.pv format.
* HAVE_NOTEX_VERTICES: Hardware understands v.v format with texcount 0.
*
* Additionally, this template assumes it is emitting *transformed*
* vertices; the modifications to emit untransformed vertices (ie. to
* t&l hardware) are probably too great to cooexist with the code
* already in this file.
*
* NOTE: The PTEX vertex format always includes TEX0 and TEX1, even if
* only TEX0 is enabled, in order to maintain a vertex size which is
* an exact number of quadwords.
*/
#if (HAVE_HW_VIEWPORT)
#define VIEWPORT_X(dst,x) dst = x
#define VIEWPORT_Y(dst,y) dst = y
#define VIEWPORT_Z(dst,z) dst = z
#else
#define VIEWPORT_X(dst,x) dst = s[0] * x + s[12]
#define VIEWPORT_Y(dst,y) dst = s[5] * y + s[13]
#define VIEWPORT_Z(dst,z) dst = s[10] * z + s[14]
#endif
#if (HAVE_HW_DIVIDE && !HAVE_PTEX_VERTICES)
#error "can't cope with this combination"
#endif
#ifndef LOCALVARS
#define LOCALVARS
#endif
#ifndef CHECK_HW_DIVIDE
#define CHECK_HW_DIVIDE 1
#endif
#if (HAVE_HW_DIVIDE || DO_SPEC || DO_TEX0 || DO_FOG || !HAVE_TINY_VERTICES)
static void TAG(emit)( struct gl_context *ctx,
GLuint start, GLuint end,
void *dest,
GLuint stride )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
GLfloat (*tc0)[4], (*tc1)[4], (*fog)[4];
GLfloat (*tc2)[4], (*tc3)[4];
GLfloat (*spec)[4];
GLfloat (*col)[4];
GLuint col_stride;
GLuint tc0_stride, tc1_stride, spec_stride, fog_stride;
GLuint tc2_stride, tc3_stride;
GLuint tc0_size, tc1_size;
GLuint tc2_size, tc3_size;
GLfloat (*coord)[4];
GLuint coord_stride;
VERTEX *v = (VERTEX *)dest;
const GLfloat *s = GET_VIEWPORT_MAT();
const GLubyte *mask = VB->ClipMask;
int i;
/* fprintf(stderr, "%s(big) importable %d %d..%d\n", */
/* __FUNCTION__, VB->importable_data, start, end); */
if (HAVE_HW_VIEWPORT && HAVE_HW_DIVIDE && CHECK_HW_DIVIDE) {
(void) s;
coord = VB->ClipPtr->data;
coord_stride = VB->ClipPtr->stride;
}
else {
coord = VB->NdcPtr->data;
coord_stride = VB->NdcPtr->stride;
}
if (DO_TEX3) {
const GLuint t3 = GET_TEXSOURCE(3);
tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data;
tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride;
if (DO_PTEX)
tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size;
}
if (DO_TEX2) {
const GLuint t2 = GET_TEXSOURCE(2);
tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data;
tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;
if (DO_PTEX)
tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size;
}
if (DO_TEX1) {
const GLuint t1 = GET_TEXSOURCE(1);
tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
if (DO_PTEX)
tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;
}
if (DO_TEX0) {
const GLuint t0 = GET_TEXSOURCE(0);
tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
if (DO_PTEX)
tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;
}
if (DO_RGBA) {
col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
}
if (DO_SPEC) {
spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
}
if (DO_FOG) {
if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
static GLfloat tmp[4] = {0, 0, 0, 0};
fog = &tmp;
fog_stride = 0;
}
}
/* May have nonstandard strides:
*/
if (start) {
coord = (GLfloat (*)[4])((GLubyte *)coord + start * coord_stride);
if (DO_TEX0)
tc0 = (GLfloat (*)[4])((GLubyte *)tc0 + start * tc0_stride);
if (DO_TEX1)
tc1 = (GLfloat (*)[4])((GLubyte *)tc1 + start * tc1_stride);
if (DO_TEX2)
tc2 = (GLfloat (*)[4])((GLubyte *)tc2 + start * tc2_stride);
if (DO_TEX3)
tc3 = (GLfloat (*)[4])((GLubyte *)tc3 + start * tc3_stride);
if (DO_RGBA)
STRIDE_4F(col, start * col_stride);
if (DO_SPEC)
STRIDE_4F(spec, start * spec_stride);
if (DO_FOG)
STRIDE_4F(fog, start * fog_stride);
// fog = (GLfloat (*)[4])((GLubyte *)fog + start * fog_stride);
/* STRIDE_F(fog, start * fog_stride); */
}
for (i=start; i < end; i++, v = (VERTEX *)((GLubyte *)v + stride)) {
if (DO_XYZW) {
if (HAVE_HW_VIEWPORT || mask[i] == 0) {
/* unclipped */
VIEWPORT_X(v->v.x, coord[0][0]);
VIEWPORT_Y(v->v.y, coord[0][1]);
VIEWPORT_Z(v->v.z, coord[0][2]);
v->v.w = coord[0][3];
} else {
/* clipped */
v->v.w = 1.0;
}
if (MACH64_DEBUG & DEBUG_VERBOSE_PRIMS) {
fprintf(stderr, "%s: vert (importable) %d: %.2f %.2f %.2f %f\n",
__FUNCTION__, i, v->v.x, v->v.y, v->v.z, v->v.w);
}
coord = (GLfloat (*)[4])((GLubyte *)coord + coord_stride);
}
if (DO_RGBA) {
if (HAVE_RGBA_COLOR) {
*(GLuint *)&v->v.color = *(GLuint *)&col[0];
STRIDE_4F(col, col_stride);
} else {
v->v.color.blue = col[0][2];
v->v.color.green = col[0][1];
v->v.color.red = col[0][0];
v->v.color.alpha = col[0][3];
STRIDE_4F(col, col_stride);
}
}
if (DO_SPEC) {
v->v.specular.red = spec[0][0];
v->v.specular.green = spec[0][1];
v->v.specular.blue = spec[0][2];
STRIDE_4F(spec, spec_stride);
}
if (DO_FOG) {
v->v.specular.alpha = fog[0][0] * 255.0;
/* STRIDE_F(fog, fog_stride); */
fog = (GLfloat (*)[4])((GLubyte *)fog + fog_stride);
}
if (DO_TEX0) {
v->v.u0 = tc0[0][0];
v->v.v0 = tc0[0][1];
if (MACH64_DEBUG & DEBUG_VERBOSE_PRIMS) {
fprintf(stderr, "%s: vert (importable) %d: u0: %.2f, v0: %.2f, w: %f\n",
__FUNCTION__, i, v->v.u0, v->v.v0, v->v.w);
}
#ifdef MACH64_PREMULT_TEXCOORDS
v->v.u0 *= v->v.w;
v->v.v0 *= v->v.w;
#endif
if (DO_PTEX) {
if (HAVE_PTEX_VERTICES) {
if (tc0_size == 4)
v->pv.q0 = tc0[0][3];
else
v->pv.q0 = 1.0;
}
else if (tc0_size == 4) {
#ifdef MACH64_PREMULT_TEXCOORDS
v->v.w *= tc0[0][3];
#else
float rhw = 1.0 / tc0[0][3];
v->v.w *= tc0[0][3];
v->v.u0 *= rhw;
v->v.v0 *= rhw;
#endif
}
}
tc0 = (GLfloat (*)[4])((GLubyte *)tc0 + tc0_stride);
}
if (DO_TEX1) {
if (DO_PTEX) {
v->pv.u1 = tc1[0][0];
v->pv.v1 = tc1[0][1];
if (tc1_size == 4)
v->pv.q1 = tc1[0][3];
else
v->pv.q1 = 1.0;
}
else {
v->v.u1 = tc1[0][0];
v->v.v1 = tc1[0][1];
}
#ifdef MACH64_PREMULT_TEXCOORDS
v->v.u1 *= v->v.w;
v->v.v1 *= v->v.w;
#endif
tc1 = (GLfloat (*)[4])((GLubyte *)tc1 + tc1_stride);
}
else if (DO_PTEX) {
*(GLuint *)&v->pv.q1 = 0; /* avoid culling on radeon */
}
if (DO_TEX2) {
if (DO_PTEX) {
v->pv.u2 = tc2[0][0];
v->pv.v2 = tc2[0][1];
if (tc2_size == 4)
v->pv.q2 = tc2[0][3];
else
v->pv.q2 = 1.0;
}
else {
v->v.u2 = tc2[0][0];
v->v.v2 = tc2[0][1];
}
tc2 = (GLfloat (*)[4])((GLubyte *)tc2 + tc2_stride);
}
if (DO_TEX3) {
if (DO_PTEX) {
v->pv.u3 = tc3[0][0];
v->pv.v3 = tc3[0][1];
if (tc3_size == 4)
v->pv.q3 = tc3[0][3];
else
v->pv.q3 = 1.0;
}
else {
v->v.u3 = tc3[0][0];
v->v.v3 = tc3[0][1];
}
tc3 = (GLfloat (*)[4])((GLubyte *)tc3 + tc3_stride);
}
}
}
#else
#if DO_XYZW
#if HAVE_HW_DIVIDE
#error "cannot use tiny vertices with hw perspective divide"
#endif
static void TAG(emit)( struct gl_context *ctx, GLuint start, GLuint end,
void *dest, GLuint stride )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
GLfloat (*col)[4];
GLuint col_stride;
GLfloat (*coord)[4] = VB->NdcPtr->data;
GLuint coord_stride = VB->NdcPtr->stride;
GLfloat *v = (GLfloat *)dest;
const GLubyte *mask = VB->ClipMask;
const GLfloat *s = GET_VIEWPORT_MAT();
int i;
(void) s;
ASSERT(stride == 4);
col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
/* Pack what's left into a 4-dword vertex. Color is in a different
* place, and there is no 'w' coordinate.
*/
if (start) {
coord = (GLfloat (*)[4])((GLubyte *)coord + start * coord_stride);
STRIDE_4F(col, start * col_stride);
}
for (i=start; i < end; i++, v+=4) {
if (HAVE_HW_VIEWPORT || mask[i] == 0) {
VIEWPORT_X(v[0], coord[0][0]);
VIEWPORT_Y(v[1], coord[0][1]);
VIEWPORT_Z(v[2], coord[0][2]);
}
coord = (GLfloat (*)[4])((GLubyte *)coord + coord_stride);
if (DO_RGBA) {
if (HAVE_RGBA_COLOR) {
*(GLuint *)&v[3] = *(GLuint *)col;
}
else {
GLubyte *b = (GLubyte *)&v[3];
UNCLAMPED_FLOAT_TO_UBYTE(b[0], col[0][2]);
UNCLAMPED_FLOAT_TO_UBYTE(b[1], col[0][1]);
UNCLAMPED_FLOAT_TO_UBYTE(b[2], col[0][0]);
UNCLAMPED_FLOAT_TO_UBYTE(b[3], col[0][3]);
}
STRIDE_4F( col, col_stride );
}
if (MACH64_DEBUG & DEBUG_VERBOSE_PRIMS) {
fprintf(stderr, "vert (importable) %d: %.2f %.2f %.2f %x\n",
i, v[0], v[1], v[2], *(int *)&v[3]);
}
}
}
#else
static void TAG(emit)( struct gl_context *ctx, GLuint start, GLuint end,
void *dest, GLuint stride )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
GLfloat (*col)[4];
GLuint col_stride;
GLfloat *v = (GLfloat *)dest;
int i;
col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
if (start)
STRIDE_4F(col, col_stride * start);
/* Need to figure out where color is:
*/
if (GET_VERTEX_FORMAT() == TINY_VERTEX_FORMAT)
v += 3;
else
v += 4;
for (i=start; i < end; i++, STRIDE_F(v, stride)) {
if (HAVE_RGBA_COLOR) {
*(GLuint *)v = *(GLuint *)col[0];
}
else {
GLubyte *b = (GLubyte *)v;
UNCLAMPED_FLOAT_TO_UBYTE(b[0], col[0][2]);
UNCLAMPED_FLOAT_TO_UBYTE(b[1], col[0][1]);
UNCLAMPED_FLOAT_TO_UBYTE(b[2], col[0][0]);
UNCLAMPED_FLOAT_TO_UBYTE(b[3], col[0][3]);
}
STRIDE_4F( col, col_stride );
}
}
#endif /* emit */
#endif /* emit */
#if (DO_XYZW) && (DO_RGBA)
#if (HAVE_PTEX_VERTICES)
static GLboolean TAG(check_tex_sizes)( struct gl_context *ctx )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
/* Force 'missing' texcoords to something valid.
*/
if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0)
VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3];
if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0)
VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2];
if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
(DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
(DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) ||
(DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4))
return GL_FALSE;
return GL_TRUE;
}
#else
static GLboolean TAG(check_tex_sizes)( struct gl_context *ctx )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
/* Force 'missing' texcoords to something valid.
*/
if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0)
VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3];
if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0)
VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2];
if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
/* No hardware support for projective texture. Can fake it for
* TEX0 only.
*/
if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
(DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
(DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {
PTEX_FALLBACK();
return GL_FALSE;
}
if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {
if (DO_TEX1 || DO_TEX2 || DO_TEX3) {
PTEX_FALLBACK();
}
return GL_FALSE;
}
return GL_TRUE;
}
#endif /* ptex */
static void TAG(interp)( struct gl_context *ctx,
GLfloat t,
GLuint edst, GLuint eout, GLuint ein,
GLboolean force_boundary )
{
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
GLubyte *ddverts = GET_VERTEX_STORE();
GLuint size = GET_VERTEX_SIZE();
const GLfloat *dstclip = VB->ClipPtr->data[edst];
GLfloat w;
const GLfloat *s = GET_VIEWPORT_MAT();
VERTEX *dst = (VERTEX *)(ddverts + (edst * size));
VERTEX *in = (VERTEX *)(ddverts + (ein * size));
VERTEX *out = (VERTEX *)(ddverts + (eout * size));
(void)s;
if (HAVE_HW_DIVIDE && CHECK_HW_DIVIDE) {
VIEWPORT_X( dst->v.x, dstclip[0] );
VIEWPORT_Y( dst->v.y, dstclip[1] );
VIEWPORT_Z( dst->v.z, dstclip[2] );
w = dstclip[3];
}
else {
w = (dstclip[3] == 0.0F) ? 1.0 : (1.0 / dstclip[3]);
VIEWPORT_X( dst->v.x, dstclip[0] * w );
VIEWPORT_Y( dst->v.y, dstclip[1] * w );
VIEWPORT_Z( dst->v.z, dstclip[2] * w );
}
if (MACH64_DEBUG & DEBUG_VERBOSE_PRIMS) {
fprintf( stderr, "%s: dst vert: %.2f %.2f %.2f %f\n",
__FUNCTION__,
dst->v.x,
dst->v.y,
dst->v.z,
w );
}
if ((HAVE_HW_DIVIDE && CHECK_HW_DIVIDE) ||
DO_FOG || DO_SPEC || DO_TEX0 || DO_TEX1 ||
DO_TEX2 || DO_TEX3 || !HAVE_TINY_VERTICES) {
dst->v.w = w;
INTERP_UB( t, dst->ub4[4][0], out->ub4[4][0], in->ub4[4][0] );
INTERP_UB( t, dst->ub4[4][1], out->ub4[4][1], in->ub4[4][1] );
INTERP_UB( t, dst->ub4[4][2], out->ub4[4][2], in->ub4[4][2] );
INTERP_UB( t, dst->ub4[4][3], out->ub4[4][3], in->ub4[4][3] );
if (DO_SPEC) {
INTERP_UB( t, dst->ub4[5][0], out->ub4[5][0], in->ub4[5][0] );
INTERP_UB( t, dst->ub4[5][1], out->ub4[5][1], in->ub4[5][1] );
INTERP_UB( t, dst->ub4[5][2], out->ub4[5][2], in->ub4[5][2] );
}
if (DO_FOG) {
INTERP_UB( t, dst->ub4[5][3], out->ub4[5][3], in->ub4[5][3] );
}
if (DO_TEX0) {
if (DO_PTEX) {
if (HAVE_PTEX_VERTICES) {
INTERP_F( t, dst->pv.u0, out->pv.u0, in->pv.u0 );
INTERP_F( t, dst->pv.v0, out->pv.v0, in->pv.v0 );
INTERP_F( t, dst->pv.q0, out->pv.q0, in->pv.q0 );
} else {
GLfloat wout = VB->NdcPtr->data[eout][3];
GLfloat win = VB->NdcPtr->data[ein][3];
GLfloat qout = out->pv.w / wout;
GLfloat qin = in->pv.w / win;
GLfloat qdst, rqdst;
ASSERT( !HAVE_HW_DIVIDE );
INTERP_F( t, dst->v.u0, out->v.u0 * qout, in->v.u0 * qin );
INTERP_F( t, dst->v.v0, out->v.v0 * qout, in->v.v0 * qin );
INTERP_F( t, qdst, qout, qin );
rqdst = 1.0 / qdst;
dst->v.u0 *= rqdst;
dst->v.v0 *= rqdst;
dst->v.w *= rqdst;
}
}
else {
#ifdef MACH64_PREMULT_TEXCOORDS
GLfloat qout = 1 / out->v.w;
GLfloat qin = 1 / in->v.w;
INTERP_F( t, dst->v.u0, out->v.u0 * qout, in->v.u0 * qin);
INTERP_F( t, dst->v.v0, out->v.v0 * qout, in->v.v0 * qin);
dst->v.u0 *= w;
dst->v.v0 *= w;
#else
INTERP_F( t, dst->v.u0, out->v.u0, in->v.u0 );
INTERP_F( t, dst->v.v0, out->v.v0, in->v.v0 );
#endif
}
}
if (DO_TEX1) {
if (DO_PTEX) {
INTERP_F( t, dst->pv.u1, out->pv.u1, in->pv.u1 );
INTERP_F( t, dst->pv.v1, out->pv.v1, in->pv.v1 );
INTERP_F( t, dst->pv.q1, out->pv.q1, in->pv.q1 );
} else {
#ifdef MACH64_PREMULT_TEXCOORDS
GLfloat qout = 1 / out->v.w;
GLfloat qin = 1 / in->v.w;
INTERP_F( t, dst->v.u1, out->v.u1 * qout, in->v.u1 * qin );
INTERP_F( t, dst->v.v1, out->v.v1 * qout, in->v.v1 * qin );
dst->v.u1 *= w;
dst->v.v1 *= w;
#else
INTERP_F( t, dst->v.u1, out->v.u1, in->v.u1 );
INTERP_F( t, dst->v.v1, out->v.v1, in->v.v1 );
#endif
}
}
else if (DO_PTEX) {
dst->pv.q0 = 0.0; /* must be a valid float on radeon */
}
if (DO_TEX2) {
if (DO_PTEX) {
INTERP_F( t, dst->pv.u2, out->pv.u2, in->pv.u2 );
INTERP_F( t, dst->pv.v2, out->pv.v2, in->pv.v2 );
INTERP_F( t, dst->pv.q2, out->pv.q2, in->pv.q2 );
} else {
INTERP_F( t, dst->v.u2, out->v.u2, in->v.u2 );
INTERP_F( t, dst->v.v2, out->v.v2, in->v.v2 );
}
}
if (DO_TEX3) {
if (DO_PTEX) {
INTERP_F( t, dst->pv.u3, out->pv.u3, in->pv.u3 );
INTERP_F( t, dst->pv.v3, out->pv.v3, in->pv.v3 );
INTERP_F( t, dst->pv.q3, out->pv.q3, in->pv.q3 );
} else {
INTERP_F( t, dst->v.u3, out->v.u3, in->v.u3 );
INTERP_F( t, dst->v.v3, out->v.v3, in->v.v3 );
}
}
} else {
/* 4-dword vertex. Color is in v[3] and there is no oow coordinate.
*/
INTERP_UB( t, dst->ub4[3][0], out->ub4[3][0], in->ub4[3][0] );
INTERP_UB( t, dst->ub4[3][1], out->ub4[3][1], in->ub4[3][1] );
INTERP_UB( t, dst->ub4[3][2], out->ub4[3][2], in->ub4[3][2] );
INTERP_UB( t, dst->ub4[3][3], out->ub4[3][3], in->ub4[3][3] );
}
}
#endif /* rgba && xyzw */
static void TAG(init)( void )
{
setup_tab[IND].emit = TAG(emit);
#if (DO_XYZW && DO_RGBA)
setup_tab[IND].check_tex_sizes = TAG(check_tex_sizes);
setup_tab[IND].interp = TAG(interp);
#endif
if (DO_SPEC)
setup_tab[IND].copy_pv = copy_pv_rgba4_spec5;
else if (HAVE_HW_DIVIDE || DO_SPEC || DO_FOG || DO_TEX0 || DO_TEX1 ||
DO_TEX2 || DO_TEX3 || !HAVE_TINY_VERTICES)
setup_tab[IND].copy_pv = copy_pv_rgba4;
else
setup_tab[IND].copy_pv = copy_pv_rgba3;
if (DO_TEX3) {
if (DO_PTEX) {
ASSERT(HAVE_PTEX_VERTICES);
setup_tab[IND].vertex_format = PROJ_TEX3_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 18;
}
else {
setup_tab[IND].vertex_format = TEX3_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 14;
}
}
else if (DO_TEX2) {
if (DO_PTEX) {
ASSERT(HAVE_PTEX_VERTICES);
setup_tab[IND].vertex_format = PROJ_TEX3_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 18;
}
else {
setup_tab[IND].vertex_format = TEX2_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 12;
}
}
else if (DO_TEX1) {
if (DO_PTEX) {
ASSERT(HAVE_PTEX_VERTICES);
setup_tab[IND].vertex_format = PROJ_TEX1_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 12;
}
else {
setup_tab[IND].vertex_format = TEX1_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 10;
}
}
else if (DO_TEX0) {
if (DO_PTEX && HAVE_PTEX_VERTICES) {
setup_tab[IND].vertex_format = PROJ_TEX1_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 12;
} else {
setup_tab[IND].vertex_format = TEX0_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 8;
}
}
else if (!HAVE_HW_DIVIDE && !DO_SPEC && !DO_FOG && HAVE_TINY_VERTICES) {
setup_tab[IND].vertex_format = TINY_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 4;
} else if (HAVE_NOTEX_VERTICES) {
setup_tab[IND].vertex_format = NOTEX_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 6;
} else {
setup_tab[IND].vertex_format = TEX0_VERTEX_FORMAT;
setup_tab[IND].vertex_size = 8;
}
}
#undef IND
#undef TAG

126
src/mesa/drivers/dri/mach64/server/mach64_dri.h
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@ -1,126 +0,0 @@
/* -*- mode: c; c-basic-offset: 3 -*- */
/*
* Copyright 2000 Gareth Hughes
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Leif Delgass <ldelgass@retinalburn.net>
*/
#ifndef __MACH64_DRI_H__
#define __MACH64_DRI_H__ 1
#include "xf86drm.h"
typedef struct {
drm_handle_t fbHandle;
drm_handle_t regsHandle;
drmSize regsSize;
int IsPCI;
drm_handle_t agpHandle; /* Handle from drmAgpAlloc */
unsigned long agpOffset;
drmSize agpSize;
int agpMode;
/* DMA descriptor ring */
unsigned long ringStart; /* Offset into AGP space */
drm_handle_t ringHandle; /* Handle from drmAddMap */
drmSize ringMapSize; /* Size of map */
int ringSize; /* Size of ring (in kB) */
drmAddress ringMap; /* Map */
/* vertex buffer data */
unsigned long bufferStart; /* Offset into AGP space */
drm_handle_t bufferHandle; /* Handle from drmAddMap */
drmSize bufferMapSize; /* Size of map */
int bufferSize; /* Size of buffers (in MB) */
drmAddress bufferMap; /* Map */
drmBufMapPtr drmBuffers; /* Buffer map */
int numBuffers; /* Number of buffers */
/* AGP Texture data */
unsigned long agpTexStart; /* Offset into AGP space */
drm_handle_t agpTexHandle; /* Handle from drmAddMap */
drmSize agpTexMapSize; /* Size of map */
int agpTexSize; /* Size of AGP tex space (in MB) */
drmAddress agpTexMap; /* Map */
int log2AGPTexGran;
int fbX;
int fbY;
int backX;
int backY;
int depthX;
int depthY;
int frontOffset;
int frontPitch;
int backOffset;
int backPitch;
int depthOffset;
int depthPitch;
int textureOffset;
int textureSize;
int logTextureGranularity;
} ATIDRIServerInfoRec, *ATIDRIServerInfoPtr;
typedef struct {
int chipset;
int width;
int height;
int mem;
int cpp;
int IsPCI;
int AGPMode;
unsigned int frontOffset;
unsigned int frontPitch;
unsigned int backOffset;
unsigned int backPitch;
unsigned int depthOffset;
unsigned int depthPitch;
unsigned int textureOffset;
unsigned int textureSize;
int logTextureGranularity;
drm_handle_t regs;
drmSize regsSize;
drm_handle_t agp;
drmSize agpSize;
unsigned int agpTextureOffset;
unsigned int agpTextureSize;
int logAgpTextureGranularity;
} ATIDRIRec, *ATIDRIPtr;
#endif /* __MACH64_DRI_H__ */

234
src/mesa/drivers/dri/mga/Doxyfile
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@ -1,234 +0,0 @@
# Doxyfile 1.3.3-Gideon
#---------------------------------------------------------------------------
# General configuration options
#---------------------------------------------------------------------------
PROJECT_NAME = mga
PROJECT_NUMBER = $VERSION$
OUTPUT_DIRECTORY =
OUTPUT_LANGUAGE = English
USE_WINDOWS_ENCODING = NO
EXTRACT_ALL = NO
EXTRACT_PRIVATE = NO
EXTRACT_STATIC = NO
EXTRACT_LOCAL_CLASSES = YES
HIDE_UNDOC_MEMBERS = NO
HIDE_UNDOC_CLASSES = NO
HIDE_FRIEND_COMPOUNDS = NO
HIDE_IN_BODY_DOCS = NO
BRIEF_MEMBER_DESC = YES
REPEAT_BRIEF = YES
ALWAYS_DETAILED_SEC = NO
INLINE_INHERITED_MEMB = NO
FULL_PATH_NAMES = NO
STRIP_FROM_PATH =
INTERNAL_DOCS = NO
CASE_SENSE_NAMES = YES
SHORT_NAMES = NO
HIDE_SCOPE_NAMES = NO
SHOW_INCLUDE_FILES = YES
JAVADOC_AUTOBRIEF = NO
MULTILINE_CPP_IS_BRIEF = NO
DETAILS_AT_TOP = NO
INHERIT_DOCS = YES
INLINE_INFO = YES
SORT_MEMBER_DOCS = YES
DISTRIBUTE_GROUP_DOC = NO
TAB_SIZE = 8
GENERATE_TODOLIST = YES
GENERATE_TESTLIST = YES
GENERATE_BUGLIST = YES
GENERATE_DEPRECATEDLIST= YES
ALIASES =
ENABLED_SECTIONS =
MAX_INITIALIZER_LINES = 30
OPTIMIZE_OUTPUT_FOR_C = NO
OPTIMIZE_OUTPUT_JAVA = NO
SHOW_USED_FILES = YES
SUBGROUPING = YES
#---------------------------------------------------------------------------
# configuration options related to warning and progress messages
#---------------------------------------------------------------------------
QUIET = NO
WARNINGS = YES
WARN_IF_UNDOCUMENTED = YES
WARN_IF_DOC_ERROR = YES
WARN_FORMAT = "$file:$line: $text"
WARN_LOGFILE =
#---------------------------------------------------------------------------
# configuration options related to the input files
#---------------------------------------------------------------------------
INPUT = /home/newtree/temp/src/mesa/drivers/dri/mga
FILE_PATTERNS = *.c \
*.cc \
*.cxx \
*.cpp \
*.c++ \
*.java \
*.ii \
*.ixx \
*.ipp \
*.i++ \
*.inl \
*.h \
*.hh \
*.hxx \
*.hpp \
*.h++ \
*.idl \
*.odl \
*.cs \
*.C \
*.H \
*.tlh \
*.diff \
*.patch \
*.moc \
*.xpm \
*.dox
RECURSIVE = yes
EXCLUDE =
EXCLUDE_SYMLINKS = NO
EXCLUDE_PATTERNS =
EXAMPLE_PATH =
EXAMPLE_PATTERNS = *
EXAMPLE_RECURSIVE = NO
IMAGE_PATH =
INPUT_FILTER =
FILTER_SOURCE_FILES = NO
#---------------------------------------------------------------------------
# configuration options related to source browsing
#---------------------------------------------------------------------------
SOURCE_BROWSER = NO
INLINE_SOURCES = NO
STRIP_CODE_COMMENTS = YES
REFERENCED_BY_RELATION = YES
REFERENCES_RELATION = YES
VERBATIM_HEADERS = YES
#---------------------------------------------------------------------------
# configuration options related to the alphabetical class index
#---------------------------------------------------------------------------
ALPHABETICAL_INDEX = NO
COLS_IN_ALPHA_INDEX = 5
IGNORE_PREFIX =
#---------------------------------------------------------------------------
# configuration options related to the HTML output
#---------------------------------------------------------------------------
GENERATE_HTML = YES
HTML_OUTPUT = html
HTML_FILE_EXTENSION = .html
HTML_HEADER =
HTML_FOOTER =
HTML_STYLESHEET =
HTML_ALIGN_MEMBERS = YES
GENERATE_HTMLHELP = NO
CHM_FILE =
HHC_LOCATION =
GENERATE_CHI = NO
BINARY_TOC = NO
TOC_EXPAND = NO
DISABLE_INDEX = NO
ENUM_VALUES_PER_LINE = 4
GENERATE_TREEVIEW = NO
TREEVIEW_WIDTH = 250
#---------------------------------------------------------------------------
# configuration options related to the LaTeX output
#---------------------------------------------------------------------------
GENERATE_LATEX = YES
LATEX_OUTPUT = latex
LATEX_CMD_NAME = latex
MAKEINDEX_CMD_NAME = makeindex
COMPACT_LATEX = NO
PAPER_TYPE = a4wide
EXTRA_PACKAGES =
LATEX_HEADER =
PDF_HYPERLINKS = NO
USE_PDFLATEX = NO
LATEX_BATCHMODE = NO
LATEX_HIDE_INDICES = NO
#---------------------------------------------------------------------------
# configuration options related to the RTF output
#---------------------------------------------------------------------------
GENERATE_RTF = NO
RTF_OUTPUT = rtf
COMPACT_RTF = NO
RTF_HYPERLINKS = NO
RTF_STYLESHEET_FILE =
RTF_EXTENSIONS_FILE =
#---------------------------------------------------------------------------
# configuration options related to the man page output
#---------------------------------------------------------------------------
GENERATE_MAN = NO
MAN_OUTPUT = man
MAN_EXTENSION = .3
MAN_LINKS = NO
#---------------------------------------------------------------------------
# configuration options related to the XML output
#---------------------------------------------------------------------------
GENERATE_XML = yes
XML_OUTPUT = xml
XML_SCHEMA =
XML_DTD =
#---------------------------------------------------------------------------
# configuration options for the AutoGen Definitions output
#---------------------------------------------------------------------------
GENERATE_AUTOGEN_DEF = NO
#---------------------------------------------------------------------------
# configuration options related to the Perl module output
#---------------------------------------------------------------------------
GENERATE_PERLMOD = NO
PERLMOD_LATEX = NO
PERLMOD_PRETTY = YES
PERLMOD_MAKEVAR_PREFIX =
#---------------------------------------------------------------------------
# Configuration options related to the preprocessor
#---------------------------------------------------------------------------
ENABLE_PREPROCESSING = YES
MACRO_EXPANSION = NO
EXPAND_ONLY_PREDEF = NO
SEARCH_INCLUDES = YES
INCLUDE_PATH =
INCLUDE_FILE_PATTERNS =
PREDEFINED =
EXPAND_AS_DEFINED =
SKIP_FUNCTION_MACROS = YES
#---------------------------------------------------------------------------
# Configuration::addtions related to external references
#---------------------------------------------------------------------------
TAGFILES =
GENERATE_TAGFILE =
ALLEXTERNALS = NO
EXTERNAL_GROUPS = YES
PERL_PATH = /usr/bin/perl
#---------------------------------------------------------------------------
# Configuration options related to the dot tool
#---------------------------------------------------------------------------
CLASS_DIAGRAMS = YES
HIDE_UNDOC_RELATIONS = YES
HAVE_DOT = NO
CLASS_GRAPH = YES
COLLABORATION_GRAPH = YES
UML_LOOK = NO
TEMPLATE_RELATIONS = NO
INCLUDE_GRAPH = YES
INCLUDED_BY_GRAPH = YES
CALL_GRAPH = NO
GRAPHICAL_HIERARCHY = YES
DOT_IMAGE_FORMAT = png
DOT_PATH =
DOTFILE_DIRS =
MAX_DOT_GRAPH_WIDTH = 1024
MAX_DOT_GRAPH_HEIGHT = 1024
MAX_DOT_GRAPH_DEPTH = 1000
GENERATE_LEGEND = YES
DOT_CLEANUP = YES
#---------------------------------------------------------------------------
# Configuration::addtions related to the search engine
#---------------------------------------------------------------------------
SEARCHENGINE = NO
CGI_NAME = search.cgi
CGI_URL =
DOC_URL =
DOC_ABSPATH =
BIN_ABSPATH = /usr/local/bin/
EXT_DOC_PATHS =

33
src/mesa/drivers/dri/mga/Makefile
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@ -1,33 +0,0 @@
# src/mesa/drivers/dri/mga/Makefile
TOP = ../../../../..
include $(TOP)/configs/current
LIBNAME = mga_dri.so
include ../Makefile.defines
DRIVER_SOURCES = \
mgadd.c \
mgaioctl.c \
mgarender.c \
mgastate.c \
mgatris.c \
mgapixel.c \
mgaspan.c \
mgatex.c \
mgatexmem.c \
mga_texstate.c \
mga_texcombine.c \
mgavb.c \
mga_xmesa.c
C_SOURCES = \
$(COMMON_SOURCES) \
$(DRIVER_SOURCES)
ASM_SOURCES =
include ../Makefile.targets

26
src/mesa/drivers/dri/mga/README
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@ -1,26 +0,0 @@
MGA DRI driver ported from XF86DRI to FBDRI
by Denis Oliver Kropp <dok@directfb.org>
INFO
This driver has been ported from the head branch of XFree86 to
the embedded-1-branch of Mesa.
STATUS
Already working very well as far as I've tested it (16/32 bit).
glxgears runs at 935 fps (G550 32MB AGP 4x, Athlon 1.33) vs 744 fps with XFree.
Other demos (terrain, fire, etc.) have been successfully tested as well.
TODO
- mgaEngineShutdown
- mgaEngineRestore
- SGRAM detection
- remove some unused bits from server/*
- subset driver support
- mgaWaitForVBlank
- deinitialization (from MGADRICloseScreen) a la radeonDestroyScreen

672
src/mesa/drivers/dri/mga/mga_texcombine.c
View File

@ -1,672 +0,0 @@
/*
* Copyright (c) 2003 Ville Syrjala
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Ville Syrjala <syrjala@sci.fi>
*/
#include "main/glheader.h"
#include "mgacontext.h"
#include "mgatex.h"
#include "mgaregs.h"
/*
* GL_ARB_texture_env_combine
* GL_EXT_texture_env_combine
* GL_ARB_texture_env_crossbar
* GL_ATI_texture_env_combine3
*/
#define ARG_DISABLE 0xffffffff
#define MGA_ARG1 0
#define MGA_ARG2 1
#define MGA_ALPHA 2
GLboolean mgaUpdateTextureEnvCombine( struct gl_context *ctx, int unit )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
const int source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
GLuint *reg = ((GLuint *)&mmesa->setup.tdualstage0 + unit);
GLuint numColorArgs = 0, numAlphaArgs = 0;
GLuint arg1[3], arg2[3], alpha[3];
int args[3];
int i;
switch (texUnit->Combine.ModeRGB) {
case GL_REPLACE:
numColorArgs = 1;
break;
case GL_MODULATE:
case GL_ADD:
case GL_ADD_SIGNED:
case GL_SUBTRACT:
numColorArgs = 2;
break;
case GL_INTERPOLATE:
case GL_MODULATE_ADD_ATI:
case GL_MODULATE_SIGNED_ADD_ATI:
case GL_MODULATE_SUBTRACT_ATI:
numColorArgs = 3;
break;
default:
return GL_FALSE;
}
switch (texUnit->Combine.ModeA) {
case GL_REPLACE:
numAlphaArgs = 1;
break;
case GL_MODULATE:
case GL_ADD:
case GL_ADD_SIGNED:
case GL_SUBTRACT:
numAlphaArgs = 2;
break;
default:
return GL_FALSE;
}
/* Start fresh :) */
*reg = 0;
/* COLOR */
for (i = 0; i < 3; i++) {
arg1[i] = 0;
arg2[i] = 0;
alpha[i] = 0;
}
for (i = 0;i < numColorArgs; i++) {
switch (texUnit->Combine.SourceRGB[i]) {
case GL_TEXTURE:
arg1[i] |= 0;
arg2[i] |= ARG_DISABLE;
alpha[i] |= TD0_color_alpha_currtex;
break;
case GL_TEXTURE0:
if (source == 0) {
arg1[i] |= 0;
arg2[i] |= ARG_DISABLE;
alpha[i] |= TD0_color_alpha_currtex;
} else {
if (ctx->Texture._EnabledUnits != 0x03) {
/* disable texturing */
mmesa->setup.dwgctl &= DC_opcod_MASK;
mmesa->setup.dwgctl |= DC_opcod_trap;
mmesa->hw.alpha_sel = AC_alphasel_diffused;
/* return GL_TRUE since we don't need a fallback */
return GL_TRUE;
}
arg1[i] |= ARG_DISABLE;
arg2[i] |= ARG_DISABLE;
alpha[i] |= TD0_color_alpha_prevtex;
}
break;
case GL_TEXTURE1:
if (source == 0) {
if (ctx->Texture._EnabledUnits != 0x03) {
/* disable texturing */
mmesa->setup.dwgctl &= DC_opcod_MASK;
mmesa->setup.dwgctl |= DC_opcod_trap;
mmesa->hw.alpha_sel = AC_alphasel_diffused;
/* return GL_TRUE since we don't need a fallback */
return GL_TRUE;
}
arg1[i] |= ARG_DISABLE;
/* G400 specs (TDUALSTAGE0) */
arg2[i] |= TD0_color_arg2_prevstage;
alpha[i] |= TD0_color_alpha_prevstage;
} else {
arg1[i] |= 0;
arg2[i] |= ARG_DISABLE;
alpha[i] |= TD0_color_alpha_currtex;
}
break;
case GL_CONSTANT:
if (mmesa->fcol_used &&
mmesa->envcolor[source] != mmesa->envcolor[!source])
return GL_FALSE;
arg1[i] |= ARG_DISABLE;
arg2[i] |= TD0_color_arg2_fcol;
alpha[i] |= TD0_color_alpha_fcol;
mmesa->setup.fcol = mmesa->envcolor[source];
mmesa->fcol_used = GL_TRUE;
break;
case GL_PRIMARY_COLOR:
arg1[i] |= ARG_DISABLE;
/* G400 specs (TDUALSTAGE1) */
if (unit == 0 || (mmesa->setup.tdualstage0 &
((TD0_color_sel_mul & TD0_color_sel_add) |
(TD0_alpha_sel_mul & TD0_alpha_sel_add)))) {
arg2[i] |= TD0_color_arg2_diffuse;
alpha[i] |= TD0_color_alpha_diffuse;
} else {
arg2[i] |= ARG_DISABLE;
alpha[i] |= ARG_DISABLE;
}
break;
case GL_PREVIOUS:
arg1[i] |= ARG_DISABLE;
if (unit == 0) {
arg2[i] |= TD0_color_arg2_diffuse;
alpha[i] |= TD0_color_alpha_diffuse;
} else {
arg2[i] |= TD0_color_arg2_prevstage;
alpha[i] |= TD0_color_alpha_prevstage;
}
break;
default:
return GL_FALSE;
}
switch (texUnit->Combine.OperandRGB[i]) {
case GL_SRC_COLOR:
arg1[i] |= 0;
arg2[i] |= 0;
if (texUnit->Combine.SourceRGB[i] == GL_CONSTANT &&
RGBA_EQUAL( mmesa->envcolor[source] )) {
alpha[i] |= 0;
} else {
alpha[i] |= ARG_DISABLE;
}
break;
case GL_ONE_MINUS_SRC_COLOR:
arg1[i] |= TD0_color_arg1_inv_enable;
arg2[i] |= TD0_color_arg2_inv_enable;
if (texUnit->Combine.SourceRGB[i] == GL_CONSTANT &&
RGBA_EQUAL( mmesa->envcolor[source] )) {
alpha[i] |= (TD0_color_alpha1inv_enable |
TD0_color_alpha2inv_enable);
} else {
alpha[i] |= ARG_DISABLE;
}
break;
case GL_SRC_ALPHA:
arg1[i] |= TD0_color_arg1_replicatealpha_enable;
arg2[i] |= TD0_color_arg2_replicatealpha_enable;
alpha[i] |= 0;
break;
case GL_ONE_MINUS_SRC_ALPHA:
arg1[i] |= (TD0_color_arg1_replicatealpha_enable |
TD0_color_arg1_inv_enable);
arg2[i] |= (TD0_color_arg2_replicatealpha_enable |
TD0_color_arg2_inv_enable);
alpha[i] |= (TD0_color_alpha1inv_enable |
TD0_color_alpha2inv_enable);
break;
}
}
switch (texUnit->Combine.ModeRGB) {
case GL_MODULATE_ADD_ATI:
case GL_MODULATE_SIGNED_ADD_ATI:
/* Special handling for ATI_texture_env_combine3.
* If Arg1 == Arg0 or Arg1 == Arg2 we can use arg1 or arg2 as input for
* both multiplier and adder.
*/
/* Arg1 == arg1 */
if (arg1[1] == arg1[0]) {
if ((arg1[1] | arg2[2]) != ARG_DISABLE) {
*reg |= arg1[1] | arg2[2];
args[0] = MGA_ARG1; args[1] = MGA_ARG1; args[2] = MGA_ARG2;
break;
} else
if ((arg1[1] | alpha[2]) != ARG_DISABLE) {
*reg |= arg1[1] | alpha[2];
args[0] = MGA_ARG1; args[1] = MGA_ARG1; args[2] = MGA_ALPHA;
break;
}
}
if (arg1[1] == arg1[2]) {
if ((arg1[1] | arg2[0]) != ARG_DISABLE) {
*reg |= arg1[1] | arg2[0];
args[0] = MGA_ARG2; args[1] = MGA_ARG1; args[2] = MGA_ARG1;
break;
} else
if ((arg1[1] | alpha[0]) != ARG_DISABLE) {
*reg |= arg1[1] | alpha[0];
args[0] = MGA_ALPHA; args[1] = MGA_ARG1; args[2] = MGA_ARG1;
break;
}
}
/* fallthrough */
case GL_MODULATE_SUBTRACT_ATI:
/* Arg1 == arg2 */
if (arg2[1] == arg2[0]) {
if ((arg2[1] | arg1[2]) != ARG_DISABLE) {
*reg |= arg2[1] | arg1[2];
args[0] = MGA_ARG2; args[1] = MGA_ARG2; args[2] = MGA_ARG1;
break;
} else
if ((arg2[1] | alpha[2]) != ARG_DISABLE) {
*reg |= arg2[1] | alpha[2];
args[0] = MGA_ARG2; args[1] = MGA_ARG2; args[2] = MGA_ALPHA;
break;
}
}
if (arg2[1] == arg2[2]) {
if ((arg2[1] | arg1[0]) != ARG_DISABLE) {
*reg |= arg2[1] | arg1[0];
args[0] = MGA_ARG1; args[1] = MGA_ARG2; args[2] = MGA_ARG2;
break;
} else
if ((arg2[1] | alpha[0]) != ARG_DISABLE) {
*reg |= arg2[1] | alpha[0];
args[0] = MGA_ALPHA; args[1] = MGA_ARG2; args[2] = MGA_ARG2;
break;
}
}
/* fallthrough */
default:
/* Find working combo of arg1, arg2 and alpha.
*
* Keep the Arg0 != alpha cases first since there's
* no way to get alpha out by itself (GL_REPLACE).
*
* Keep the Arg2 == alpha cases first because only alpha has the
* capabilities to function as Arg2 (GL_INTERPOLATE). Also good for
* GL_ADD, GL_ADD_SIGNED, GL_SUBTRACT since we can't get alpha to the
* adder.
*
* Keep the Arg1 == alpha cases last for GL_MODULATE_ADD_ATI,
* GL_MODULATE_SIGNED_ADD_ATI. Again because we can't get alpha to the
* adder.
*
* GL_MODULATE_SUBTRACT_ATI needs special treatment since it requires
* that Arg1 == arg2. This requirement clashes with those of other modes.
*/
if ((arg1[0] | arg2[1] | alpha[2]) != ARG_DISABLE) {
*reg |= arg1[0] | arg2[1] | alpha[2];
args[0] = MGA_ARG1; args[1] = MGA_ARG2; args[2] = MGA_ALPHA;
} else
if ((arg1[1] | arg2[0] | alpha[2]) != ARG_DISABLE &&
texUnit->Combine.ModeRGB != GL_MODULATE_SUBTRACT_ATI) {
*reg |= arg1[1] | arg2[0] | alpha[2];
args[0] = MGA_ARG2; args[1] = MGA_ARG1; args[2] = MGA_ALPHA;
} else
if ((arg1[1] | arg2[2] | alpha[0]) != ARG_DISABLE &&
texUnit->Combine.ModeRGB != GL_MODULATE_SUBTRACT_ATI) {
*reg |= arg1[1] | arg2[2] | alpha[0];
args[0] = MGA_ALPHA; args[1] = MGA_ARG1; args[2] = MGA_ARG2;
} else
if ((arg1[2] | arg2[1] | alpha[0]) != ARG_DISABLE) {
*reg |= arg1[2] | arg2[1] | alpha[0];
args[0] = MGA_ALPHA; args[1] = MGA_ARG2; args[2] = MGA_ARG1;
} else
if ((arg1[0] | arg2[2] | alpha[1]) != ARG_DISABLE) {
*reg |= arg1[0] | arg2[2] | alpha[1];
args[0] = MGA_ARG1; args[1] = MGA_ALPHA; args[2] = MGA_ARG2;
} else
if ((arg1[2] | arg2[0] | alpha[1]) != ARG_DISABLE) {
*reg |= arg1[2] | arg2[0] | alpha[1];
args[0] = MGA_ARG2; args[1] = MGA_ALPHA; args[2] = MGA_ARG1;
} else {
/* nothing suitable */
return GL_FALSE;
}
}
switch (texUnit->Combine.ModeRGB) {
case GL_REPLACE:
if (texUnit->Combine.ScaleShiftRGB) {
return GL_FALSE;
}
if (args[0] == MGA_ARG1) {
*reg |= TD0_color_sel_arg1;
} else if (args[0] == MGA_ARG2) {
*reg |= TD0_color_sel_arg2;
} else if (args[0] == MGA_ALPHA) {
/* Can't get alpha out by itself */
return GL_FALSE;
}
break;
case GL_MODULATE:
if (texUnit->Combine.ScaleShiftRGB == 1) {
*reg |= TD0_color_modbright_2x;
} else if (texUnit->Combine.ScaleShiftRGB == 2) {
*reg |= TD0_color_modbright_4x;
}
*reg |= TD0_color_sel_mul;
if (args[0] == MGA_ALPHA || args[1] == MGA_ALPHA) {
if (args[0] == MGA_ARG1 || args[1] == MGA_ARG1) {
*reg |= TD0_color_arg2mul_alpha2;
} else if (args[0] == MGA_ARG2 || args[1] == MGA_ARG2) {
*reg |= TD0_color_arg1mul_alpha1;
}
}
break;
case GL_ADD_SIGNED:
*reg |= TD0_color_addbias_enable;
/* fallthrough */
case GL_ADD:
if (args[0] == MGA_ALPHA || args[1] == MGA_ALPHA) {
/* Can't get alpha to the adder */
return GL_FALSE;
}
if (texUnit->Combine.ScaleShiftRGB == 1) {
*reg |= TD0_color_add2x_enable;
} else if (texUnit->Combine.ScaleShiftRGB == 2) {
return GL_FALSE;
}
*reg |= (TD0_color_add_add |
TD0_color_sel_add);
break;
case GL_INTERPOLATE:
if (args[2] != MGA_ALPHA) {
/* Only alpha can function as Arg2 */
return GL_FALSE;
}
if (texUnit->Combine.ScaleShiftRGB == 1) {
*reg |= TD0_color_add2x_enable;
} else if (texUnit->Combine.ScaleShiftRGB == 2) {
return GL_FALSE;
}
*reg |= (TD0_color_arg1mul_alpha1 |
TD0_color_blend_enable |
TD0_color_arg1add_mulout |
TD0_color_arg2add_mulout |
TD0_color_add_add |
TD0_color_sel_add);
/* Have to do this with xor since GL_ONE_MINUS_SRC_ALPHA may have
* already touched this bit.
*/
*reg ^= TD0_color_alpha1inv_enable;
if (args[0] == MGA_ARG2) {
/* Swap arguments */
*reg ^= (TD0_color_arg1mul_alpha1 |
TD0_color_arg2mul_alpha2 |
TD0_color_alpha1inv_enable |
TD0_color_alpha2inv_enable);
}
if (ctx->Texture._EnabledUnits != 0x03) {
/* Linear blending mode needs dualtex enabled */
*(reg+1) = (TD0_color_arg2_prevstage |
TD0_color_sel_arg2 |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2);
mmesa->force_dualtex = GL_TRUE;
}
break;
case GL_SUBTRACT:
if (args[0] == MGA_ALPHA || args[1] == MGA_ALPHA) {
/* Can't get alpha to the adder */
return GL_FALSE;
}
if (texUnit->Combine.ScaleShiftRGB == 1) {
*reg |= TD0_color_add2x_enable;
} else if (texUnit->Combine.ScaleShiftRGB == 2) {
return GL_FALSE;
}
*reg |= (TD0_color_add_sub |
TD0_color_sel_add);
if (args[0] == MGA_ARG2) {
/* Swap arguments */
*reg ^= (TD0_color_arg1_inv_enable |
TD0_color_arg2_inv_enable);
}
break;
case GL_MODULATE_SIGNED_ADD_ATI:
*reg |= TD0_color_addbias_enable;
/* fallthrough */
case GL_MODULATE_ADD_ATI:
if (args[1] == MGA_ALPHA) {
/* Can't get alpha to the adder */
return GL_FALSE;
}
if (texUnit->Combine.ScaleShiftRGB == 1) {
*reg |= TD0_color_add2x_enable;
} else if (texUnit->Combine.ScaleShiftRGB == 2) {
return GL_FALSE;
}
*reg |= (TD0_color_add_add |
TD0_color_sel_add);
if (args[1] == args[0] || args[1] == args[2]) {
*reg |= TD0_color_arg1add_mulout;
if (args[0] == MGA_ALPHA || args[2] == MGA_ALPHA)
*reg |= TD0_color_arg1mul_alpha1;
if (args[1] == MGA_ARG1) {
/* Swap adder arguments */
*reg ^= (TD0_color_arg1add_mulout |
TD0_color_arg2add_mulout);
if (args[0] == MGA_ALPHA || args[2] == MGA_ALPHA) {
/* Swap multiplier arguments */
*reg ^= (TD0_color_arg1mul_alpha1 |
TD0_color_arg2mul_alpha2);
}
}
} else {
*reg |= (TD0_color_arg2mul_alpha2 |
TD0_color_arg1add_mulout);
if (args[1] == MGA_ARG1) {
/* Swap arguments */
*reg ^= (TD0_color_arg1mul_alpha1 |
TD0_color_arg2mul_alpha2 |
TD0_color_arg1add_mulout |
TD0_color_arg2add_mulout);
}
}
break;
case GL_MODULATE_SUBTRACT_ATI:
if (args[1] != MGA_ARG2) {
/* Can't swap arguments */
return GL_FALSE;
}
if (texUnit->Combine.ScaleShiftRGB == 1) {
*reg |= TD0_color_add2x_enable;
} else if (texUnit->Combine.ScaleShiftRGB == 2) {
return GL_FALSE;
}
*reg |= (TD0_color_add_sub |
TD0_color_sel_add);
if (args[1] == args[0] || args[1] == args[2]) {
*reg |= TD0_color_arg1add_mulout;
if (args[0] == MGA_ALPHA || args[2] == MGA_ALPHA)
*reg |= TD0_color_arg1mul_alpha1;
} else {
*reg |= (TD0_color_arg2mul_alpha2 |
TD0_color_arg1add_mulout);
}
break;
}
/* ALPHA */
for (i = 0; i < 2; i++) {
arg1[i] = 0;
arg2[i] = 0;
}
for (i = 0; i < numAlphaArgs; i++) {
switch (texUnit->Combine.SourceA[i]) {
case GL_TEXTURE:
arg1[i] |= 0;
arg2[i] |= ARG_DISABLE;
break;
case GL_TEXTURE0:
if (source == 0) {
arg1[i] |= 0;
arg2[i] |= ARG_DISABLE;
} else {
if (ctx->Texture._EnabledUnits != 0x03) {
/* disable texturing */
mmesa->setup.dwgctl &= DC_opcod_MASK;
mmesa->setup.dwgctl |= DC_opcod_trap;
mmesa->hw.alpha_sel = AC_alphasel_diffused;
/* return GL_TRUE since we don't need a fallback */
return GL_TRUE;
}
arg1[i] |= ARG_DISABLE;
arg2[i] |= TD0_alpha_arg2_prevtex;
}
break;
case GL_TEXTURE1:
if (source == 0) {
if (ctx->Texture._EnabledUnits != 0x03) {
/* disable texturing */
mmesa->setup.dwgctl &= DC_opcod_MASK;
mmesa->setup.dwgctl |= DC_opcod_trap;
mmesa->hw.alpha_sel = AC_alphasel_diffused;
/* return GL_TRUE since we don't need a fallback */
return GL_TRUE;
}
arg1[i] |= ARG_DISABLE;
/* G400 specs (TDUALSTAGE0) */
arg2[i] |= TD0_alpha_arg2_prevstage;
} else {
arg1[i] |= 0;
arg2[i] |= ARG_DISABLE;
}
break;
case GL_CONSTANT:
if (mmesa->fcol_used &&
mmesa->envcolor[source] != mmesa->envcolor[!source])
return GL_FALSE;
arg1[i] |= ARG_DISABLE;
arg2[i] |= TD0_alpha_arg2_fcol;
mmesa->setup.fcol = mmesa->envcolor[source];
mmesa->fcol_used = GL_TRUE;
break;
case GL_PRIMARY_COLOR:
arg1[i] |= ARG_DISABLE;
/* G400 specs (TDUALSTAGE1) */
if (unit == 0 || (mmesa->setup.tdualstage0 &
((TD0_color_sel_mul & TD0_color_sel_add) |
(TD0_alpha_sel_mul & TD0_alpha_sel_add)))) {
arg2[i] |= TD0_alpha_arg2_diffuse;
} else {
arg2[i] |= ARG_DISABLE;
}
break;
case GL_PREVIOUS:
arg1[i] |= ARG_DISABLE;
if (unit == 0) {
arg2[i] |= TD0_alpha_arg2_diffuse;
} else {
arg2[i] |= TD0_alpha_arg2_prevstage;
}
break;
default:
return GL_FALSE;
}
switch (texUnit->Combine.OperandA[i]) {
case GL_SRC_ALPHA:
arg1[i] |= 0;
arg2[i] |= 0;
break;
case GL_ONE_MINUS_SRC_ALPHA:
arg1[i] |= TD0_alpha_arg1_inv_enable;
arg2[i] |= TD0_alpha_arg2_inv_enable;
break;
}
}
/* Find a working combo of arg1 and arg2 */
if ((arg1[0] | arg2[1]) != ARG_DISABLE) {
*reg |= arg1[0] | arg2[1];
args[0] = MGA_ARG1; args[1] = MGA_ARG2;
} else
if ((arg1[1] | arg2[0]) != ARG_DISABLE) {
*reg |= arg1[1] | arg2[0];
args[0] = MGA_ARG2; args[1] = MGA_ARG1;
} else {
/* nothing suitable */
return GL_FALSE;
}
switch (texUnit->Combine.ModeA) {
case GL_REPLACE:
if (texUnit->Combine.ScaleShiftA) {
return GL_FALSE;
}
if (args[0] == MGA_ARG1) {
*reg |= TD0_alpha_sel_arg1;
} else if (args[0] == MGA_ARG2) {
*reg |= TD0_alpha_sel_arg2;
}
break;
case GL_MODULATE:
if (texUnit->Combine.ScaleShiftA == 1) {
*reg |= TD0_alpha_modbright_2x;
} else if (texUnit->Combine.ScaleShiftA == 2) {
*reg |= TD0_alpha_modbright_4x;
}
*reg |= TD0_alpha_sel_mul;
break;
case GL_ADD_SIGNED:
*reg |= TD0_alpha_addbias_enable;
/* fallthrough */
case GL_ADD:
if (texUnit->Combine.ScaleShiftA == 1) {
*reg |= TD0_alpha_add2x_enable;
} else if (texUnit->Combine.ScaleShiftA == 2) {
return GL_FALSE;
}
*reg |= (TD0_alpha_add_enable |
TD0_alpha_sel_add);
break;
case GL_SUBTRACT:
if (texUnit->Combine.ScaleShiftA == 1) {
*reg |= TD0_alpha_add2x_enable;
} else if (texUnit->Combine.ScaleShiftA == 2) {
return GL_FALSE;
}
*reg |= (TD0_alpha_add_disable |
TD0_alpha_sel_add);
if (args[0] == MGA_ARG2) {
/* Swap arguments */
*reg ^= (TD0_alpha_arg1_inv_enable |
TD0_alpha_arg2_inv_enable);
}
break;
}
return GL_TRUE;
}

898
src/mesa/drivers/dri/mga/mga_texstate.c
View File

@ -1,898 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* (c) Copyright IBM Corporation 2002
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS, IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Ian Romanick <idr@us.ibm.com>
* Keith Whitwell <keithw@tungstengraphics.com>
*/
#include "main/context.h"
#include "main/enums.h"
#include "main/macros.h"
#include "main/mm.h"
#include "main/imports.h"
#include "main/simple_list.h"
#include "mgacontext.h"
#include "mgatex.h"
#include "mgaregs.h"
#include "mgatris.h"
#include "mgaioctl.h"
#define MGA_USE_TABLE_FOR_FORMAT
#ifdef MGA_USE_TABLE_FOR_FORMAT
#define TMC_nr_tformat (MESA_FORMAT_YCBCR_REV + 1)
static const unsigned TMC_tformat[ TMC_nr_tformat ] =
{
[MESA_FORMAT_ARGB8888] = TMC_tformat_tw32,
[MESA_FORMAT_RGB565] = TMC_tformat_tw16,
[MESA_FORMAT_ARGB4444] = TMC_tformat_tw12,
[MESA_FORMAT_ARGB1555] = TMC_tformat_tw15,
[MESA_FORMAT_AL88] = TMC_tformat_tw8al,
[MESA_FORMAT_I8] = TMC_tformat_tw8a,
[MESA_FORMAT_CI8] = TMC_tformat_tw8 ,
[MESA_FORMAT_YCBCR] = TMC_tformat_tw422uyvy,
[MESA_FORMAT_YCBCR_REV] = TMC_tformat_tw422,
};
#endif
static void
mgaSetTexImages( mgaContextPtr mmesa,
const struct gl_texture_object * tObj )
{
mgaTextureObjectPtr t = (mgaTextureObjectPtr) tObj->DriverData;
struct gl_texture_image *baseImage = tObj->Image[0][ tObj->BaseLevel ];
GLint totalSize;
GLint width, height;
GLint i;
GLint numLevels;
GLint log2Width, log2Height;
GLuint txformat = 0;
GLint ofs;
/* Set the hardware texture format
*/
#ifndef MGA_USE_TABLE_FOR_FORMAT
switch (baseImage->TexFormat->MesaFormat) {
case MESA_FORMAT_ARGB8888: txformat = TMC_tformat_tw32; break;
case MESA_FORMAT_RGB565: txformat = TMC_tformat_tw16; break;
case MESA_FORMAT_ARGB4444: txformat = TMC_tformat_tw12; break;
case MESA_FORMAT_ARGB1555: txformat = TMC_tformat_tw15; break;
case MESA_FORMAT_AL88: txformat = TMC_tformat_tw8al; break;
case MESA_FORMAT_I8: txformat = TMC_tformat_tw8a; break;
case MESA_FORMAT_CI8: txformat = TMC_tformat_tw8; break;
case MESA_FORMAT_YCBCR: txformat = TMC_tformat_tw422uyvy; break;
case MESA_FORMAT_YCBCR_REV: txformat = TMC_tformat_tw422; break;
default:
_mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
return;
}
#else
if ( (baseImage->TexFormat >= TMC_nr_tformat)
|| (TMC_tformat[ baseImage->TexFormat ] == 0) )
{
_mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
return;
}
txformat = TMC_tformat[ baseImage->TexFormat ];
#endif /* MGA_USE_TABLE_FOR_FORMAT */
driCalculateTextureFirstLastLevel( (driTextureObject *) t );
if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) {
log2Width = 0;
log2Height = 0;
} else {
log2Width = tObj->Image[0][t->base.firstLevel]->WidthLog2;
log2Height = tObj->Image[0][t->base.firstLevel]->HeightLog2;
}
width = tObj->Image[0][t->base.firstLevel]->Width;
height = tObj->Image[0][t->base.firstLevel]->Height;
numLevels = MIN2( t->base.lastLevel - t->base.firstLevel + 1,
MGA_IS_G200(mmesa) ? G200_TEX_MAXLEVELS : G400_TEX_MAXLEVELS);
totalSize = 0;
for ( i = 0 ; i < numLevels ; i++ ) {
const struct gl_texture_image * const texImage =
tObj->Image[0][ i + t->base.firstLevel ];
int size;
if (texImage == NULL)
break;
size = texImage->Width * texImage->Height *
_mesa_get_format_bytes(baseImage->TexFormat);
t->offsets[i] = totalSize;
t->base.dirty_images[0] |= (1<<i);
/* All mipmaps must be 32-byte aligned */
totalSize += (size + 31) & ~31;
/* Since G400 calculates the offsets in hardware
* it can't handle more than one < 32 byte mipmap.
*
* Further testing has indicated that it can't
* handle any < 32 byte mipmaps.
*/
if (MGA_IS_G400( mmesa ) && size <= 32) {
i++;
break;
}
}
/* save these values */
numLevels = i;
t->base.lastLevel = t->base.firstLevel + numLevels - 1;
t->base.totalSize = totalSize;
/* setup hardware register values */
t->setup.texctl &= (TMC_tformat_MASK & TMC_tpitch_MASK
& TMC_tpitchext_MASK);
t->setup.texctl |= txformat;
/* Set the texture width. In order to support non-power of 2 textures and
* textures larger than 1024 texels wide, "linear" pitch must be used. For
* the linear pitch, if the width is 2048, a value of zero is used.
*/
t->setup.texctl |= TMC_tpitchlin_enable;
t->setup.texctl |= MGA_FIELD( TMC_tpitchext, width & (2048 - 1) );
/* G400 specifies the number of mip levels in a strange way. Since there
* are up to 11 levels, it requires 4 bits. Three of the bits are at the
* high end of TEXFILTER. The other bit is in the middle. Weird.
*/
numLevels--;
t->setup.texfilter &= TF_mapnb_MASK & TF_mapnbhigh_MASK & TF_reserved_MASK;
t->setup.texfilter |= MGA_FIELD( TF_mapnb, numLevels & 0x7 );
t->setup.texfilter |= MGA_FIELD( TF_mapnbhigh, (numLevels >> 3) & 0x1 );
/* warp texture registers */
ofs = MGA_IS_G200(mmesa) ? 28 : 11;
t->setup.texwidth = (MGA_FIELD(TW_twmask, width - 1) |
MGA_FIELD(TW_rfw, (10 - log2Width - 8) & 63 ) |
MGA_FIELD(TW_tw, (log2Width + ofs ) | 0x40 ));
t->setup.texheight = (MGA_FIELD(TH_thmask, height - 1) |
MGA_FIELD(TH_rfh, (10 - log2Height - 8) & 63 ) |
MGA_FIELD(TH_th, (log2Height + ofs ) | 0x40 ));
mgaUploadTexImages( mmesa, t );
}
/* ================================================================
* Texture unit state management
*/
static void mgaUpdateTextureEnvG200( struct gl_context *ctx, GLuint unit )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
struct gl_texture_object *tObj = ctx->Texture.Unit[0]._Current;
mgaTextureObjectPtr t = (mgaTextureObjectPtr) tObj->DriverData;
GLenum format = tObj->Image[0][tObj->BaseLevel]->_BaseFormat;
if (tObj != ctx->Texture.Unit[0].CurrentTex[TEXTURE_2D_INDEX] &&
tObj != ctx->Texture.Unit[0].CurrentTex[TEXTURE_RECT_INDEX])
return;
t->setup.texctl &= ~TMC_tmodulate_enable;
t->setup.texctl2 &= ~(TMC_decalblend_enable |
TMC_idecal_enable |
TMC_decaldis_enable);
switch (ctx->Texture.Unit[0].EnvMode) {
case GL_REPLACE:
if (format == GL_ALPHA)
t->setup.texctl2 |= TMC_idecal_enable;
if (format == GL_RGB || format == GL_LUMINANCE)
mmesa->hw.alpha_sel = AC_alphasel_diffused;
else
mmesa->hw.alpha_sel = AC_alphasel_fromtex;
break;
case GL_MODULATE:
t->setup.texctl |= TMC_tmodulate_enable;
if (format == GL_ALPHA)
t->setup.texctl2 |= (TMC_idecal_enable |
TMC_decaldis_enable);
if (format == GL_RGB || format == GL_LUMINANCE)
mmesa->hw.alpha_sel = AC_alphasel_diffused;
else
mmesa->hw.alpha_sel = AC_alphasel_modulated;
break;
case GL_DECAL:
if (format == GL_RGB || format == GL_RGBA)
t->setup.texctl2 |= TMC_decalblend_enable;
else
t->setup.texctl2 |= TMC_idecal_enable;
mmesa->hw.alpha_sel = AC_alphasel_diffused;
break;
case GL_BLEND:
if (format == GL_ALPHA) {
t->setup.texctl2 |= TMC_idecal_enable;
mmesa->hw.alpha_sel = AC_alphasel_modulated;
} else {
t->texenv_fallback = GL_TRUE;
}
break;
default:
break;
}
}
#define MGA_REPLACE 0
#define MGA_MODULATE 1
#define MGA_DECAL 2
#define MGA_ADD 3
#define MGA_MAX_COMBFUNC 4
static const GLuint g400_color_combine[][MGA_MAX_COMBFUNC] =
{
/* Unit 0:
*/
{
/* GL_REPLACE
* Cv = Cs
* Av = Af
*/
(TD0_color_sel_arg1 |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_arg2),
/* GL_MODULATE
* Cv = Cf Cs
* Av = Af
*/
(TD0_color_arg2_diffuse |
TD0_color_sel_mul |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_arg2),
/* GL_DECAL
* Cv = Cs
* Av = Af
*/
(TD0_color_sel_arg1 |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_arg2),
/* GL_ADD
* Cv = Cf + Cs
* Av = Af
*/
(TD0_color_arg2_diffuse |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_arg2),
},
/* Unit 1:
*/
{
/* GL_REPLACE
* Cv = Cs
* Av = Ap
*/
(TD0_color_sel_arg1 |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2),
/* GL_MODULATE
* Cv = Cp Cs
* Av = Ap
*/
(TD0_color_arg2_prevstage |
TD0_color_sel_mul |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2),
/* GL_DECAL
* Cv = Cs
* Av = Ap
*/
(TD0_color_sel_arg1 |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2),
/* GL_ADD
* Cv = Cp + Cs
* Av = Ap
*/
(TD0_color_arg2_prevstage |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2),
},
};
static const GLuint g400_color_alpha_combine[][MGA_MAX_COMBFUNC] =
{
/* Unit 0:
*/
{
/* GL_REPLACE
* Cv = Cs
* Av = As
*/
(TD0_color_sel_arg1 |
TD0_alpha_sel_arg1),
/* GL_MODULATE
* Cv = Cf Cs
* Av = Af As
*/
(TD0_color_arg2_diffuse |
TD0_color_sel_mul |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_mul),
/* GL_DECAL
* tmp = Cf ( 1 - As )
* Cv = tmp + Cs As
* Av = Af
*/
(TD0_color_arg2_diffuse |
TD0_color_alpha_currtex |
TD0_color_alpha1inv_enable |
TD0_color_arg1mul_alpha1 |
TD0_color_blend_enable |
TD0_color_arg1add_mulout |
TD0_color_arg2add_mulout |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_arg2),
/* GL_ADD
* Cv = Cf + Cs
* Av = Af As
*/
(TD0_color_arg2_diffuse |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_mul),
},
/* Unit 1:
*/
{
/* GL_REPLACE
* Cv = Cs
* Av = As
*/
(TD0_color_sel_arg1 |
TD0_alpha_sel_arg1),
/* GL_MODULATE
* Cv = Cp Cs
* Av = Ap As
*/
(TD0_color_arg2_prevstage |
TD0_color_sel_mul |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_mul),
/* GL_DECAL
* tmp = Cp ( 1 - As )
* Cv = tmp + Cs As
* Av = Ap
*/
(TD0_color_arg2_prevstage |
TD0_color_alpha_currtex |
TD0_color_alpha1inv_enable |
TD0_color_arg1mul_alpha1 |
TD0_color_blend_enable |
TD0_color_arg1add_mulout |
TD0_color_arg2add_mulout |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2),
/* GL_ADD
* Cv = Cp + Cs
* Av = Ap As
*/
(TD0_color_arg2_prevstage |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_mul),
},
};
static const GLuint g400_alpha_combine[][MGA_MAX_COMBFUNC] =
{
/* Unit 0:
*/
{
/* GL_REPLACE
* Cv = Cf
* Av = As
*/
(TD0_color_arg2_diffuse |
TD0_color_sel_arg2 |
TD0_alpha_sel_arg1),
/* GL_MODULATE
* Cv = Cf
* Av = Af As
*/
(TD0_color_arg2_diffuse |
TD0_color_sel_arg2 |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_mul),
/* GL_DECAL (undefined)
* Cv = Cf
* Av = Af
*/
(TD0_color_arg2_diffuse |
TD0_color_sel_arg2 |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_arg2),
/* GL_ADD
* Cv = Cf
* Av = Af As
*/
(TD0_color_arg2_diffuse |
TD0_color_sel_arg2 |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_mul),
},
/* Unit 1:
*/
{
/* GL_REPLACE
* Cv = Cp
* Av = As
*/
(TD0_color_arg2_prevstage |
TD0_color_sel_arg2 |
TD0_alpha_sel_arg1),
/* GL_MODULATE
* Cv = Cp
* Av = Ap As
*/
(TD0_color_arg2_prevstage |
TD0_color_sel_arg2 |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_mul),
/* GL_DECAL (undefined)
* Cv = Cp
* Av = Ap
*/
(TD0_color_arg2_prevstage |
TD0_color_sel_arg2 |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2),
/* GL_ADD
* Cv = Cp
* Av = Ap As
*/
(TD0_color_arg2_prevstage |
TD0_color_sel_arg2 |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_mul),
},
};
static GLboolean mgaUpdateTextureEnvBlend( struct gl_context *ctx, int unit )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
const int source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
const struct gl_texture_object *tObj = texUnit->_Current;
GLuint *reg = ((GLuint *)&mmesa->setup.tdualstage0 + unit);
GLenum format = tObj->Image[0][tObj->BaseLevel]->_BaseFormat;
*reg = 0;
if (format == GL_ALPHA) {
/* Cv = Cf */
*reg |= (TD0_color_arg2_diffuse |
TD0_color_sel_arg2);
/* Av = Af As */
*reg |= (TD0_alpha_arg2_diffuse |
TD0_alpha_sel_mul);
return GL_TRUE;
}
/* C1 = Cf ( 1 - Cs ) */
*reg |= (TD0_color_arg1_inv_enable |
TD0_color_arg2_diffuse |
TD0_color_sel_mul);
if (format == GL_RGB || format == GL_LUMINANCE) {
/* A1 = Af */
*reg |= (TD0_alpha_arg2_diffuse |
TD0_alpha_sel_arg2);
} else
if (format == GL_RGBA || format == GL_LUMINANCE_ALPHA) {
/* A1 = Af As */
*reg |= (TD0_alpha_arg2_diffuse |
TD0_alpha_sel_mul);
} else
if (format == GL_INTENSITY) {
/* A1 = Af ( 1 - As ) */
*reg |= (TD0_alpha_arg1_inv_enable |
TD0_alpha_arg2_diffuse |
TD0_alpha_sel_mul);
}
if (RGB_ZERO(mmesa->envcolor[source]) &&
(format != GL_INTENSITY || ALPHA_ZERO(mmesa->envcolor[source])))
return GL_TRUE; /* all done */
if (ctx->Texture._EnabledUnits == 0x03)
return GL_FALSE; /* need both units */
mmesa->force_dualtex = GL_TRUE;
reg = &mmesa->setup.tdualstage1;
*reg = 0;
if (RGB_ZERO(mmesa->envcolor[source])) {
/* Cv = C1 */
*reg |= (TD0_color_arg2_prevstage |
TD0_color_sel_arg2);
} else
if (RGB_ONE(mmesa->envcolor[source])) {
/* Cv = C1 + Cs */
*reg |= (TD0_color_arg2_prevstage |
TD0_color_add_add |
TD0_color_sel_add);
} else
if (RGBA_EQUAL(mmesa->envcolor[source])) {
/* Cv = C1 + Cc Cs */
*reg |= (TD0_color_arg2_prevstage |
TD0_color_alpha_fcol |
TD0_color_arg2mul_alpha2 |
TD0_color_arg1add_mulout |
TD0_color_add_add |
TD0_color_sel_add);
mmesa->setup.fcol = mmesa->envcolor[source];
} else {
return GL_FALSE;
}
if (format != GL_INTENSITY || ALPHA_ZERO(mmesa->envcolor[source])) {
/* Av = A1 */
*reg |= (TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2);
} else
if (ALPHA_ONE(mmesa->envcolor[source])) {
/* Av = A1 + As */
*reg |= (TD0_alpha_arg2_prevstage |
TD0_alpha_add_enable |
TD0_alpha_sel_add);
} else {
return GL_FALSE;
}
return GL_TRUE;
}
static void mgaUpdateTextureEnvG400( struct gl_context *ctx, GLuint unit )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
const int source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
const struct gl_texture_object *tObj = texUnit->_Current;
GLuint *reg = ((GLuint *)&mmesa->setup.tdualstage0 + unit);
mgaTextureObjectPtr t = (mgaTextureObjectPtr) tObj->DriverData;
GLenum format = tObj->Image[0][tObj->BaseLevel]->_BaseFormat;
if (tObj != ctx->Texture.Unit[source].CurrentTex[TEXTURE_2D_INDEX] &&
tObj != ctx->Texture.Unit[source].CurrentTex[TEXTURE_RECT_INDEX])
return;
switch (ctx->Texture.Unit[source].EnvMode) {
case GL_REPLACE:
if (format == GL_ALPHA) {
*reg = g400_alpha_combine[unit][MGA_REPLACE];
} else if (format == GL_RGB || format == GL_LUMINANCE) {
*reg = g400_color_combine[unit][MGA_REPLACE];
} else {
*reg = g400_color_alpha_combine[unit][MGA_REPLACE];
}
break;
case GL_MODULATE:
if (format == GL_ALPHA) {
*reg = g400_alpha_combine[unit][MGA_MODULATE];
} else if (format == GL_RGB || format == GL_LUMINANCE) {
*reg = g400_color_combine[unit][MGA_MODULATE];
} else {
*reg = g400_color_alpha_combine[unit][MGA_MODULATE];
}
break;
case GL_DECAL:
if (format == GL_RGB) {
*reg = g400_color_combine[unit][MGA_DECAL];
} else if (format == GL_RGBA) {
*reg = g400_color_alpha_combine[unit][MGA_DECAL];
if (ctx->Texture._EnabledUnits != 0x03) {
/* Linear blending mode needs dual texturing enabled */
*(reg+1) = (TD0_color_arg2_prevstage |
TD0_color_sel_arg2 |
TD0_alpha_arg2_prevstage |
TD0_alpha_sel_arg2);
mmesa->force_dualtex = GL_TRUE;
}
} else {
/* Undefined */
*reg = g400_alpha_combine[unit][MGA_DECAL];
}
break;
case GL_ADD:
if (format == GL_ALPHA) {
*reg = g400_alpha_combine[unit][MGA_ADD];
} else if (format == GL_RGB || format == GL_LUMINANCE) {
*reg = g400_color_combine[unit][MGA_ADD];
} else if (format == GL_RGBA || format == GL_LUMINANCE_ALPHA) {
*reg = g400_color_alpha_combine[unit][MGA_ADD];
} else if (format == GL_INTENSITY) {
/* Cv = Cf + Cs
* Av = Af + As
*/
if (unit == 0) {
*reg = (TD0_color_arg2_diffuse |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_diffuse |
TD0_alpha_add_enable |
TD0_alpha_sel_add);
} else {
*reg = (TD0_color_arg2_prevstage |
TD0_color_add_add |
TD0_color_sel_add |
TD0_alpha_arg2_prevstage |
TD0_alpha_add_enable |
TD0_alpha_sel_add);
}
}
break;
case GL_BLEND:
if (!mgaUpdateTextureEnvBlend(ctx, unit))
t->texenv_fallback = GL_TRUE;
break;
case GL_COMBINE:
if (!mgaUpdateTextureEnvCombine(ctx, unit))
t->texenv_fallback = GL_TRUE;
break;
default:
break;
}
}
static void disable_tex( struct gl_context *ctx, int unit )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
/* Texture unit disabled */
if ( mmesa->CurrentTexObj[unit] != NULL ) {
/* The old texture is no longer bound to this texture unit.
* Mark it as such.
*/
mmesa->CurrentTexObj[unit]->base.bound &= ~(1UL << unit);
mmesa->CurrentTexObj[unit] = NULL;
}
if ( unit != 0 && !mmesa->force_dualtex ) {
mmesa->setup.tdualstage1 = mmesa->setup.tdualstage0;
}
if ( ctx->Texture._EnabledUnits == 0 ) {
mmesa->setup.dwgctl &= DC_opcod_MASK;
mmesa->setup.dwgctl |= DC_opcod_trap;
mmesa->hw.alpha_sel = AC_alphasel_diffused;
}
mmesa->dirty |= MGA_UPLOAD_CONTEXT | (MGA_UPLOAD_TEX0 << unit);
}
static GLboolean enable_tex( struct gl_context *ctx, int unit )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
const int source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
const struct gl_texture_object *tObj = texUnit->_Current;
mgaTextureObjectPtr t = (mgaTextureObjectPtr) tObj->DriverData;
/* Upload teximages (not pipelined)
*/
if (t->base.dirty_images[0]) {
FLUSH_BATCH( mmesa );
mgaSetTexImages( mmesa, tObj );
if ( t->base.memBlock == NULL ) {
return GL_FALSE;
}
}
return GL_TRUE;
}
static GLboolean update_tex_common( struct gl_context *ctx, int unit )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
const int source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
struct gl_texture_object *tObj = texUnit->_Current;
mgaTextureObjectPtr t = (mgaTextureObjectPtr) tObj->DriverData;
/* Fallback if there's a texture border */
if ( tObj->Image[0][tObj->BaseLevel]->Border > 0 ) {
return GL_FALSE;
}
/* Update state if this is a different texture object to last
* time.
*/
if ( mmesa->CurrentTexObj[unit] != t ) {
if ( mmesa->CurrentTexObj[unit] != NULL ) {
/* The old texture is no longer bound to this texture unit.
* Mark it as such.
*/
mmesa->CurrentTexObj[unit]->base.bound &= ~(1UL << unit);
}
mmesa->CurrentTexObj[unit] = t;
t->base.bound |= (1UL << unit);
driUpdateTextureLRU( (driTextureObject *) t ); /* done too often */
}
/* register setup */
if ( unit == 1 ) {
mmesa->setup.tdualstage1 = mmesa->setup.tdualstage0;
}
t->texenv_fallback = GL_FALSE;
/* Set this before mgaUpdateTextureEnvG400() since
* GL_ARB_texture_env_crossbar may have to disable texturing.
*/
mmesa->setup.dwgctl &= DC_opcod_MASK;
mmesa->setup.dwgctl |= DC_opcod_texture_trap;
/* FIXME: The Radeon has some cached state so that it can avoid calling
* FIXME: UpdateTextureEnv in some cases. Is that possible here?
*/
if (MGA_IS_G400(mmesa)) {
/* G400: Regardless of texture env mode, we use the alpha from the
* texture unit (AC_alphasel_fromtex) since it will have already
* been modulated by the incoming fragment color, if needed.
* We don't want (AC_alphasel_modulate) since that'll effectively
* do the modulation twice.
*/
mmesa->hw.alpha_sel = AC_alphasel_fromtex;
mgaUpdateTextureEnvG400( ctx, unit );
} else {
mgaUpdateTextureEnvG200( ctx, unit );
}
t->setup.texctl2 &= TMC_dualtex_MASK;
if (ctx->Texture._EnabledUnits == 0x03 || mmesa->force_dualtex) {
t->setup.texctl2 |= TMC_dualtex_enable;
}
mmesa->dirty |= MGA_UPLOAD_CONTEXT | (MGA_UPLOAD_TEX0 << unit);
FALLBACK( ctx, MGA_FALLBACK_BORDER_MODE, t->border_fallback );
return !t->border_fallback && !t->texenv_fallback;
}
static GLboolean updateTextureUnit( struct gl_context *ctx, int unit )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
const int source = mmesa->tmu_source[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[source];
if ( texUnit->_ReallyEnabled == TEXTURE_2D_BIT ||
texUnit->_ReallyEnabled == TEXTURE_RECT_BIT ) {
return(enable_tex( ctx, unit ) &&
update_tex_common( ctx, unit ));
}
else if ( texUnit->_ReallyEnabled ) {
return GL_FALSE;
}
else {
disable_tex( ctx, unit );
return GL_TRUE;
}
}
/* The G400 is now programmed quite differently wrt texture environment.
*/
void mgaUpdateTextureState( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
GLboolean ok;
unsigned i;
mmesa->force_dualtex = GL_FALSE;
mmesa->fcol_used = GL_FALSE;
/* This works around a quirk with the MGA hardware. If only OpenGL
* TEXTURE1 is enabled, then the hardware TEXTURE0 must be used. The
* hardware TEXTURE1 can ONLY be used when hardware TEXTURE0 is also used.
*/
mmesa->tmu_source[0] = 0;
mmesa->tmu_source[1] = 1;
if ((ctx->Texture._EnabledUnits & 0x03) == 0x02) {
/* only texture 1 enabled */
mmesa->tmu_source[0] = 1;
mmesa->tmu_source[1] = 0;
}
for ( i = 0, ok = GL_TRUE
; (i < ctx->Const.MaxTextureUnits) && ok
; i++ ) {
ok = updateTextureUnit( ctx, i );
}
FALLBACK( ctx, MGA_FALLBACK_TEXTURE, !ok );
}

1005
src/mesa/drivers/dri/mga/mga_xmesa.c
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154
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@ -1,154 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef _MGA_INIT_H_
#define _MGA_INIT_H_
#include <sys/time.h>
#include "dri_util.h"
#include "mga_drm.h"
#include "main/mtypes.h"
#include "mgaregs.h"
#include "xmlconfig.h"
typedef struct mga_screen_private_s {
/**
* Chipset "family" of this card. Currently only \c MGA_CARD_TYPE_G200 and
* \c MGA_CARD_TYPE_G400 are possible.
*/
int chipset;
/**
* Characters (bytes) per-pixel for both the front and back buffers.
*
* \note
* This is also implicitly the bytes per-pixel for the depth-buffer.
*/
int cpp;
GLint agpMode;
unsigned int irq; /**< IRQ number (0 means none) */
unsigned int frontOffset;
unsigned int frontPitch;
unsigned int backOffset;
unsigned int backPitch;
unsigned int depthOffset;
unsigned int depthPitch;
unsigned int textureOffset[MGA_NR_TEX_HEAPS];
unsigned int textureSize[MGA_NR_TEX_HEAPS];
char *texVirtual[MGA_NR_TEX_HEAPS];
__DRIscreen *sPriv;
drmBufMapPtr bufs;
drmRegion mmio;
drmRegion primary;
unsigned int sarea_priv_offset;
/** Configuration cache with default values for all contexts */
driOptionCache optionCache;
} mgaScreenPrivate;
/**
* mgaRenderbuffer, derived from Mesa's gl_renderbuffer
*/
typedef struct {
struct gl_renderbuffer Base;
/* XXX per-window info should go here */
int foo, bar;
} mgaRenderbuffer;
#include "mgacontext.h"
extern void mgaGetLock( mgaContextPtr mmesa, GLuint flags );
extern void mgaEmitHwStateLocked( mgaContextPtr mmesa );
extern void mgaEmitScissorValues( mgaContextPtr mmesa, int box_nr, int emit );
#define GET_DISPATCH_AGE( mmesa ) mmesa->sarea->last_dispatch
/* Lock the hardware and validate our state.
*/
#define LOCK_HARDWARE( mmesa ) \
do { \
char __ret=0; \
DRM_CAS(mmesa->driHwLock, mmesa->hHWContext, \
(DRM_LOCK_HELD|mmesa->hHWContext), __ret); \
if (__ret) \
mgaGetLock( mmesa, 0 ); \
} while (0)
/*
*/
#define LOCK_HARDWARE_QUIESCENT( mmesa ) do { \
LOCK_HARDWARE( mmesa ); \
UPDATE_LOCK( mmesa, DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH ); \
} while (0)
/* Unlock the hardware using the global current context
*/
#define UNLOCK_HARDWARE(mmesa) \
DRM_UNLOCK(mmesa->driFd, mmesa->driHwLock, mmesa->hHWContext);
/* Freshen our snapshot of the drawables
*/
#define REFRESH_DRAWABLE_INFO( mmesa ) \
do { \
LOCK_HARDWARE( mmesa ); \
mmesa->lastX = mmesa->drawX; \
mmesa->lastY = mmesa->drawY; \
UNLOCK_HARDWARE( mmesa ); \
} while (0)
#define GET_DRAWABLE_LOCK( mmesa ) while(0)
#define RELEASE_DRAWABLE_LOCK( mmesa ) while(0)
/* The 2D driver macros are busted -- we can't use them here as they
* rely on the 2D driver data structures rather than taking an explicit
* base address.
*/
#define MGA_BASE( reg ) ((unsigned long)(mmesa->mgaScreen->mmio.map))
#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg)
#define MGA_DEREF( reg ) *(volatile uint32_t *)MGA_ADDR( reg )
#define MGA_READ( reg ) MGA_DEREF( reg )
#endif

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@ -1,359 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef MGALIB_INC
#define MGALIB_INC
#include <stdint.h>
#include "drm.h"
#include "mga_drm.h"
#include "dri_util.h"
#include "xf86drm.h"
#include "main/mtypes.h"
#include "main/mm.h"
#include "main/colormac.h"
#include "main/macros.h"
#include "texmem.h"
#include "xmlconfig.h"
#define MGA_SET_FIELD(reg,mask,val) reg = ((reg) & (mask)) | ((val) & ~(mask))
#define MGA_FIELD(field,val) (((val) << (field ## _SHIFT)) & ~(field ## _MASK))
#define MGA_GET_FIELD(field, val) ((val & ~(field ## _MASK)) >> (field ## _SHIFT))
#define MGA_IS_G200(mmesa) (mmesa->mgaScreen->chipset == MGA_CARD_TYPE_G200)
#define MGA_IS_G400(mmesa) (mmesa->mgaScreen->chipset == MGA_CARD_TYPE_G400)
/* SoftwareFallback
* - texture env GL_BLEND -- can be fixed
* - 1D and 3D textures
* - incomplete textures
* - GL_DEPTH_FUNC == GL_NEVER not in h/w
*/
#define MGA_FALLBACK_TEXTURE 0x1
#define MGA_FALLBACK_DRAW_BUFFER 0x2
#define MGA_FALLBACK_READ_BUFFER 0x4
#define MGA_FALLBACK_BLEND 0x8
#define MGA_FALLBACK_RENDERMODE 0x10
#define MGA_FALLBACK_STENCIL 0x20
#define MGA_FALLBACK_DEPTH 0x40
#define MGA_FALLBACK_BORDER_MODE 0x80
#define MGA_FALLBACK_DISABLE 0x100
/* Use the templated vertex formats:
*/
#define TAG(x) mga##x
#include "tnl_dd/t_dd_vertex.h"
#undef TAG
typedef struct mga_context_t mgaContext;
typedef struct mga_context_t *mgaContextPtr;
typedef void (*mga_tri_func)( mgaContextPtr, mgaVertex *, mgaVertex *,
mgaVertex * );
typedef void (*mga_line_func)( mgaContextPtr, mgaVertex *, mgaVertex * );
typedef void (*mga_point_func)( mgaContextPtr, mgaVertex * );
/* Texture environment color
*/
#define RGB_ZERO(c) (((c) & 0xffffff) == 0x000000)
#define RGB_ONE(c) (((c) & 0xffffff) == 0xffffff)
#define ALPHA_ZERO(c) (((c) >> 24) == 0x00)
#define ALPHA_ONE(c) (((c) >> 24) == 0xff)
#define RGBA_EQUAL(c) ((c) == PACK_COLOR_8888( (c) & 0xff, (c) & 0xff, \
(c) & 0xff, (c) & 0xff ))
struct mga_texture_object_s;
struct mga_screen_private_s;
#define G200_TEX_MAXLEVELS 5
#define G400_TEX_MAXLEVELS 11
typedef struct mga_texture_object_s
{
driTextureObject base;
/* The G200 only has the ability to use 5 mipmap levels (including the
* base level). The G400 does not have this restriction, but it still
* only has 5 offset pointers in the hardware. The trick on the G400 is
* upto the first 4 offset pointers point to mipmap levels. The last
* offset pointer tells how large the preceeding mipmap is. This value is
* then used to determine where the remaining mipmaps are.
*
* For example, if the first offsets[0] through offsets[2] are used as
* pointers, then offset[3] will be the size of the mipmap pointed to by
* offsets[2]. So mipmap level 3 will be at (offsets[2]+offsets[3]). For
* each successive mipmap level, offsets[3] is divided by 4 and added to
* the previous address. So mipmap level 4 will be at
* (offsets[2]+offsets[3]+(offsets[3] / 4)).
*
* The last pointer is selected by setting TO_texorgoffsetsel in its
* pointer. In the previous example, offset[2] would have
* TO_texorgoffsetsel or'ed in before writing it to the hardware.
*
* In the current driver all of the mipmaps are packed together linearly
* with mipmap level 0. Therefore offsets[0] points to the base of the
* texture (and has TO_texorgoffsetsel or'ed in), and offsets[1] is the
* size of the base texture.
*
* There is a possible optimization available here. At times the driver
* may not be able to allocate a single block of memory for the complete
* texture without ejecting some other textures from memory. It may be
* possible to put some of the lower mipmap levels (i.e., the larger
* mipmaps) in memory separate from the higher levels.
*
* The implementation should be fairly obvious, but getting "right" would
* likely be non-trivial. A first allocation for the entire texture would
* be attempted with a flag that says "don't eject other textures." If
* that failed, an additional allocation would be attmpted for just the
* base map. The process would repeat with the block of lower maps. The
* tricky parts would be in detecting when some of the levels had been
* ejected from texture memory by other textures and preventing the
* 4th allocation (for all the smallest mipmap levels) from kicking out
* any of the first three.
*
* This array holds G400_TEX_MAXLEVELS pointers to remove an if-statement
* in a loop in mgaSetTexImages. Values past G200_TEX_MAXLEVELS are not
* used.
*/
GLuint offsets[G400_TEX_MAXLEVELS];
int texelBytes;
GLuint age;
drm_mga_texture_regs_t setup;
/* If one texture dimension wraps with GL_CLAMP and the other with
* GL_CLAMP_TO_EDGE, we have to fallback to software. We would also have
* to fallback for GL_CLAMP_TO_BORDER.
*/
GLboolean border_fallback;
/* Depending on multitxturing and environment color
* GL_BLEND may have to be a software fallback.
*/
GLboolean texenv_fallback;
} mgaTextureObject_t;
struct mga_hw_state {
GLuint specen;
GLuint cull;
GLuint cull_dualtex;
GLuint stencil;
GLuint stencilctl;
GLuint stencil_enable;
GLuint zmode;
GLuint rop;
GLuint alpha_func;
GLuint alpha_func_enable;
GLuint blend_func;
GLuint blend_func_enable;
GLuint alpha_sel;
};
struct mga_context_t {
struct gl_context *glCtx;
unsigned int lastStamp; /* fullscreen breaks dpriv->laststamp,
* need to shadow it here. */
/* Hardware state management
*/
struct mga_hw_state hw;
/* Bookkeeping for texturing
*/
unsigned nr_heaps;
driTexHeap * texture_heaps[ MGA_NR_TEX_HEAPS ];
driTextureObject swapped;
struct mga_texture_object_s *CurrentTexObj[2];
/* Map GL texture units onto hardware.
*/
GLuint tmu_source[2];
int texture_depth;
/* Manage fallbacks
*/
GLuint Fallback;
/* Texture environment color.
*/
unsigned int envcolor[2];
GLboolean fcol_used;
GLboolean force_dualtex;
/* Rasterization state
*/
GLuint SetupNewInputs;
GLuint SetupIndex;
GLuint RenderIndex;
GLuint hw_primitive;
GLenum raster_primitive;
GLenum render_primitive;
GLubyte *verts;
GLint vertex_stride_shift;
GLuint vertex_format;
GLuint vertex_size;
/* Fallback rasterization functions
*/
mga_point_func draw_point;
mga_line_func draw_line;
mga_tri_func draw_tri;
/* Manage driver and hardware state
*/
GLuint NewGLState;
GLuint dirty;
drm_mga_context_regs_t setup;
GLuint ClearColor;
GLuint ClearDepth;
GLuint poly_stipple;
GLfloat depth_scale;
GLuint depth_clear_mask;
GLuint stencil_clear_mask;
GLuint hw_stencil;
GLuint haveHwStipple;
GLfloat hw_viewport[16];
/* Dma buffers
*/
drmBufPtr vertex_dma_buffer;
drmBufPtr iload_buffer;
int64_t swap_ust;
int64_t swap_missed_ust;
GLuint swap_count;
GLuint swap_missed_count;
uint32_t last_frame_fence;
/* Drawable, cliprect and scissor information
*/
int dirty_cliprects; /* which sets of cliprects are uptodate? */
int draw_buffer; /* which buffer are we rendering to */
unsigned int drawOffset; /* draw buffer address in space */
int readOffset;
int drawX, drawY; /* origin of drawable in draw buffer */
int lastX, lastY; /* detect DSTORG bug */
GLuint numClipRects; /* cliprects for the draw buffer */
drm_clip_rect_t *pClipRects;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
int scissor;
drm_clip_rect_t tmp_boxes[2][MGA_NR_SAREA_CLIPRECTS];
/* Texture aging and DMA based aging.
*/
unsigned int texAge[MGA_NR_TEX_HEAPS];/* texture LRU age */
unsigned int dirtyAge; /* buffer age for synchronization */
GLuint primary_offset;
/* Mirrors of some DRI state.
*/
drm_context_t hHWContext;
drm_hw_lock_t *driHwLock;
int driFd;
__DRIdrawable *driDrawable;
__DRIdrawable *driReadable;
__DRIscreen *driScreen;
struct mga_screen_private_s *mgaScreen;
drm_mga_sarea_t *sarea;
/* Configuration cache
*/
driOptionCache optionCache;
};
#define MGA_CONTEXT(ctx) ((mgaContextPtr)(ctx->DriverCtx))
/* ================================================================
* Debugging:
*/
#define DO_DEBUG 1
#if DO_DEBUG
extern int MGA_DEBUG;
#else
#define MGA_DEBUG 0
#endif
#define DEBUG_VERBOSE_MSG 0x01
#define DEBUG_VERBOSE_DRI 0x02
#define DEBUG_VERBOSE_IOCTL 0x04
#define DEBUG_VERBOSE_TEXTURE 0x08
#define DEBUG_VERBOSE_FALLBACK 0x10
static INLINE GLuint mgaPackColor(GLuint cpp,
GLubyte r, GLubyte g,
GLubyte b, GLubyte a)
{
switch (cpp) {
case 2:
return PACK_COLOR_565( r, g, b );
case 4:
return PACK_COLOR_8888( a, r, g, b );
default:
return 0;
}
}
/*
* Subpixel offsets for window coordinates:
*/
#define SUBPIXEL_X (-0.5F)
#define SUBPIXEL_Y (-0.5F + 0.125)
#define MGA_WA_TRIANGLES 0x18000000
#define MGA_WA_TRISTRIP_T0 0x02010200
#define MGA_WA_TRIFAN_T0 0x01000408
#define MGA_WA_TRISTRIP_T0T1 0x02010400
#define MGA_WA_TRIFAN_T0T1 0x01000810
#endif

70
src/mesa/drivers/dri/mga/mgadd.c
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@ -1,70 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#include "main/mtypes.h"
#include "main/framebuffer.h"
#include "main/mm.h"
#include "mgacontext.h"
#include "mgadd.h"
#include "mga_xmesa.h"
#include "utils.h"
/***************************************
* Mesa's Driver Functions
***************************************/
static const GLubyte *mgaGetString( struct gl_context *ctx, GLenum name )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
static char buffer[128];
unsigned offset;
switch ( name ) {
case GL_VENDOR:
return (GLubyte *) "VA Linux Systems Inc.";
case GL_RENDERER:
offset = driGetRendererString( buffer,
MGA_IS_G400(mmesa) ? "G400" :
MGA_IS_G200(mmesa) ? "G200" : "MGA",
mmesa->mgaScreen->agpMode );
return (GLubyte *)buffer;
default:
return NULL;
}
}
void mgaInitDriverFuncs( struct dd_function_table *functions )
{
functions->GetString = mgaGetString;
}

35
src/mesa/drivers/dri/mga/mgadd.h
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@ -1,35 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef MGADD_INC
#define MGADD_INC
#include "main/context.h"
extern void mgaInitDriverFuncs( struct dd_function_table *functions );
#endif

747
src/mesa/drivers/dri/mga/mgaioctl.c
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@ -1,747 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/**
* \file mgaioctl.c
* MGA IOCTL related wrapper functions.
*
* \author Keith Whitwell <keith@tungstengraphics.com>
* \author Gareth Hughes <gareth@valinux.com>
*/
#include <errno.h>
#include "main/mtypes.h"
#include "main/macros.h"
#include "main/dd.h"
#include "swrast/swrast.h"
#include "main/mm.h"
#include "drm.h"
#include "mga_drm.h"
#include "mgacontext.h"
#include "mgadd.h"
#include "mgastate.h"
#include "mgaioctl.h"
#include "vblank.h"
static int
mgaSetFence( mgaContextPtr mmesa, uint32_t * fence )
{
int ret = ENOSYS;
if ( mmesa->driScreen->drm_version.minor >= 2 ) {
ret = drmCommandWriteRead( mmesa->driScreen->fd, DRM_MGA_SET_FENCE,
fence, sizeof( uint32_t ));
if (ret) {
fprintf(stderr, "drmMgaSetFence: %d\n", ret);
exit(1);
}
}
return ret;
}
static int
mgaWaitFence( mgaContextPtr mmesa, uint32_t fence, uint32_t * curr_fence )
{
int ret = ENOSYS;
if ( mmesa->driScreen->drm_version.minor >= 2 ) {
uint32_t temp = fence;
ret = drmCommandWriteRead( mmesa->driScreen->fd,
DRM_MGA_WAIT_FENCE,
& temp, sizeof( uint32_t ));
if (ret) {
fprintf(stderr, "drmMgaSetFence: %d\n", ret);
exit(1);
}
if ( curr_fence ) {
*curr_fence = temp;
}
}
return ret;
}
static void mga_iload_dma_ioctl(mgaContextPtr mmesa,
unsigned long dest,
int length)
{
drmBufPtr buf = mmesa->iload_buffer;
drm_mga_iload_t iload;
int ret, i;
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "DRM_IOCTL_MGA_ILOAD idx %d dst %x length %d\n",
buf->idx, (int) dest, length);
if ( (length & MGA_ILOAD_MASK) != 0 ) {
UNLOCK_HARDWARE( mmesa );
fprintf( stderr, "%s: Invalid ILOAD datasize (%d), must be "
"multiple of %u.\n", __FUNCTION__, length, MGA_ILOAD_ALIGN );
exit( 1 );
}
iload.idx = buf->idx;
iload.dstorg = dest;
iload.length = length;
i = 0;
do {
ret = drmCommandWrite( mmesa->driFd, DRM_MGA_ILOAD,
&iload, sizeof(iload) );
} while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
if ( ret < 0 ) {
printf("send iload retcode = %d\n", ret);
exit(1);
}
mmesa->iload_buffer = 0;
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "finished iload dma put\n");
}
drmBufPtr mga_get_buffer_ioctl( mgaContextPtr mmesa )
{
int idx = 0;
int size = 0;
drmDMAReq dma;
int retcode;
drmBufPtr buf;
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "Getting dma buffer\n");
dma.context = mmesa->hHWContext;
dma.send_count = 0;
dma.send_list = NULL;
dma.send_sizes = NULL;
dma.flags = 0;
dma.request_count = 1;
dma.request_size = MGA_BUFFER_SIZE;
dma.request_list = &idx;
dma.request_sizes = &size;
dma.granted_count = 0;
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "drmDMA (get) ctx %d count %d size 0x%x\n",
dma.context, dma.request_count,
dma.request_size);
while (1) {
retcode = drmDMA(mmesa->driFd, &dma);
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "retcode %d sz %d idx %d count %d\n",
retcode,
dma.request_sizes[0],
dma.request_list[0],
dma.granted_count);
if (retcode == 0 &&
dma.request_sizes[0] &&
dma.granted_count)
break;
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "\n\nflush");
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT );
}
buf = &(mmesa->mgaScreen->bufs->list[idx]);
buf->used = 0;
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr,
"drmDMA (get) returns size[0] 0x%x idx[0] %d\n"
"dma_buffer now: buf idx: %d size: %d used: %d addr %p\n",
dma.request_sizes[0], dma.request_list[0],
buf->idx, buf->total,
buf->used, buf->address);
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "finished getbuffer\n");
return buf;
}
static void
mgaClear( struct gl_context *ctx, GLbitfield mask )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
__DRIdrawable *dPriv = mmesa->driDrawable;
GLuint flags = 0;
GLuint clear_color = mmesa->ClearColor;
GLuint clear_depth = 0;
GLuint color_mask = 0;
GLuint depth_mask = 0;
int ret;
int i;
static int nrclears;
drm_mga_clear_t clear;
GLint cx, cy, cw, ch;
FLUSH_BATCH( mmesa );
if ( mask & BUFFER_BIT_FRONT_LEFT ) {
flags |= MGA_FRONT;
color_mask = mmesa->setup.plnwt;
mask &= ~BUFFER_BIT_FRONT_LEFT;
}
if ( mask & BUFFER_BIT_BACK_LEFT ) {
flags |= MGA_BACK;
color_mask = mmesa->setup.plnwt;
mask &= ~BUFFER_BIT_BACK_LEFT;
}
if ( (mask & BUFFER_BIT_DEPTH) && ctx->Depth.Mask ) {
flags |= MGA_DEPTH;
clear_depth = (mmesa->ClearDepth & mmesa->depth_clear_mask);
depth_mask |= mmesa->depth_clear_mask;
mask &= ~BUFFER_BIT_DEPTH;
}
if ( (mask & BUFFER_BIT_STENCIL) && mmesa->hw_stencil ) {
flags |= MGA_DEPTH;
clear_depth |= (ctx->Stencil.Clear & mmesa->stencil_clear_mask);
depth_mask |= mmesa->stencil_clear_mask;
mask &= ~BUFFER_BIT_STENCIL;
}
if ( flags ) {
LOCK_HARDWARE( mmesa );
/* compute region after locking: */
cx = ctx->DrawBuffer->_Xmin;
cy = ctx->DrawBuffer->_Ymin;
cw = ctx->DrawBuffer->_Xmax - cx;
ch = ctx->DrawBuffer->_Ymax - cy;
if ( mmesa->dirty_cliprects )
mgaUpdateRects( mmesa, (MGA_FRONT | MGA_BACK) );
/* flip top to bottom */
cy = dPriv->h-cy-ch;
cx += mmesa->drawX;
cy += mmesa->drawY;
if ( MGA_DEBUG & DEBUG_VERBOSE_IOCTL )
fprintf( stderr, "Clear, bufs %x nbox %d\n",
(int)flags, (int)mmesa->numClipRects );
for (i = 0 ; i < mmesa->numClipRects ; )
{
int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, mmesa->numClipRects);
drm_clip_rect_t *box = mmesa->pClipRects;
drm_clip_rect_t *b = mmesa->sarea->boxes;
int n = 0;
if (cw != dPriv->w || ch != dPriv->h) {
/* clear subregion */
for ( ; i < nr ; i++) {
GLint x = box[i].x1;
GLint y = box[i].y1;
GLint w = box[i].x2 - x;
GLint h = box[i].y2 - y;
if (x < cx) w -= cx - x, x = cx;
if (y < cy) h -= cy - y, y = cy;
if (x + w > cx + cw) w = cx + cw - x;
if (y + h > cy + ch) h = cy + ch - y;
if (w <= 0) continue;
if (h <= 0) continue;
b->x1 = x;
b->y1 = y;
b->x2 = x + w;
b->y2 = y + h;
b++;
n++;
}
} else {
/* clear whole window */
for ( ; i < nr ; i++) {
*b++ = box[i];
n++;
}
}
if ( MGA_DEBUG & DEBUG_VERBOSE_IOCTL )
fprintf( stderr,
"DRM_IOCTL_MGA_CLEAR flag 0x%x color %x depth %x nbox %d\n",
flags, clear_color, clear_depth, mmesa->sarea->nbox );
mmesa->sarea->nbox = n;
clear.flags = flags;
clear.clear_color = clear_color;
clear.clear_depth = clear_depth;
clear.color_mask = color_mask;
clear.depth_mask = depth_mask;
ret = drmCommandWrite( mmesa->driFd, DRM_MGA_CLEAR,
&clear, sizeof(clear));
if ( ret ) {
fprintf( stderr, "send clear retcode = %d\n", ret );
exit( 1 );
}
if ( MGA_DEBUG & DEBUG_VERBOSE_IOCTL )
fprintf( stderr, "finished clear %d\n", ++nrclears );
}
UNLOCK_HARDWARE( mmesa );
mmesa->dirty |= MGA_UPLOAD_CLIPRECTS|MGA_UPLOAD_CONTEXT;
}
if (mask)
_swrast_Clear( ctx, mask );
}
/**
* Wait for the previous frame of rendering has completed.
*
* \param mmesa Hardware context pointer.
*
* \bug
* The loop in this function should have some sort of a timeout mechanism.
*
* \warning
* This routine used to assume that the hardware lock was held on entry. It
* now assumes that the lock is \b not held on entry.
*/
static void mgaWaitForFrameCompletion( mgaContextPtr mmesa )
{
if ( mgaWaitFence( mmesa, mmesa->last_frame_fence, NULL ) == ENOSYS ) {
unsigned wait = 0;
GLuint last_frame;
GLuint last_wrap;
LOCK_HARDWARE( mmesa );
last_frame = mmesa->sarea->last_frame.head;
last_wrap = mmesa->sarea->last_frame.wrap;
/* The DMA routines in the kernel track a couple values in the SAREA
* that we use here. The number of times that the primary DMA buffer
* has "wrapped" around is tracked in last_wrap. In addition, the
* wrap count and the buffer position at the end of the last frame are
* stored in last_frame.wrap and last_frame.head.
*
* By comparing the wrap counts and the current DMA pointer value
* (read directly from the hardware) to last_frame.head, we can
* determine when the graphics processor has processed all of the
* commands for the last frame.
*
* In this case "last frame" means the frame of the *previous* swap-
* buffers call. This is done to prevent queuing a second buffer swap
* before the previous swap is executed.
*/
while ( 1 ) {
if ( last_wrap < mmesa->sarea->last_wrap ||
( last_wrap == mmesa->sarea->last_wrap &&
last_frame <= (MGA_READ( MGAREG_PRIMADDRESS ) -
mmesa->primary_offset) ) ) {
break;
}
if ( 0 ) {
wait++;
fprintf( stderr, " last: head=0x%06x wrap=%d\n",
last_frame, last_wrap );
fprintf( stderr, " head: head=0x%06lx wrap=%d\n",
(long)(MGA_READ( MGAREG_PRIMADDRESS ) - mmesa->primary_offset),
mmesa->sarea->last_wrap );
}
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH );
UNLOCK_HARDWARE( mmesa );
DO_USLEEP( 1 );
LOCK_HARDWARE( mmesa );
}
if ( wait )
fprintf( stderr, "\n" );
UNLOCK_HARDWARE( mmesa );
}
}
/*
* Copy the back buffer to the front buffer.
*/
void mgaCopyBuffer( __DRIdrawable *dPriv )
{
mgaContextPtr mmesa;
drm_clip_rect_t *pbox;
GLint nbox;
GLint ret;
GLint i;
GLboolean missed_target;
__DRIscreen *psp = dPriv->driScreenPriv;
assert(dPriv);
assert(dPriv->driContextPriv);
assert(dPriv->driContextPriv->driverPrivate);
mmesa = (mgaContextPtr) dPriv->driContextPriv->driverPrivate;
FLUSH_BATCH( mmesa );
mgaWaitForFrameCompletion( mmesa );
driWaitForVBlank( dPriv, & missed_target );
if ( missed_target ) {
mmesa->swap_missed_count++;
(void) (*psp->systemTime->getUST)( & mmesa->swap_missed_ust );
}
LOCK_HARDWARE( mmesa );
/* Use the frontbuffer cliprects
*/
if (mmesa->dirty_cliprects & MGA_FRONT)
mgaUpdateRects( mmesa, MGA_FRONT );
pbox = dPriv->pClipRects;
nbox = dPriv->numClipRects;
for (i = 0 ; i < nbox ; )
{
int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
drm_clip_rect_t *b = mmesa->sarea->boxes;
mmesa->sarea->nbox = nr - i;
for ( ; i < nr ; i++)
*b++ = pbox[i];
if (0)
fprintf(stderr, "DRM_IOCTL_MGA_SWAP\n");
ret = drmCommandNone( mmesa->driFd, DRM_MGA_SWAP );
if ( ret ) {
printf("send swap retcode = %d\n", ret);
exit(1);
}
}
(void) mgaSetFence( mmesa, & mmesa->last_frame_fence );
UNLOCK_HARDWARE( mmesa );
mmesa->dirty |= MGA_UPLOAD_CLIPRECTS;
mmesa->swap_count++;
(void) (*psp->systemTime->getUST)( & mmesa->swap_ust );
}
/**
* Implement the hardware-specific portion of \c glFinish.
*
* Flushes all pending commands to the hardware and wait for them to finish.
*
* \param ctx Context where the \c glFinish command was issued.
*
* \sa glFinish, mgaFlush, mgaFlushDMA
*/
static void mgaFinish( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
uint32_t fence;
LOCK_HARDWARE( mmesa );
if ( mmesa->vertex_dma_buffer != NULL ) {
mgaFlushVerticesLocked( mmesa );
}
if ( mgaSetFence( mmesa, & fence ) == 0 ) {
UNLOCK_HARDWARE( mmesa );
(void) mgaWaitFence( mmesa, fence, NULL );
}
else {
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) {
fprintf(stderr, "mgaRegetLockQuiescent\n");
}
UPDATE_LOCK( mmesa, DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH );
UNLOCK_HARDWARE( mmesa );
}
}
/**
* Flush all commands upto at least a certain point to the hardware.
*
* \note
* The term "wait" in the name of this function is misleading. It doesn't
* actually wait for anything. It just makes sure that the commands have
* been flushed to the hardware.
*
* \warning
* As the name implies, this function assumes that the hardware lock is
* held on entry.
*/
void mgaWaitAgeLocked( mgaContextPtr mmesa, int age )
{
if (GET_DISPATCH_AGE(mmesa) < age) {
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH );
}
}
static GLboolean intersect_rect( drm_clip_rect_t *out,
const drm_clip_rect_t *a,
const drm_clip_rect_t *b )
{
*out = *a;
if (b->x1 > out->x1) out->x1 = b->x1;
if (b->y1 > out->y1) out->y1 = b->y1;
if (b->x2 < out->x2) out->x2 = b->x2;
if (b->y2 < out->y2) out->y2 = b->y2;
return ((out->x1 < out->x2) && (out->y1 < out->y2));
}
static void age_mmesa( mgaContextPtr mmesa, int age )
{
if (mmesa->CurrentTexObj[0]) mmesa->CurrentTexObj[0]->age = age;
if (mmesa->CurrentTexObj[1]) mmesa->CurrentTexObj[1]->age = age;
}
void mgaFlushVerticesLocked( mgaContextPtr mmesa )
{
drm_clip_rect_t *pbox = mmesa->pClipRects;
int nbox = mmesa->numClipRects;
drmBufPtr buffer = mmesa->vertex_dma_buffer;
drm_mga_vertex_t vertex;
int i;
mmesa->vertex_dma_buffer = 0;
if (!buffer)
return;
if (mmesa->dirty_cliprects & mmesa->draw_buffer)
mgaUpdateRects( mmesa, mmesa->draw_buffer );
if (mmesa->dirty & ~MGA_UPLOAD_CLIPRECTS)
mgaEmitHwStateLocked( mmesa );
/* FIXME: Workaround bug in kernel module.
*/
mmesa->sarea->dirty |= MGA_UPLOAD_CONTEXT;
if (!nbox)
buffer->used = 0;
if (nbox >= MGA_NR_SAREA_CLIPRECTS)
mmesa->dirty |= MGA_UPLOAD_CLIPRECTS;
#if 0
if (!buffer->used || !(mmesa->dirty & MGA_UPLOAD_CLIPRECTS))
{
if (nbox == 1)
mmesa->sarea->nbox = 0;
else
mmesa->sarea->nbox = nbox;
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "Firing vertex -- case a nbox %d\n", nbox);
vertex.idx = buffer->idx;
vertex.used = buffer->used;
vertex.discard = 1;
drmCommandWrite( mmesa->driFd, DRM_MGA_VERTEX,
&vertex, sizeof(drmMGAVertex) );
age_mmesa(mmesa, mmesa->sarea->last_enqueue);
}
else
#endif
{
for (i = 0 ; i < nbox ; )
{
int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, nbox);
drm_clip_rect_t *b = mmesa->sarea->boxes;
int discard = 0;
if (mmesa->scissor) {
mmesa->sarea->nbox = 0;
for ( ; i < nr ; i++) {
*b = pbox[i];
if (intersect_rect(b, b, &mmesa->scissor_rect)) {
mmesa->sarea->nbox++;
b++;
}
}
/* Culled?
*/
if (!mmesa->sarea->nbox) {
if (nr < nbox) continue;
buffer->used = 0;
}
} else {
mmesa->sarea->nbox = nr - i;
for ( ; i < nr ; i++)
*b++ = pbox[i];
}
/* Finished with the buffer?
*/
if (nr == nbox)
discard = 1;
mmesa->sarea->dirty |= MGA_UPLOAD_CLIPRECTS;
vertex.idx = buffer->idx;
vertex.used = buffer->used;
vertex.discard = discard;
drmCommandWrite( mmesa->driFd, DRM_MGA_VERTEX,
&vertex, sizeof(vertex) );
age_mmesa(mmesa, mmesa->sarea->last_enqueue);
}
}
mmesa->dirty &= ~MGA_UPLOAD_CLIPRECTS;
}
void mgaFlushVertices( mgaContextPtr mmesa )
{
LOCK_HARDWARE( mmesa );
mgaFlushVerticesLocked( mmesa );
UNLOCK_HARDWARE( mmesa );
}
void mgaFireILoadLocked( mgaContextPtr mmesa,
GLuint offset, GLuint length )
{
if (!mmesa->iload_buffer) {
fprintf(stderr, "mgaFireILoad: no buffer\n");
return;
}
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "mgaFireILoad idx %d ofs 0x%x length %d\n",
mmesa->iload_buffer->idx, (int)offset, (int)length );
mga_iload_dma_ioctl( mmesa, offset, length );
}
void mgaGetILoadBufferLocked( mgaContextPtr mmesa )
{
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
fprintf(stderr, "mgaGetIloadBuffer (buffer now %p)\n",
(void *) mmesa->iload_buffer);
mmesa->iload_buffer = mga_get_buffer_ioctl( mmesa );
}
/**
* Implement the hardware-specific portion of \c glFlush.
*
* \param ctx Context to be flushed.
*
* \sa glFlush, mgaFinish, mgaFlushDMA
*/
static void mgaFlush( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
LOCK_HARDWARE( mmesa );
if ( mmesa->vertex_dma_buffer != NULL ) {
mgaFlushVerticesLocked( mmesa );
}
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH );
UNLOCK_HARDWARE( mmesa );
}
int mgaFlushDMA( int fd, drmLockFlags flags )
{
drm_lock_t lock;
int ret, i = 0;
memset( &lock, 0, sizeof(lock) );
lock.flags = flags & (DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH
| DRM_LOCK_FLUSH_ALL);
do {
ret = drmCommandWrite( fd, DRM_MGA_FLUSH, &lock, sizeof(lock) );
} while ( ret && errno == EBUSY && i++ < DRM_MGA_IDLE_RETRY );
if ( ret == 0 )
return 0;
if ( errno != EBUSY )
return -errno;
if ( lock.flags & DRM_LOCK_QUIESCENT ) {
/* Only keep trying if we need quiescence.
*/
lock.flags &= ~(DRM_LOCK_FLUSH | DRM_LOCK_FLUSH_ALL);
do {
ret = drmCommandWrite( fd, DRM_MGA_FLUSH, &lock, sizeof(lock) );
} while ( ret && errno == EBUSY && i++ < DRM_MGA_IDLE_RETRY );
}
if ( ret == 0 ) {
return 0;
} else {
return -errno;
}
}
void mgaInitIoctlFuncs( struct dd_function_table *functions )
{
functions->Clear = mgaClear;
functions->Flush = mgaFlush;
functions->Finish = mgaFinish;
}

110
src/mesa/drivers/dri/mga/mgaioctl.h
View File

@ -1,110 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
* Gareth Hughes <gareth@valinux.com>
*/
#ifndef MGA_IOCTL_H
#define MGA_IOCTL_H
#include "mgacontext.h"
#include "mga_xmesa.h"
void mgaCopyBuffer( __DRIdrawable *dPriv );
void mgaWaitForVBlank( mgaContextPtr mmesa );
void mgaGetILoadBufferLocked( mgaContextPtr mmesa );
void mgaFireILoadLocked( mgaContextPtr mmesa,
GLuint offset, GLuint length );
void mgaWaitAgeLocked( mgaContextPtr mmesa, int age );
void mgaFlushVertices( mgaContextPtr mmesa );
void mgaFlushVerticesLocked( mgaContextPtr mmesa );
int mgaFlushDMA( int fd, drmLockFlags flags );
void mgaInitIoctlFuncs( struct dd_function_table *functions );
#define FLUSH_BATCH(mmesa) do { \
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) \
fprintf(stderr, "FLUSH_BATCH in %s\n", __FUNCTION__); \
if (mmesa->vertex_dma_buffer) mgaFlushVertices(mmesa); \
} while (0)
#define MGA_STATECHANGE(mmesa, flag) do { \
FLUSH_BATCH(mmesa); \
mmesa->dirty |= flag; \
} while (0)
extern drmBufPtr mga_get_buffer_ioctl( mgaContextPtr mmesa );
static INLINE
GLuint *mgaAllocDmaLow( mgaContextPtr mmesa, int bytes )
{
GLuint *head;
/* If there is no DMA buffer currently allocated or the currently
* allocated DMA buffer doesn't have enough room left for this request,
* a new buffer will need to be allocated.
*/
if ( (mmesa->vertex_dma_buffer == NULL)
|| ((mmesa->vertex_dma_buffer->used + bytes)
> mmesa->vertex_dma_buffer->total) ) {
LOCK_HARDWARE( mmesa );
/* In the case where the existing buffer does not have enough room,
* we need to flush it out to the hardware.
*/
if ( mmesa->vertex_dma_buffer != NULL ) {
mgaFlushVerticesLocked( mmesa );
}
mmesa->vertex_dma_buffer = mga_get_buffer_ioctl( mmesa );
UNLOCK_HARDWARE( mmesa );
}
head = (GLuint *)((char *)mmesa->vertex_dma_buffer->address +
mmesa->vertex_dma_buffer->used);
mmesa->vertex_dma_buffer->used += bytes;
return head;
}
#define UPDATE_LOCK( mmesa, flags ) \
do { \
GLint ret = mgaFlushDMA( mmesa->driFd, flags ); \
if ( ret < 0 ) { \
drmCommandNone( mmesa->driFd, DRM_MGA_RESET ); \
UNLOCK_HARDWARE( mmesa ); \
fprintf( stderr, "%s: flush return = %s (%d), flags = 0x%08x\n", \
__FUNCTION__, strerror( -ret ), -ret, \
(unsigned)(flags) ); \
exit( 1 ); \
} \
} while (0)
#endif

649
src/mesa/drivers/dri/mga/mgapixel.c
View File

@ -1,649 +0,0 @@
/*
* Copyright 2000 Compaq Computer Inc. and VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/**
* \file mgapixel.c
* Implement framebuffer pixel operations for MGA.
*
* \todo
* Someday the accelerated \c glReadPixels and \c glDrawPixels paths need to
* be resurrected. They are currently ifdef'ed out because they don't seem
* to work and they only get activated some very rare circumstances.
*
* \author Keith Whitwell <keith@tungstengraphics.com>
* \author Gareth Hughes <gareth@valinux.com>
*/
#include "main/mtypes.h"
#include "main/macros.h"
#include "mgadd.h"
#include "mgacontext.h"
#include "mgaioctl.h"
#include "mgapixel.h"
#include "mgastate.h"
#include "swrast/swrast.h"
#include "main/imports.h"
#if 0
#define IS_AGP_MEM( mmesa, p ) \
((unsigned long)mmesa->mgaScreen->buffers.map <= ((unsigned long)p) && \
(unsigned long)mmesa->mgaScreen->buffers.map + \
(unsigned long)mmesa->mgaScreen->buffers.size > ((unsigned long)p))
#define AGP_OFFSET( mmesa, p ) \
(((unsigned long)p) - (unsigned long)mmesa->mgaScreen->buffers.map)
static GLboolean
check_depth_stencil_24_8( const struct gl_context *ctx, GLenum type,
const struct gl_pixelstore_attrib *packing,
const void *pixels, GLint sz,
GLint pitch )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
return ( type == GL_UNSIGNED_INT_24_8 &&
ctx->Visual->DepthBits == 24 &&
ctx->Visual->StencilBits == 8 &&
mmesa->mgaScreen->cpp == 4 &&
mmesa->hw_stencil &&
!ctx->Pixel.IndexShift &&
!ctx->Pixel.IndexOffset &&
!ctx->Pixel.MapStencilFlag &&
ctx->Pixel.DepthBias == 0.0 &&
ctx->Pixel.DepthScale == 1.0 &&
!packing->SwapBytes &&
pitch % 32 == 0 &&
pitch < 4096 );
}
static GLboolean
check_depth( const struct gl_context *ctx, GLenum type,
const struct gl_pixelstore_attrib *packing,
const void *pixels, GLint sz, GLint pitch )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
if ( IS_AGP_MEM( mmesa, pixels ) &&
!( ( type == GL_UNSIGNED_INT && mmesa->mgaScreen->cpp == 4 ) ||
( type == GL_UNSIGNED_SHORT && mmesa->mgaScreen->cpp == 2 ) ) )
return GL_FALSE;
return ( ctx->Pixel.DepthBias == 0.0 &&
ctx->Pixel.DepthScale == 1.0 &&
!packing->SwapBytes &&
pitch % 32 == 0 &&
pitch < 4096 );
}
static GLboolean
check_color( const struct gl_context *ctx, GLenum type, GLenum format,
const struct gl_pixelstore_attrib *packing,
const void *pixels, GLint sz, GLint pitch )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLuint cpp = mmesa->mgaScreen->cpp;
/* Can't do conversions on agp reads/draws.
*/
if ( IS_AGP_MEM( mmesa, pixels ) &&
!( pitch % 32 == 0 && pitch < 4096 &&
( ( type == GL_UNSIGNED_BYTE &&
cpp == 4 && format == GL_BGRA ) ||
( type == GL_UNSIGNED_INT_8_8_8_8 &&
cpp == 4 && format == GL_BGRA ) ||
( type == GL_UNSIGNED_SHORT_5_6_5_REV &&
cpp == 2 && format == GL_RGB ) ) ) )
return GL_FALSE;
return (!ctx->_ImageTransferState &&
!packing->SwapBytes &&
!packing->LsbFirst);
}
static GLboolean
check_color_per_fragment_ops( const struct gl_context *ctx )
{
return (!( ctx->Color.AlphaEnabled ||
ctx->Depth.Test ||
ctx->Fog.Enabled ||
ctx->Scissor.Enabled ||
ctx->Stencil._Enabled ||
!ctx->Color.ColorMask[0][0] ||
!ctx->Color.ColorMask[0][1] ||
!ctx->Color.ColorMask[0][2] ||
!ctx->Color.ColorMask[0][3] ||
ctx->Color.ColorLogicOpEnabled ||
ctx->Texture._EnabledUnits
) &&
ctx->Current.RasterPosValid &&
ctx->Pixel.ZoomX == 1.0F &&
(ctx->Pixel.ZoomY == 1.0F || ctx->Pixel.ZoomY == -1.0F));
}
static GLboolean
check_depth_per_fragment_ops( const struct gl_context *ctx )
{
return ( ctx->Current.RasterPosValid &&
ctx->Color.ColorMask[0][RCOMP] == 0 &&
ctx->Color.ColorMask[0][BCOMP] == 0 &&
ctx->Color.ColorMask[0][GCOMP] == 0 &&
ctx->Color.ColorMask[0][ACOMP] == 0 &&
ctx->Pixel.ZoomX == 1.0F &&
( ctx->Pixel.ZoomY == 1.0F || ctx->Pixel.ZoomY == -1.0F ) );
}
/* In addition to the requirements for depth:
*/
#if defined(MESA_packed_depth_stencil)
static GLboolean
check_stencil_per_fragment_ops( const struct gl_context *ctx )
{
return ( !ctx->Pixel.IndexShift &&
!ctx->Pixel.IndexOffset );
}
#endif
static GLboolean
clip_pixelrect( const struct gl_context *ctx,
const struct gl_framebuffer *buffer,
GLint *x, GLint *y,
GLsizei *width, GLsizei *height,
GLint *skipPixels, GLint *skipRows,
GLint *size )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
*width = MIN2(*width, MAX_WIDTH); /* redundant? */
/* left clipping */
if (*x < buffer->_Xmin) {
*skipPixels += (buffer->_Xmin - *x);
*width -= (buffer->_Xmin - *x);
*x = buffer->_Xmin;
}
/* right clipping */
if (*x + *width > buffer->_Xmax)
*width -= (*x + *width - buffer->_Xmax - 1);
if (*width <= 0)
return GL_FALSE;
/* bottom clipping */
if (*y < buffer->_Ymin) {
*skipRows += (buffer->_Ymin - *y);
*height -= (buffer->_Ymin - *y);
*y = buffer->_Ymin;
}
/* top clipping */
if (*y + *height > buffer->_Ymax)
*height -= (*y + *height - buffer->_Ymax - 1);
if (*height <= 0)
return GL_FALSE;
*size = ((*y + *height - 1) * mmesa->mgaScreen->frontPitch +
(*x + *width - 1) * mmesa->mgaScreen->cpp);
return GL_TRUE;
}
static GLboolean
mgaTryReadPixels( struct gl_context *ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *pack,
GLvoid *pixels )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLint size, skipPixels, skipRows;
GLint pitch = pack->RowLength ? pack->RowLength : width;
GLboolean ok;
GLuint planemask;
GLuint source;
#if 0
drmMGABlit blit;
GLuint dest;
GLint source_pitch, dest_pitch;
GLint delta_sx, delta_sy;
GLint delta_dx, delta_dy;
GLint blit_height, ydir;
#endif
if (!clip_pixelrect(ctx, ctx->ReadBuffer,
&x, &y, &width, &height,
&skipPixels, &skipRows, &size)) {
return GL_TRUE;
}
/* Only accelerate reading to agp buffers.
*/
if ( !IS_AGP_MEM(mmesa, (char *)pixels) ||
!IS_AGP_MEM(mmesa, (char *)pixels + size) )
return GL_FALSE;
switch (format) {
case GL_DEPTH_STENCIL:
ok = check_depth_stencil_24_8(ctx, type, pack, pixels, size, pitch);
planemask = ~0;
source = mmesa->mgaScreen->depthOffset;
break;
case GL_DEPTH_COMPONENT:
ok = check_depth(ctx, type, pack, pixels, size, pitch);
/* Can't accelerate at this depth -- planemask does the wrong
* thing; it doesn't clear the low order bits in the
* destination, instead it leaves them untouched.
*
* Could get the acclerator to solid fill the destination with
* zeros first... Or get the cpu to do it...
*/
if (ctx->Visual.depthBits == 24)
return GL_FALSE;
planemask = ~0;
source = mmesa->mgaScreen->depthOffset;
break;
case GL_RGB:
case GL_BGRA:
ok = check_color(ctx, type, format, pack, pixels, size, pitch);
planemask = ~0;
source = (mmesa->draw_buffer == MGA_FRONT ?
mmesa->mgaScreen->frontOffset :
mmesa->mgaScreen->backOffset);
break;
default:
return GL_FALSE;
}
if (!ok) {
return GL_FALSE;
}
LOCK_HARDWARE( mmesa );
#if 0
{
__DRIdrawable *dPriv = mmesa->driDrawable;
int nbox, retcode, i;
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT );
if (mmesa->dirty_cliprects & MGA_FRONT)
mgaUpdateRects( mmesa, MGA_FRONT );
nbox = dPriv->numClipRects;
y = dPriv->h - y - height;
x += mmesa->drawX;
y += mmesa->drawY;
dest = ((mmesa->mgaScreen->agp.handle + AGP_OFFSET(mmesa, pixels)) |
DO_dstmap_sys | DO_dstacc_agp);
source_pitch = mmesa->mgaScreen->frontPitch / mmesa->mgaScreen->cpp;
dest_pitch = pitch;
delta_sx = 0;
delta_sy = 0;
delta_dx = -x;
delta_dy = -y;
blit_height = 2*y + height;
ydir = -1;
if (0) fprintf(stderr, "XX doing readpixel blit src_pitch %d dst_pitch %d\n",
source_pitch, dest_pitch);
for (i = 0 ; i < nbox ; )
{
int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
drm_clip_rect_t *box = dPriv->pClipRects;
drm_clip_rect_t *b = mmesa->sarea->boxes;
int n = 0;
for ( ; i < nr ; i++) {
GLint bx = box[i].x1;
GLint by = box[i].y1;
GLint bw = box[i].x2 - bx;
GLint bh = box[i].y2 - by;
if (bx < x) bw -= x - bx, bx = x;
if (by < y) bh -= y - by, by = y;
if (bx + bw > x + width) bw = x + width - bx;
if (by + bh > y + height) bh = y + height - by;
if (bw <= 0) continue;
if (bh <= 0) continue;
b->x1 = bx;
b->y1 = by;
b->x2 = bx + bw;
b->y2 = by + bh;
b++;
n++;
}
mmesa->sarea->nbox = n;
if (n && (retcode = drmCommandWrite( mmesa->driFd, DRM_MGA_BLIT,
&blit, sizeof(drmMGABlit)))) {
fprintf(stderr, "blit ioctl failed, retcode = %d\n", retcode);
UNLOCK_HARDWARE( mmesa );
exit(1);
}
}
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT );
}
#endif
UNLOCK_HARDWARE( mmesa );
return GL_TRUE;
}
static void
mgaDDReadPixels( struct gl_context *ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *pack,
GLvoid *pixels )
{
if (!mgaTryReadPixels( ctx, x, y, width, height, format, type, pack, pixels))
_swrast_ReadPixels( ctx, x, y, width, height, format, type, pack, pixels);
}
static void do_draw_pix( struct gl_context *ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLint pitch,
const void *pixels,
GLuint dest, GLuint planemask)
{
#if 0
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
drmMGABlit blit;
__DRIdrawable *dPriv = mmesa->driDrawable;
drm_clip_rect_t pbox = dPriv->pClipRects;
int nbox = dPriv->numClipRects;
int retcode, i;
y = dPriv->h - y - height;
x += mmesa->drawX;
y += mmesa->drawY;
blit.dest = dest;
blit.planemask = planemask;
blit.source = ((mmesa->mgaScreen->agp.handle + AGP_OFFSET(mmesa, pixels))
| SO_srcmap_sys | SO_srcacc_agp);
blit.dest_pitch = mmesa->mgaScreen->frontPitch / mmesa->mgaScreen->cpp;
blit.source_pitch = pitch;
blit.delta_sx = -x;
blit.delta_sy = -y;
blit.delta_dx = 0;
blit.delta_dy = 0;
if (ctx->Pixel.ZoomY == -1) {
blit.height = height;
blit.ydir = 1;
} else {
blit.height = height;
blit.ydir = -1;
}
if (0) fprintf(stderr,
"doing drawpixel blit src_pitch %d dst_pitch %d\n",
blit.source_pitch, blit.dest_pitch);
for (i = 0 ; i < nbox ; )
{
int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
drm_clip_rect_t *box = mmesa->pClipRects;
drm_clip_rect_t *b = mmesa->sarea->boxes;
int n = 0;
for ( ; i < nr ; i++) {
GLint bx = box[i].x1;
GLint by = box[i].y1;
GLint bw = box[i].x2 - bx;
GLint bh = box[i].y2 - by;
if (bx < x) bw -= x - bx, bx = x;
if (by < y) bh -= y - by, by = y;
if (bx + bw > x + width) bw = x + width - bx;
if (by + bh > y + height) bh = y + height - by;
if (bw <= 0) continue;
if (bh <= 0) continue;
b->x1 = bx;
b->y1 = by;
b->x2 = bx + bw;
b->y2 = by + bh;
b++;
n++;
}
mmesa->sarea->nbox = n;
if (n && (retcode = drmCommandWrite( mmesa->driFd, DRM_MGA_BLIT,
&blit, sizeof(drmMGABlit)))) {
fprintf(stderr, "blit ioctl failed, retcode = %d\n", retcode);
UNLOCK_HARDWARE( mmesa );
exit(1);
}
}
#endif
}
static GLboolean
mgaTryDrawPixels( struct gl_context *ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *unpack,
const GLvoid *pixels )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLint size, skipPixels, skipRows;
GLint pitch = unpack->RowLength ? unpack->RowLength : width;
GLuint dest, planemask;
GLuint cpp = mmesa->mgaScreen->cpp;
if (!clip_pixelrect(ctx, ctx->DrawBuffer,
&x, &y, &width, &height,
&skipPixels, &skipRows, &size)) {
return GL_TRUE;
}
switch (format) {
case GL_DEPTH_STENCIL:
dest = mmesa->mgaScreen->depthOffset;
planemask = ~0;
if (!check_depth_stencil_24_8(ctx, type, unpack, pixels, size, pitch) ||
!check_depth_per_fragment_ops(ctx) ||
!check_stencil_per_fragment_ops(ctx))
return GL_FALSE;
break;
case GL_DEPTH_COMPONENT:
dest = mmesa->mgaScreen->depthOffset;
if (ctx->Visual.depthBits == 24)
planemask = ~0xff;
else
planemask = ~0;
if (!check_depth(ctx, type, unpack, pixels, size, pitch) ||
!check_depth_per_fragment_ops(ctx))
return GL_FALSE;
break;
case GL_RGB:
case GL_BGRA:
dest = (mmesa->draw_buffer == MGA_FRONT ?
mmesa->mgaScreen->frontOffset :
mmesa->mgaScreen->backOffset);
planemask = mgaPackColor(cpp,
ctx->Color.ColorMask[0][RCOMP],
ctx->Color.ColorMask[0][GCOMP],
ctx->Color.ColorMask[0][BCOMP],
ctx->Color.ColorMask[0][ACOMP]);
if (cpp == 2)
planemask |= planemask << 16;
if (!check_color(ctx, type, format, unpack, pixels, size, pitch)) {
return GL_FALSE;
}
if (!check_color_per_fragment_ops(ctx)) {
return GL_FALSE;
}
break;
default:
return GL_FALSE;
}
LOCK_HARDWARE_QUIESCENT( mmesa );
if (mmesa->dirty_cliprects & MGA_FRONT)
mgaUpdateRects( mmesa, MGA_FRONT );
if ( IS_AGP_MEM(mmesa, (char *)pixels) &&
IS_AGP_MEM(mmesa, (char *)pixels + size) )
{
do_draw_pix( ctx, x, y, width, height, pitch, pixels,
dest, planemask );
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT );
}
else
{
/* Pixels is in regular memory -- get dma buffers and perform
* upload through them.
*/
/* drmBufPtr buf = mgaGetBufferLocked(mmesa); */
GLuint bufferpitch = (width*cpp+31)&~31;
char *address = 0; /* mmesa->mgaScreen->agp.map; */
do {
/* GLuint rows = MIN2( height, MGA_DMA_BUF_SZ / bufferpitch ); */
GLuint rows = height;
if (0) fprintf(stderr, "trying to upload %d rows (pitch %d)\n",
rows, bufferpitch);
/* The texture conversion code is so slow that there is only
* negligble speedup when the buffers/images don't exactly
* match:
*/
#if 0
if (cpp == 2) {
if (!_mesa_convert_texsubimage2d( MESA_FORMAT_RGB565,
0, 0, width, rows,
bufferpitch, format, type,
unpack, pixels, address )) {
/* mgaReleaseBufLocked( mmesa, buf ); */
UNLOCK_HARDWARE(mmesa);
return GL_FALSE;
}
} else {
if (!_mesa_convert_texsubimage2d( MESA_FORMAT_ARGB8888,
0, 0, width, rows,
bufferpitch, format, type,
unpack, pixels, address )) {
/* mgaReleaseBufLocked( mmesa, buf ); */
UNLOCK_HARDWARE(mmesa);
return GL_FALSE;
}
}
#else
memcpy( address, pixels, rows*bufferpitch );
#endif
do_draw_pix( ctx, x, y, width, rows,
bufferpitch/cpp, address, dest, planemask );
/* Fix me -- use multiple buffers to avoid flush.
*/
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT );
pixels = (void *)((char *) pixels + rows * pitch);
height -= rows;
y += rows;
} while (height);
/* mgaReleaseBufLocked( mmesa, buf ); */
}
UNLOCK_HARDWARE( mmesa );
mmesa->dirty |= MGA_UPLOAD_CLIPRECTS;
return GL_TRUE;
}
static void
mgaDDDrawPixels( struct gl_context *ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *unpack,
const GLvoid *pixels )
{
if (!mgaTryDrawPixels( ctx, x, y, width, height, format, type,
unpack, pixels ))
_swrast_DrawPixels( ctx, x, y, width, height, format, type,
unpack, pixels );
}
#endif
/* Stub functions - not a real allocator, always returns pointer to
* the same block of agp space which isn't used for anything else at
* present.
*/
void mgaDDInitPixelFuncs( struct gl_context *ctx )
{
#if 0
/* evidently, these functions don't always work */
if (getenv("MGA_BLIT_PIXELS")) {
ctx->Driver.ReadPixels = mgaDDReadPixels; /* requires agp dest */
ctx->Driver.DrawPixels = mgaDDDrawPixels; /* works with agp/normal mem */
}
#endif
}

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src/mesa/drivers/dri/mga/mgapixel.h
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/*
* Copyright 2000-2001 Compaq Computer Inc. VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef MGA_PIXELS_H
#define MGA_PIXELS_H
#include "main/mtypes.h"
extern void mgaDDInitPixelFuncs( struct gl_context *ctx );
#endif

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src/mesa/drivers/dri/mga/mgaregs.h
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src/mesa/drivers/dri/mga/mgarender.c
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/**************************************************************************
Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
VA Linux Systems Inc., Fremont, California.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*
*/
/*
* Render unclipped vertex buffers by emitting vertices directly to
* dma buffers. Use strip/fan hardware primitives where possible.
* Simulate missing primitives with indexed vertices.
*/
#include "main/glheader.h"
#include "main/context.h"
#include "main/macros.h"
#include "main/imports.h"
#include "main/mtypes.h"
#include "math/m_xform.h"
#include "tnl/t_context.h"
#include "mgacontext.h"
#include "mgatris.h"
#include "mgaioctl.h"
#include "mgavb.h"
#define HAVE_POINTS 0
#define HAVE_LINES 0
#define HAVE_LINE_STRIPS 0
#define HAVE_TRIANGLES 1
#define HAVE_TRI_STRIPS 1
#define HAVE_TRI_STRIP_1 0
#define HAVE_TRI_FANS 1
#define HAVE_POLYGONS 0
#define HAVE_QUADS 0
#define HAVE_QUAD_STRIPS 0
#define HAVE_ELTS 0 /* for now */
static void mgaDmaPrimitive( struct gl_context *ctx, GLenum prim )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLuint hwprim;
switch (prim) {
case GL_TRIANGLES:
hwprim = MGA_WA_TRIANGLES;
break;
case GL_TRIANGLE_STRIP:
if (mmesa->vertex_size == 8)
hwprim = MGA_WA_TRISTRIP_T0;
else
hwprim = MGA_WA_TRISTRIP_T0T1;
break;
case GL_TRIANGLE_FAN:
if (mmesa->vertex_size == 8)
hwprim = MGA_WA_TRIFAN_T0;
else
hwprim = MGA_WA_TRIFAN_T0T1;
break;
default:
return;
}
mgaRasterPrimitive( ctx, GL_TRIANGLES, hwprim );
}
#define LOCAL_VARS mgaContextPtr mmesa = MGA_CONTEXT(ctx)
#define INIT( prim ) do { \
if (0) fprintf(stderr, "%s\n", __FUNCTION__); \
FLUSH_BATCH(mmesa); \
mgaDmaPrimitive( ctx, prim ); \
} while (0)
#define FLUSH() FLUSH_BATCH( mmesa )
#define GET_CURRENT_VB_MAX_VERTS() \
0 /* fix me */
#define GET_SUBSEQUENT_VB_MAX_VERTS() \
MGA_BUFFER_SIZE / (mmesa->vertex_size * 4)
#define ALLOC_VERTS( nr ) \
mgaAllocDmaLow( mmesa, (nr) * mmesa->vertex_size * 4)
#define EMIT_VERTS( ctx, j, nr, buf ) \
mga_emit_contiguous_verts(ctx, j, (j)+(nr), buf)
#define TAG(x) mga_##x
#include "tnl_dd/t_dd_dmatmp.h"
/**********************************************************************/
/* Render pipeline stage */
/**********************************************************************/
static GLboolean mga_run_render( struct gl_context *ctx,
struct tnl_pipeline_stage *stage )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
GLuint i;
/* Don't handle clipping or indexed vertices or vertex manipulations.
*/
if (mmesa->RenderIndex != 0 ||
!mga_validate_render( ctx, VB )) {
return GL_TRUE;
}
tnl->Driver.Render.Start( ctx );
mmesa->SetupNewInputs = ~0;
for (i = 0 ; i < VB->PrimitiveCount ; i++)
{
GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
if (!length)
continue;
mga_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
prim);
}
tnl->Driver.Render.Finish( ctx );
return GL_FALSE; /* finished the pipe */
}
const struct tnl_pipeline_stage _mga_render_stage =
{
"mga render",
NULL,
NULL,
NULL,
NULL,
mga_run_render /* run */
};

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src/mesa/drivers/dri/mga/mgaspan.c
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/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#include "main/mtypes.h"
#include "mgadd.h"
#include "mgacontext.h"
#include "mgaspan.h"
#include "mgaioctl.h"
#include "swrast/swrast.h"
#define DBG 0
#define LOCAL_VARS \
mgaContextPtr mmesa = MGA_CONTEXT(ctx); \
__DRIscreen *sPriv = mmesa->driScreen; \
driRenderbuffer *drb = (driRenderbuffer *) rb; \
const __DRIdrawable *dPriv = drb->dPriv; \
GLuint pitch = drb->pitch; \
GLuint height = dPriv->h; \
char *buf = (char *)(sPriv->pFB + \
drb->offset + \
dPriv->x * drb->cpp + \
dPriv->y * pitch); \
GLuint p; \
(void) buf; (void) p
#define LOCAL_DEPTH_VARS \
mgaContextPtr mmesa = MGA_CONTEXT(ctx); \
__DRIscreen *sPriv = mmesa->driScreen; \
driRenderbuffer *drb = (driRenderbuffer *) rb; \
const __DRIdrawable *dPriv = drb->dPriv; \
GLuint pitch = drb->pitch; \
GLuint height = dPriv->h; \
char *buf = (char *)(sPriv->pFB + \
drb->offset + \
dPriv->x * drb->cpp + \
dPriv->y * pitch)
#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
#define HW_LOCK()
/* FIXME could/should we use dPriv->numClipRects like the other drivers? */
#define HW_CLIPLOOP() \
do { \
int _nc = mmesa->numClipRects; \
while (_nc--) { \
int minx = mmesa->pClipRects[_nc].x1 - mmesa->drawX; \
int miny = mmesa->pClipRects[_nc].y1 - mmesa->drawY; \
int maxx = mmesa->pClipRects[_nc].x2 - mmesa->drawX; \
int maxy = mmesa->pClipRects[_nc].y2 - mmesa->drawY;
#define HW_ENDCLIPLOOP() \
} \
} while (0)
#define HW_UNLOCK()
#define Y_FLIP(_y) (height - _y - 1)
/* 16 bit, RGB565 color spanline and pixel functions
*/
#define SPANTMP_PIXEL_FMT GL_RGB
#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
#define TAG(x) mga##x##_565
#define TAG2(x,y) mga##x##_565##y
#include "spantmp2.h"
/* 32 bit, ARGB8888 color spanline and pixel functions
*/
#define SPANTMP_PIXEL_FMT GL_BGRA
#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
#define TAG(x) mga##x##_8888
#define TAG2(x,y) mga##x##_8888##y
#include "spantmp2.h"
/* 16 bit depthbuffer functions.
*/
#define VALUE_TYPE GLushort
#define WRITE_DEPTH( _x, _y, d ) \
*(GLushort *)(buf + (_x)*2 + (_y)*pitch) = d;
#define READ_DEPTH( d, _x, _y ) \
d = *(GLushort *)(buf + (_x)*2 + (_y)*pitch);
#define TAG(x) mga##x##_z16
#include "depthtmp.h"
/* 32 bit depthbuffer functions.
*/
#define VALUE_TYPE GLuint
#define WRITE_DEPTH( _x, _y, d ) \
*(GLuint *)(buf + (_x)*4 + (_y)*pitch) = d;
#define READ_DEPTH( d, _x, _y ) \
d = *(GLuint *)(buf + (_x)*4 + (_y)*pitch);
#define TAG(x) mga##x##_z32
#include "depthtmp.h"
/* 24/8 bit interleaved depth/stencil functions
*/
#define VALUE_TYPE GLuint
#define WRITE_DEPTH( _x, _y, d ) { \
GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch); \
tmp &= 0xff; \
tmp |= (d) << 8; \
*(GLuint *)(buf + (_x)*4 + (_y)*pitch) = tmp; \
}
#define READ_DEPTH( d, _x, _y ) { \
d = (*(GLuint *)(buf + (_x)*4 + (_y)*pitch) & ~0xff) >> 8; \
}
#define TAG(x) mga##x##_z24_s8
#include "depthtmp.h"
#define WRITE_STENCIL( _x, _y, d ) { \
GLuint tmp = *(GLuint *)(buf + _x*4 + _y*pitch); \
tmp &= 0xffffff00; \
tmp |= d & 0xff; \
*(GLuint *)(buf + _x*4 + _y*pitch) = tmp; \
}
#define READ_STENCIL( d, _x, _y ) \
d = *(GLuint *)(buf + _x*4 + _y*pitch) & 0xff;
#define TAG(x) mga##x##_z24_s8
#include "stenciltmp.h"
static void
mgaSpanRenderStart( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
FLUSH_BATCH( mmesa );
LOCK_HARDWARE_QUIESCENT( mmesa );
}
static void
mgaSpanRenderFinish( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
_swrast_flush( ctx );
UNLOCK_HARDWARE( mmesa );
}
/**
* Initialize the driver callbacks for the read / write span functions.
*
* \bug
* To really support RGB888 and RGBA8888 visuals, we need separate read and
* write routines for 888 and 8888. We also need to determine whether or not
* the visual has destination alpha.
*/
void mgaDDInitSpanFuncs( struct gl_context *ctx )
{
struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
swdd->SpanRenderStart = mgaSpanRenderStart;
swdd->SpanRenderFinish = mgaSpanRenderFinish;
}
/**
* Plug in the Get/Put routines for the given driRenderbuffer.
*/
void
mgaSetSpanFunctions(driRenderbuffer *drb, const struct gl_config *vis)
{
if (drb->Base.Format == MESA_FORMAT_RGB565) {
mgaInitPointers_565(&drb->Base);
}
else if (drb->Base.Format == MESA_FORMAT_ARGB8888) {
mgaInitPointers_8888(&drb->Base);
}
else if (drb->Base.Format == MESA_FORMAT_Z16) {
mgaInitDepthPointers_z16(&drb->Base);
}
else if (drb->Base.Format == MESA_FORMAT_Z24_S8) {
mgaInitDepthPointers_z24_s8(&drb->Base);
}
else if (drb->Base.Format == MESA_FORMAT_Z32) {
mgaInitDepthPointers_z32(&drb->Base);
}
else if (drb->Base.Format == MESA_FORMAT_S8) {
mgaInitStencilPointers_z24_s8(&drb->Base);
}
}

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src/mesa/drivers/dri/mga/mgaspan.h
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/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef _MGA_SPAN_H
#define _MGA_SPAN_H
#include "drirenderbuffer.h"
extern void mgaDDInitSpanFuncs( struct gl_context *ctx );
extern void
mgaSetSpanFunctions(driRenderbuffer *rb, const struct gl_config *vis);
#endif

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src/mesa/drivers/dri/mga/mgastate.c
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src/mesa/drivers/dri/mga/mgastate.h
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/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef _MGA_STATE_H
#define _MGA_STATE_H
extern void mgaInitState( mgaContextPtr mmesa );
extern void mgaDDInitStateFuncs(struct gl_context *ctx);
extern void mgaUpdateClipping(const struct gl_context *ctx);
extern void mgaUpdateCull( struct gl_context *ctx );
extern void mgaCalcViewport( struct gl_context *ctx );
extern void mgaUpdateRects( mgaContextPtr mmesa, GLuint buffers );
#endif

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src/mesa/drivers/dri/mga/mgatex.c
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/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#include "main/glheader.h"
#include "main/mm.h"
#include "main/colormac.h"
#include "main/context.h"
#include "main/enums.h"
#include "main/simple_list.h"
#include "main/imports.h"
#include "main/macros.h"
#include "main/texstore.h"
#include "main/teximage.h"
#include "main/texobj.h"
#include "mgacontext.h"
#include "mgatex.h"
#include "mgaregs.h"
#include "mgaioctl.h"
#include "xmlpool.h"
/**
* Set the texture wrap modes.
* Currently \c GL_REPEAT, \c GL_CLAMP and \c GL_CLAMP_TO_EDGE are supported.
*
* \param t Texture object whose wrap modes are to be set
* \param swrap Wrap mode for the \a s texture coordinate
* \param twrap Wrap mode for the \a t texture coordinate
*/
static void
mgaSetTexWrapping( mgaTextureObjectPtr t, GLenum swrap, GLenum twrap )
{
GLboolean is_clamp = GL_FALSE;
GLboolean is_clamp_to_edge = GL_FALSE;
t->setup.texctl &= (TMC_clampu_MASK & TMC_clampv_MASK);
t->setup.texctl2 &= (TMC_borderen_MASK);
switch( swrap ) {
case GL_REPEAT:
break;
case GL_CLAMP:
t->setup.texctl |= TMC_clampu_enable;
is_clamp = GL_TRUE;
break;
case GL_CLAMP_TO_EDGE:
t->setup.texctl |= TMC_clampu_enable;
is_clamp_to_edge = GL_TRUE;
break;
default:
_mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__);
}
switch( twrap ) {
case GL_REPEAT:
break;
case GL_CLAMP:
t->setup.texctl |= TMC_clampv_enable;
is_clamp = GL_TRUE;
break;
case GL_CLAMP_TO_EDGE:
t->setup.texctl |= TMC_clampv_enable;
is_clamp_to_edge = GL_TRUE;
break;
default:
_mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
}
if ( is_clamp ) {
t->setup.texctl2 |= TMC_borderen_enable;
}
t->border_fallback = (is_clamp && is_clamp_to_edge);
}
/**
* Set the texture magnification and minification modes.
*
* \param t Texture whose filter modes are to be set
* \param minf Texture minification mode
* \param magf Texture magnification mode
*/
static void
mgaSetTexFilter( mgaTextureObjectPtr t, GLenum minf, GLenum magf )
{
GLuint val = 0;
switch (minf) {
case GL_NEAREST: val = TF_minfilter_nrst; break;
case GL_LINEAR: val = TF_minfilter_bilin; break;
case GL_NEAREST_MIPMAP_NEAREST: val = TF_minfilter_mm1s; break;
case GL_LINEAR_MIPMAP_NEAREST: val = TF_minfilter_mm4s; break;
case GL_NEAREST_MIPMAP_LINEAR: val = TF_minfilter_mm2s; break;
case GL_LINEAR_MIPMAP_LINEAR: val = TF_minfilter_mm8s; break;
default: val = TF_minfilter_nrst; break;
}
switch (magf) {
case GL_NEAREST: val |= TF_magfilter_nrst; break;
case GL_LINEAR: val |= TF_magfilter_bilin; break;
default: val |= TF_magfilter_nrst; break;
}
/* See OpenGL 1.2 specification */
if (magf == GL_LINEAR && (minf == GL_NEAREST_MIPMAP_NEAREST ||
minf == GL_NEAREST_MIPMAP_LINEAR)) {
val |= MGA_FIELD( TF_fthres, 0x20 ); /* c = 0.5 */
} else {
val |= MGA_FIELD( TF_fthres, 0x10 ); /* c = 0 */
}
/* Mask off the bits for the fields we are setting. Remember, the MGA mask
* defines have 0s for the bits in the named fields. This is the opposite
* of most of the other drivers.
*/
t->setup.texfilter &= (TF_minfilter_MASK &
TF_magfilter_MASK &
TF_fthres_MASK);
t->setup.texfilter |= val;
}
static void mgaSetTexBorderColor(mgaTextureObjectPtr t, const GLfloat color[4])
{
GLubyte c[4];
CLAMPED_FLOAT_TO_UBYTE(c[0], color[0]);
CLAMPED_FLOAT_TO_UBYTE(c[1], color[1]);
CLAMPED_FLOAT_TO_UBYTE(c[2], color[2]);
CLAMPED_FLOAT_TO_UBYTE(c[3], color[3]);
t->setup.texbordercol = PACK_COLOR_8888(c[3], c[0], c[1], c[2] );
}
static gl_format
mgaChooseTextureFormat( struct gl_context *ctx, GLint internalFormat,
GLenum format, GLenum type )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
const GLboolean do32bpt =
( mmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_32 );
const GLboolean force16bpt =
( mmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FORCE_16 );
(void) format;
switch ( internalFormat ) {
case 4:
case GL_RGBA:
case GL_COMPRESSED_RGBA:
switch ( type ) {
case GL_UNSIGNED_INT_10_10_10_2:
case GL_UNSIGNED_INT_2_10_10_10_REV:
return do32bpt ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB1555;
case GL_UNSIGNED_SHORT_4_4_4_4:
case GL_UNSIGNED_SHORT_4_4_4_4_REV:
return MESA_FORMAT_ARGB4444;
case GL_UNSIGNED_SHORT_5_5_5_1:
case GL_UNSIGNED_SHORT_1_5_5_5_REV:
return MESA_FORMAT_ARGB1555;
default:
return do32bpt ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB4444;
}
case 3:
case GL_RGB:
case GL_COMPRESSED_RGB:
switch ( type ) {
case GL_UNSIGNED_SHORT_4_4_4_4:
case GL_UNSIGNED_SHORT_4_4_4_4_REV:
return MESA_FORMAT_ARGB4444;
case GL_UNSIGNED_SHORT_5_5_5_1:
case GL_UNSIGNED_SHORT_1_5_5_5_REV:
return MESA_FORMAT_ARGB1555;
case GL_UNSIGNED_SHORT_5_6_5:
case GL_UNSIGNED_SHORT_5_6_5_REV:
return MESA_FORMAT_RGB565;
default:
return do32bpt ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_RGB565;
}
case GL_RGBA8:
case GL_RGB10_A2:
case GL_RGBA12:
case GL_RGBA16:
return !force16bpt ?
MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB4444;
case GL_RGBA4:
case GL_RGBA2:
return MESA_FORMAT_ARGB4444;
case GL_RGB5_A1:
return MESA_FORMAT_ARGB1555;
case GL_RGB8:
case GL_RGB10:
case GL_RGB12:
case GL_RGB16:
return !force16bpt ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_RGB565;
case GL_RGB5:
case GL_RGB4:
case GL_R3_G3_B2:
return MESA_FORMAT_RGB565;
case GL_ALPHA:
case GL_ALPHA4:
case GL_ALPHA8:
case GL_ALPHA12:
case GL_ALPHA16:
case GL_COMPRESSED_ALPHA:
/* FIXME: This will report incorrect component sizes... */
return MGA_IS_G400(mmesa) ? MESA_FORMAT_AL88 : MESA_FORMAT_ARGB4444;
case 1:
case GL_LUMINANCE:
case GL_LUMINANCE4:
case GL_LUMINANCE8:
case GL_LUMINANCE12:
case GL_LUMINANCE16:
case GL_COMPRESSED_LUMINANCE:
/* FIXME: This will report incorrect component sizes... */
return MGA_IS_G400(mmesa) ? MESA_FORMAT_AL88 : MESA_FORMAT_RGB565;
case 2:
case GL_LUMINANCE_ALPHA:
case GL_LUMINANCE4_ALPHA4:
case GL_LUMINANCE6_ALPHA2:
case GL_LUMINANCE8_ALPHA8:
case GL_LUMINANCE12_ALPHA4:
case GL_LUMINANCE12_ALPHA12:
case GL_LUMINANCE16_ALPHA16:
case GL_COMPRESSED_LUMINANCE_ALPHA:
/* FIXME: This will report incorrect component sizes... */
return MGA_IS_G400(mmesa) ? MESA_FORMAT_AL88 : MESA_FORMAT_ARGB4444;
case GL_INTENSITY:
case GL_INTENSITY4:
case GL_INTENSITY8:
case GL_INTENSITY12:
case GL_INTENSITY16:
case GL_COMPRESSED_INTENSITY:
/* FIXME: This will report incorrect component sizes... */
return MGA_IS_G400(mmesa) ? MESA_FORMAT_I8 : MESA_FORMAT_ARGB4444;
case GL_YCBCR_MESA:
if (MGA_IS_G400(mmesa) &&
(type == GL_UNSIGNED_SHORT_8_8_APPLE ||
type == GL_UNSIGNED_BYTE))
return MESA_FORMAT_YCBCR;
else
return MESA_FORMAT_YCBCR_REV;
case GL_COLOR_INDEX:
case GL_COLOR_INDEX1_EXT:
case GL_COLOR_INDEX2_EXT:
case GL_COLOR_INDEX4_EXT:
case GL_COLOR_INDEX8_EXT:
case GL_COLOR_INDEX12_EXT:
case GL_COLOR_INDEX16_EXT:
return MESA_FORMAT_CI8;
default:
_mesa_problem( ctx, "unexpected texture format in %s", __FUNCTION__ );
return MESA_FORMAT_NONE;
}
return MESA_FORMAT_NONE; /* never get here */
}
/**
* Allocate space for and load the mesa images into the texture memory block.
* This will happen before drawing with a new texture, or drawing with a
* texture after it was swapped out or teximaged again.
*/
static mgaTextureObjectPtr
mgaAllocTexObj( struct gl_texture_object *tObj )
{
mgaTextureObjectPtr t;
t = CALLOC( sizeof( *t ) );
tObj->DriverData = t;
if ( t != NULL ) {
/* Initialize non-image-dependent parts of the state:
*/
t->base.tObj = tObj;
t->setup.texctl = TMC_takey_1 | TMC_tamask_0;
t->setup.texctl2 = TMC_ckstransdis_enable;
t->setup.texfilter = TF_filteralpha_enable | TF_uvoffset_OGL;
t->border_fallback = GL_FALSE;
t->texenv_fallback = GL_FALSE;
make_empty_list( & t->base );
mgaSetTexWrapping( t, tObj->Sampler.WrapS, tObj->Sampler.WrapT );
mgaSetTexFilter( t, tObj->Sampler.MinFilter, tObj->Sampler.MagFilter );
mgaSetTexBorderColor( t, tObj->Sampler.BorderColor.f );
}
return( t );
}
static void mgaTexEnv( struct gl_context *ctx, GLenum target,
GLenum pname, const GLfloat *param )
{
GLuint unit = ctx->Texture.CurrentUnit;
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
switch( pname ) {
case GL_TEXTURE_ENV_COLOR: {
GLubyte c[4];
UNCLAMPED_FLOAT_TO_RGBA_CHAN( c, texUnit->EnvColor );
mmesa->envcolor[unit] = PACK_COLOR_8888( c[3], c[0], c[1], c[2] );
break;
}
}
}
static void mgaTexImage2D( struct gl_context *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint border,
GLenum format, GLenum type, const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
if ( t != NULL ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) mgaAllocTexObj( texObj );
if ( t == NULL ) {
_mesa_error( ctx, GL_OUT_OF_MEMORY, "glTexImage2D" );
return;
}
}
_mesa_store_teximage2d( ctx, target, level, internalFormat,
width, height, border, format, type,
pixels, packing, texObj, texImage );
level -= t->firstLevel;
if (level >= 0)
t->dirty_images[0] |= (1UL << level);
}
static void mgaTexSubImage2D( struct gl_context *ctx,
GLenum target,
GLint level,
GLint xoffset, GLint yoffset,
GLsizei width, GLsizei height,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
assert( t ); /* this _should_ be true */
if ( t != NULL ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) mgaAllocTexObj( texObj );
if ( t == NULL ) {
_mesa_error( ctx, GL_OUT_OF_MEMORY, "glTexImage2D" );
return;
}
}
_mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
height, format, type, pixels, packing, texObj,
texImage);
level -= t->firstLevel;
if (level >= 0)
t->dirty_images[0] |= (1UL << level);
}
/**
* Changes variables and flags for a state update, which will happen at the
* next UpdateTextureState
*/
static void
mgaTexParameter( struct gl_context *ctx, GLenum target,
struct gl_texture_object *tObj,
GLenum pname, const GLfloat *params )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
mgaTextureObjectPtr t = (mgaTextureObjectPtr) tObj->DriverData;
/* If we don't have a hardware texture, it will be automatically
* created with current state before it is used, so we don't have
* to do anything now
*/
if ( (t == NULL) ||
(target != GL_TEXTURE_2D &&
target != GL_TEXTURE_RECTANGLE_NV) ) {
return;
}
switch (pname) {
case GL_TEXTURE_MIN_FILTER:
driSwapOutTextureObject( (driTextureObject *) t );
/* FALLTHROUGH */
case GL_TEXTURE_MAG_FILTER:
FLUSH_BATCH(mmesa);
mgaSetTexFilter( t, tObj->Sampler.MinFilter, tObj->Sampler.MagFilter );
break;
case GL_TEXTURE_WRAP_S:
case GL_TEXTURE_WRAP_T:
FLUSH_BATCH(mmesa);
mgaSetTexWrapping(t,tObj->Sampler.WrapS,tObj->Sampler.WrapT);
break;
case GL_TEXTURE_BORDER_COLOR:
FLUSH_BATCH(mmesa);
mgaSetTexBorderColor(t, tObj->Sampler.BorderColor.f);
break;
case GL_TEXTURE_BASE_LEVEL:
case GL_TEXTURE_MAX_LEVEL:
case GL_TEXTURE_MIN_LOD:
case GL_TEXTURE_MAX_LOD:
/* This isn't the most efficient solution but there doesn't appear to
* be a nice alternative. Since there's no LOD clamping,
* we just have to rely on loading the right subset of mipmap levels
* to simulate a clamped LOD.
*/
driSwapOutTextureObject( (driTextureObject *) t );
break;
default:
return;
}
}
static void
mgaBindTexture( struct gl_context *ctx, GLenum target,
struct gl_texture_object *tObj )
{
assert( (target != GL_TEXTURE_2D && target != GL_TEXTURE_RECTANGLE_NV) ||
(tObj->DriverData != NULL) );
}
static void
mgaDeleteTexture( struct gl_context *ctx, struct gl_texture_object *tObj )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
driTextureObject * t = (driTextureObject *) tObj->DriverData;
if ( t ) {
if ( mmesa ) {
FLUSH_BATCH( mmesa );
}
driDestroyTextureObject( t );
}
/* Free mipmap images and the texture object itself */
_mesa_delete_texture_object(ctx, tObj);
}
/**
* Allocate a new texture object.
* Called via ctx->Driver.NewTextureObject.
* Note: this function will be called during context creation to
* allocate the default texture objects.
* Note: we could use containment here to 'derive' the driver-specific
* texture object from the core mesa gl_texture_object. Not done at this time.
*/
static struct gl_texture_object *
mgaNewTextureObject( struct gl_context *ctx, GLuint name, GLenum target )
{
struct gl_texture_object *obj;
obj = _mesa_new_texture_object(ctx, name, target);
mgaAllocTexObj( obj );
return obj;
}
void
mgaInitTextureFuncs( struct dd_function_table *functions )
{
functions->ChooseTextureFormat = mgaChooseTextureFormat;
functions->TexImage2D = mgaTexImage2D;
functions->TexSubImage2D = mgaTexSubImage2D;
functions->BindTexture = mgaBindTexture;
functions->NewTextureObject = mgaNewTextureObject;
functions->DeleteTexture = mgaDeleteTexture;
functions->IsTextureResident = driIsTextureResident;
functions->TexEnv = mgaTexEnv;
functions->TexParameter = mgaTexParameter;
}

50
src/mesa/drivers/dri/mga/mgatex.h
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@ -1,50 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef MGATEX_INC
#define MGATEX_INC
#include "mgacontext.h"
typedef struct mga_texture_object_s *mgaTextureObjectPtr;
/* Called before a primitive is rendered to make sure the texture
* state is properly setup. Texture residence is checked later
* when we grab the lock.
*/
void mgaUpdateTextureState( struct gl_context *ctx );
int mgaUploadTexImages( mgaContextPtr mmesa, mgaTextureObjectPtr t );
void mgaDestroyTexObj( mgaContextPtr mmesa, mgaTextureObjectPtr t );
void mgaInitTextureFuncs( struct dd_function_table *functions );
GLboolean mgaUpdateTextureEnvCombine( struct gl_context *ctx, int unit );
#endif

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src/mesa/drivers/dri/mga/mgatexmem.c
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/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#include "main/glheader.h"
#include "main/mm.h"
#include "mgacontext.h"
#include "mgatex.h"
#include "mgaregs.h"
#include "mgaioctl.h"
#include "mga_xmesa.h"
#include "main/imports.h"
#include "main/simple_list.h"
/**
* Destroy any device-dependent state associated with the texture. This may
* include NULLing out hardware state that points to the texture.
*/
void
mgaDestroyTexObj( mgaContextPtr mmesa, mgaTextureObjectPtr t )
{
unsigned i;
/* See if it was the driver's current object.
*/
if ( mmesa != NULL )
{
if ( t->age > mmesa->dirtyAge )
mmesa->dirtyAge = t->age;
for ( i = 0 ; i < mmesa->glCtx->Const.MaxTextureUnits ; i++ )
{
if ( t == mmesa->CurrentTexObj[ i ] ) {
mmesa->CurrentTexObj[ i ] = NULL;
}
}
}
}
/**
* Upload a texture image from system memory to either on-card or AGP
* memory. Uploads to on-card memory are performed using an ILOAD operation.
* This is used for both initial loading of the entire image, and texSubImage
* updates.
*
* Performed with the hardware lock held.
*
* Even though this function is named "upload subimage," the entire image
* is uploaded.
*
* \param mmesa Driver context.
* \param t Texture to be uploaded.
* \param hwlevel Mipmap level of the texture to be uploaded.
*
* \bug As mentioned above, this fuction actually copies the entier mipmap
* level. There should be a version of this function that performs
* sub-rectangle uploads. This will perform quite a bit better if only
* a small portion of a larger texture has been updated. Care would
* need to be take with such an implementation once glCopyTexImage has
* been hardware accelerated.
*/
static void mgaUploadSubImage( mgaContextPtr mmesa,
mgaTextureObjectPtr t, GLint hwlevel )
{
struct gl_texture_image * texImage;
unsigned offset;
unsigned texelBytes;
unsigned length;
const int level = hwlevel + t->base.firstLevel;
if ( (hwlevel < 0)
|| (hwlevel >= (MGA_IS_G200(mmesa)
? G200_TEX_MAXLEVELS : G400_TEX_MAXLEVELS)) ) {
fprintf( stderr, "[%s:%d] level = %d\n", __FILE__, __LINE__, level );
return;
}
texImage = t->base.tObj->Image[0][level];
if ( texImage == NULL ) {
fprintf( stderr, "[%s:%d] Image[%d] = NULL\n", __FILE__, __LINE__,
level );
return;
}
if (texImage->Data == NULL) {
fprintf(stderr, "null texture image data tObj %p level %d\n",
(void *) t->base.tObj, level);
return;
}
/* find the proper destination offset for this level */
if ( MGA_IS_G200(mmesa) ) {
offset = (t->base.memBlock->ofs + t->offsets[hwlevel]);
}
else {
unsigned i;
offset = t->base.memBlock->ofs;
for ( i = 0 ; i < hwlevel ; i++ ) {
offset += (t->offsets[1] >> (i * 2));
}
}
/* Copy the texture from system memory to a memory space that can be
* directly used by the hardware for texturing.
*/
texelBytes = _mesa_get_format_bytes(texImage->TexFormat);
length = texImage->Width * texImage->Height * texelBytes;
if ( t->base.heap->heapId == MGA_CARD_HEAP ) {
unsigned tex_offset = 0;
unsigned to_copy;
/* We may not be able to upload the entire texture in one batch due to
* register limits or dma buffer limits. Split the copy up into maximum
* sized chunks.
*/
offset += mmesa->mgaScreen->textureOffset[ t->base.heap->heapId ];
while ( length != 0 ) {
mgaGetILoadBufferLocked( mmesa );
/* The kernel ILOAD ioctl requires that the lenght be an even multiple
* of MGA_ILOAD_ALIGN.
*/
length = ((length) + MGA_ILOAD_MASK) & ~MGA_ILOAD_MASK;
to_copy = MIN2( length, MGA_BUFFER_SIZE );
(void) memcpy( mmesa->iload_buffer->address,
(GLubyte *) texImage->Data + tex_offset, to_copy );
if ( MGA_DEBUG & DEBUG_VERBOSE_TEXTURE )
fprintf(stderr, "[%s:%d] address/size = 0x%08lx/%d\n",
__FILE__, __LINE__,
(long) (offset + tex_offset),
to_copy );
mgaFireILoadLocked( mmesa, offset + tex_offset, to_copy );
tex_offset += to_copy;
length -= to_copy;
}
} else {
/* FIXME: the sync for direct copy reduces speed.. */
/* This works, is slower for uploads to card space and needs
* additional synchronization with the dma stream.
*/
UPDATE_LOCK(mmesa, DRM_LOCK_FLUSH | DRM_LOCK_QUIESCENT);
memcpy( mmesa->mgaScreen->texVirtual[t->base.heap->heapId] + offset,
texImage->Data, length );
if ( MGA_DEBUG & DEBUG_VERBOSE_TEXTURE )
fprintf(stderr, "[%s:%d] address/size = 0x%08lx/%d\n",
__FILE__, __LINE__,
(long) (mmesa->mgaScreen->texVirtual[t->base.heap->heapId]
+ offset),
length);
}
}
/**
* Upload the texture images associated with texture \a t. This might
* require the allocation of texture memory.
*
* \param mmesa Context pointer
* \param t Texture to be uploaded
*/
int mgaUploadTexImages( mgaContextPtr mmesa, mgaTextureObjectPtr t )
{
int i;
int ofs;
if ( (t == NULL) || (t->base.totalSize == 0) )
return 0;
LOCK_HARDWARE( mmesa );
if (t->base.memBlock == NULL ) {
int heap;
heap = driAllocateTexture( mmesa->texture_heaps, mmesa->nr_heaps,
(driTextureObject *) t );
if ( heap == -1 ) {
UNLOCK_HARDWARE( mmesa );
return -1;
}
assert(t->base.memBlock);
ofs = mmesa->mgaScreen->textureOffset[ heap ]
+ t->base.memBlock->ofs;
if ( MGA_IS_G200(mmesa) ) {
t->setup.texorg = ofs;
t->setup.texorg1 = ofs + t->offsets[1];
t->setup.texorg2 = ofs + t->offsets[2];
t->setup.texorg3 = ofs + t->offsets[3];
t->setup.texorg4 = ofs + t->offsets[4];
}
else {
t->setup.texorg = ofs | TO_texorgoffsetsel;
t->setup.texorg1 = t->offsets[1];
t->setup.texorg2 = 0;
t->setup.texorg3 = 0;
t->setup.texorg4 = 0;
}
mmesa->dirty |= MGA_UPLOAD_CONTEXT;
}
/* Let the world know we've used this memory recently.
*/
driUpdateTextureLRU( (driTextureObject *) t );
if (MGA_DEBUG&DEBUG_VERBOSE_TEXTURE)
fprintf(stderr, "[%s:%d] dispatch age: %d age freed memory: %d\n",
__FILE__, __LINE__,
GET_DISPATCH_AGE(mmesa), mmesa->dirtyAge);
if (mmesa->dirtyAge >= GET_DISPATCH_AGE(mmesa))
mgaWaitAgeLocked( mmesa, mmesa->dirtyAge );
if (t->base.dirty_images[0]) {
const int numLevels = t->base.lastLevel - t->base.firstLevel + 1;
if (MGA_DEBUG&DEBUG_VERBOSE_TEXTURE)
fprintf(stderr, "[%s:%d] dirty_images[0] = 0x%04x\n",
__FILE__, __LINE__, t->base.dirty_images[0] );
for (i = 0 ; i < numLevels ; i++) {
if ( (t->base.dirty_images[0] & (1U << i)) != 0 ) {
mgaUploadSubImage( mmesa, t, i );
}
}
t->base.dirty_images[0] = 0;
}
UNLOCK_HARDWARE( mmesa );
return 0;
}

914
src/mesa/drivers/dri/mga/mgatris.c
View File

@ -1,914 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#include "main/mtypes.h"
#include "main/macros.h"
#include "main/colormac.h"
#include "main/mm.h"
#include "swrast/swrast.h"
#include "swrast_setup/swrast_setup.h"
#include "tnl/t_context.h"
#include "tnl/t_pipeline.h"
#include "mgacontext.h"
#include "mgaioctl.h"
#include "mgatris.h"
#include "mgavb.h"
static void mgaRenderPrimitive( struct gl_context *ctx, GLenum prim );
/***********************************************************************
* Functions to draw basic primitives *
***********************************************************************/
#if defined (USE_X86_ASM)
#define EMIT_VERT( j, vb, vertex_size, v ) \
do { int __tmp; \
__asm__ __volatile__( "rep ; movsl" \
: "=%c" (j), "=D" (vb), "=S" (__tmp) \
: "0" (vertex_size), \
"D" ((long)vb), \
"S" ((long)v)); \
} while (0)
#else
#define EMIT_VERT( j, vb, vertex_size, v ) \
do { \
for ( j = 0 ; j < vertex_size ; j++ ) \
vb[j] = (v)->ui[j]; \
vb += vertex_size; \
} while (0)
#endif
static void INLINE mga_draw_triangle( mgaContextPtr mmesa,
mgaVertexPtr v0,
mgaVertexPtr v1,
mgaVertexPtr v2 )
{
GLuint vertex_size = mmesa->vertex_size;
GLuint *vb = mgaAllocDmaLow( mmesa, 3 * 4 * vertex_size );
int j;
EMIT_VERT( j, vb, vertex_size, v0 );
EMIT_VERT( j, vb, vertex_size, v1 );
EMIT_VERT( j, vb, vertex_size, v2 );
}
static void INLINE mga_draw_quad( mgaContextPtr mmesa,
mgaVertexPtr v0,
mgaVertexPtr v1,
mgaVertexPtr v2,
mgaVertexPtr v3 )
{
GLuint vertex_size = mmesa->vertex_size;
GLuint *vb = mgaAllocDmaLow( mmesa, 6 * 4 * vertex_size );
int j;
EMIT_VERT( j, vb, vertex_size, v0 );
EMIT_VERT( j, vb, vertex_size, v1 );
EMIT_VERT( j, vb, vertex_size, v3 );
EMIT_VERT( j, vb, vertex_size, v1 );
EMIT_VERT( j, vb, vertex_size, v2 );
EMIT_VERT( j, vb, vertex_size, v3 );
}
static INLINE void mga_draw_point( mgaContextPtr mmesa,
mgaVertexPtr tmp )
{
const GLfloat sz = 0.5 * CLAMP(mmesa->glCtx->Point.Size,
mmesa->glCtx->Const.MinPointSize,
mmesa->glCtx->Const.MaxPointSize);
const int vertex_size = mmesa->vertex_size;
GLuint *vb = mgaAllocDmaLow( mmesa, 6 * 4 * vertex_size );
int j;
#if 0
v0->v.x += PNT_X_OFFSET - TRI_X_OFFSET;
v0->v.y += PNT_Y_OFFSET - TRI_Y_OFFSET;
#endif
/* Draw a point as two triangles.
*/
*(float *)&vb[0] = tmp->v.x - sz;
*(float *)&vb[1] = tmp->v.y - sz;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = tmp->ui[j];
vb += vertex_size;
*(float *)&vb[0] = tmp->v.x + sz;
*(float *)&vb[1] = tmp->v.y - sz;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = tmp->ui[j];
vb += vertex_size;
*(float *)&vb[0] = tmp->v.x + sz;
*(float *)&vb[1] = tmp->v.y + sz;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = tmp->ui[j];
vb += vertex_size;
*(float *)&vb[0] = tmp->v.x + sz;
*(float *)&vb[1] = tmp->v.y + sz;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = tmp->ui[j];
vb += vertex_size;
*(float *)&vb[0] = tmp->v.x - sz;
*(float *)&vb[1] = tmp->v.y + sz;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = tmp->ui[j];
vb += vertex_size;
*(float *)&vb[0] = tmp->v.x - sz;
*(float *)&vb[1] = tmp->v.y - sz;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = tmp->ui[j];
#if 0
v0->v.x -= PNT_X_OFFSET - TRI_X_OFFSET;
v0->v.y -= PNT_Y_OFFSET - TRI_Y_OFFSET;
#endif
}
static INLINE void mga_draw_line( mgaContextPtr mmesa,
mgaVertexPtr v0,
mgaVertexPtr v1 )
{
GLuint vertex_size = mmesa->vertex_size;
GLuint *vb = mgaAllocDmaLow( mmesa, 6 * 4 * vertex_size );
GLfloat dx, dy, ix, iy;
const GLfloat width = CLAMP(mmesa->glCtx->Line.Width,
mmesa->glCtx->Const.MinLineWidth,
mmesa->glCtx->Const.MaxLineWidth);
GLint j;
#if 0
v0->v.x += LINE_X_OFFSET - TRI_X_OFFSET;
v0->v.y += LINE_Y_OFFSET - TRI_Y_OFFSET;
v1->v.x += LINE_X_OFFSET - TRI_X_OFFSET;
v1->v.y += LINE_Y_OFFSET - TRI_Y_OFFSET;
#endif
dx = v0->v.x - v1->v.x;
dy = v0->v.y - v1->v.y;
ix = width * .5; iy = 0;
if (dx * dx > dy * dy) {
iy = ix; ix = 0;
}
*(float *)&vb[0] = v0->v.x - ix;
*(float *)&vb[1] = v0->v.y - iy;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = v0->ui[j];
vb += vertex_size;
*(float *)&vb[0] = v1->v.x + ix;
*(float *)&vb[1] = v1->v.y + iy;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = v1->ui[j];
vb += vertex_size;
*(float *)&vb[0] = v0->v.x + ix;
*(float *)&vb[1] = v0->v.y + iy;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = v0->ui[j];
vb += vertex_size;
*(float *)&vb[0] = v0->v.x - ix;
*(float *)&vb[1] = v0->v.y - iy;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = v0->ui[j];
vb += vertex_size;
*(float *)&vb[0] = v1->v.x - ix;
*(float *)&vb[1] = v1->v.y - iy;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = v1->ui[j];
vb += vertex_size;
*(float *)&vb[0] = v1->v.x + ix;
*(float *)&vb[1] = v1->v.y + iy;
for (j = 2 ; j < vertex_size ; j++)
vb[j] = v1->ui[j];
vb += vertex_size;
#if 0
v0->v.x -= LINE_X_OFFSET - TRI_X_OFFSET;
v0->v.y -= LINE_Y_OFFSET - TRI_Y_OFFSET;
v1->v.x -= LINE_X_OFFSET - TRI_X_OFFSET;
v1->v.y -= LINE_Y_OFFSET - TRI_Y_OFFSET;
#endif
}
/***********************************************************************
* Macros for t_dd_tritmp.h to draw basic primitives *
***********************************************************************/
#define TRI( a, b, c ) \
do { \
if (DO_FALLBACK) \
mmesa->draw_tri( mmesa, a, b, c ); \
else \
mga_draw_triangle( mmesa, a, b, c ); \
} while (0)
#define QUAD( a, b, c, d ) \
do { \
if (DO_FALLBACK) { \
mmesa->draw_tri( mmesa, a, b, d ); \
mmesa->draw_tri( mmesa, b, c, d ); \
} else { \
mga_draw_quad( mmesa, a, b, c, d ); \
} \
} while (0)
#define LINE( v0, v1 ) \
do { \
if (DO_FALLBACK) \
mmesa->draw_line( mmesa, v0, v1 ); \
else { \
mga_draw_line( mmesa, v0, v1 ); \
} \
} while (0)
#define POINT( v0 ) \
do { \
if (DO_FALLBACK) \
mmesa->draw_point( mmesa, v0 ); \
else { \
mga_draw_point( mmesa, v0 ); \
} \
} while (0)
/***********************************************************************
* Fallback to swrast for basic primitives *
***********************************************************************/
/* This code is hit only when a mix of accelerated and unaccelerated
* primitives are being drawn, and only for the unaccelerated
* primitives.
*/
static void
mga_fallback_tri( mgaContextPtr mmesa,
mgaVertex *v0,
mgaVertex *v1,
mgaVertex *v2 )
{
struct gl_context *ctx = mmesa->glCtx;
SWvertex v[3];
mga_translate_vertex( ctx, v0, &v[0] );
mga_translate_vertex( ctx, v1, &v[1] );
mga_translate_vertex( ctx, v2, &v[2] );
_swrast_Triangle( ctx, &v[0], &v[1], &v[2] );
}
static void
mga_fallback_line( mgaContextPtr mmesa,
mgaVertex *v0,
mgaVertex *v1 )
{
struct gl_context *ctx = mmesa->glCtx;
SWvertex v[2];
mga_translate_vertex( ctx, v0, &v[0] );
mga_translate_vertex( ctx, v1, &v[1] );
_swrast_Line( ctx, &v[0], &v[1] );
}
static void
mga_fallback_point( mgaContextPtr mmesa,
mgaVertex *v0 )
{
struct gl_context *ctx = mmesa->glCtx;
SWvertex v[1];
mga_translate_vertex( ctx, v0, &v[0] );
_swrast_Point( ctx, &v[0] );
}
/***********************************************************************
* Build render functions from dd templates *
***********************************************************************/
#define MGA_UNFILLED_BIT 0x1
#define MGA_OFFSET_BIT 0x2
#define MGA_TWOSIDE_BIT 0x4
#define MGA_FLAT_BIT 0x8 /* mga can't flatshade? */
#define MGA_FALLBACK_BIT 0x10
#define MGA_MAX_TRIFUNC 0x20
static struct {
tnl_points_func points;
tnl_line_func line;
tnl_triangle_func triangle;
tnl_quad_func quad;
} rast_tab[MGA_MAX_TRIFUNC];
#define DO_FALLBACK (IND & MGA_FALLBACK_BIT)
#define DO_OFFSET (IND & MGA_OFFSET_BIT)
#define DO_UNFILLED (IND & MGA_UNFILLED_BIT)
#define DO_TWOSIDE (IND & MGA_TWOSIDE_BIT)
#define DO_FLAT (IND & MGA_FLAT_BIT)
#define DO_TRI 1
#define DO_QUAD 1
#define DO_LINE 1
#define DO_POINTS 1
#define DO_FULL_QUAD 1
#define HAVE_BACK_COLORS 0
#define HAVE_SPEC 1
#define HAVE_HW_FLATSHADE 0
#define VERTEX mgaVertex
#define TAB rast_tab
#define DEPTH_SCALE mmesa->depth_scale
#define UNFILLED_TRI unfilled_tri
#define UNFILLED_QUAD unfilled_quad
#define VERT_X(_v) _v->v.x
#define VERT_Y(_v) _v->v.y
#define VERT_Z(_v) _v->v.z
#define AREA_IS_CCW( a ) (a > 0)
#define GET_VERTEX(e) (mmesa->verts + (e * mmesa->vertex_size * sizeof(int)))
#define VERT_SET_RGBA( v, c ) \
do { \
mga_color_t *color = (mga_color_t *)&((v)->ui[4]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->red, (c)[0]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->green, (c)[1]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->blue, (c)[2]); \
UNCLAMPED_FLOAT_TO_UBYTE(color->alpha, (c)[3]); \
} while (0)
#define VERT_COPY_RGBA( v0, v1 ) v0->ui[4] = v1->ui[4]
#define VERT_SET_SPEC( v0, c ) \
do { \
UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.red, (c)[0]); \
UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.green, (c)[1]); \
UNCLAMPED_FLOAT_TO_UBYTE(v0->v.specular.blue, (c)[2]); \
} while (0)
#define VERT_COPY_SPEC( v0, v1 ) \
do { \
v0->v.specular.red = v1->v.specular.red; \
v0->v.specular.green = v1->v.specular.green; \
v0->v.specular.blue = v1->v.specular.blue; \
} while (0)
#define VERT_SAVE_RGBA( idx ) color[idx] = v[idx]->ui[4]
#define VERT_RESTORE_RGBA( idx ) v[idx]->ui[4] = color[idx]
#define VERT_SAVE_SPEC( idx ) spec[idx] = v[idx]->ui[5]
#define VERT_RESTORE_SPEC( idx ) v[idx]->ui[5] = spec[idx]
#define LOCAL_VARS(n) \
mgaContextPtr mmesa = MGA_CONTEXT(ctx); \
GLuint color[n] = { 0 }; \
GLuint spec[n] = { 0 }; \
(void) color; (void) spec;
/***********************************************************************
* Functions to draw basic unfilled primitives *
***********************************************************************/
#define RASTERIZE(x) if (mmesa->raster_primitive != x) \
mgaRasterPrimitive( ctx, x, MGA_WA_TRIANGLES )
#define RENDER_PRIMITIVE mmesa->render_primitive
#define IND MGA_FALLBACK_BIT
#define TAG(x) x
#include "tnl_dd/t_dd_unfilled.h"
#undef IND
/***********************************************************************
* Functions to draw GL primitives *
***********************************************************************/
#define IND (0)
#define TAG(x) x
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT)
#define TAG(x) x##_offset
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT)
#define TAG(x) x##_twoside
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT)
#define TAG(x) x##_twoside_offset
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_UNFILLED_BIT)
#define TAG(x) x##_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT|MGA_UNFILLED_BIT)
#define TAG(x) x##_offset_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_UNFILLED_BIT)
#define TAG(x) x##_twoside_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT|MGA_UNFILLED_BIT)
#define TAG(x) x##_twoside_offset_unfilled
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_FALLBACK_BIT)
#define TAG(x) x##_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT|MGA_FALLBACK_BIT)
#define TAG(x) x##_offset_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_FALLBACK_BIT)
#define TAG(x) x##_twoside_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT|MGA_FALLBACK_BIT)
#define TAG(x) x##_twoside_offset_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_UNFILLED_BIT|MGA_FALLBACK_BIT)
#define TAG(x) x##_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT|MGA_UNFILLED_BIT|MGA_FALLBACK_BIT)
#define TAG(x) x##_offset_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_UNFILLED_BIT|MGA_FALLBACK_BIT)
#define TAG(x) x##_twoside_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT|MGA_UNFILLED_BIT| \
MGA_FALLBACK_BIT)
#define TAG(x) x##_twoside_offset_unfilled_fallback
#include "tnl_dd/t_dd_tritmp.h"
/* Mga doesn't support provoking-vertex flat-shading?
*/
#define IND (MGA_FLAT_BIT)
#define TAG(x) x##_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_offset_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_offset_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_UNFILLED_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_unfilled_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT|MGA_UNFILLED_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_offset_unfilled_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_UNFILLED_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_unfilled_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT|MGA_UNFILLED_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_offset_unfilled_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT|MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_offset_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT|MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_offset_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_UNFILLED_BIT|MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_unfilled_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_OFFSET_BIT|MGA_UNFILLED_BIT|MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_offset_unfilled_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_UNFILLED_BIT|MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_unfilled_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
#define IND (MGA_TWOSIDE_BIT|MGA_OFFSET_BIT|MGA_UNFILLED_BIT| \
MGA_FALLBACK_BIT|MGA_FLAT_BIT)
#define TAG(x) x##_twoside_offset_unfilled_fallback_flat
#include "tnl_dd/t_dd_tritmp.h"
static void init_rast_tab( void )
{
init();
init_offset();
init_twoside();
init_twoside_offset();
init_unfilled();
init_offset_unfilled();
init_twoside_unfilled();
init_twoside_offset_unfilled();
init_fallback();
init_offset_fallback();
init_twoside_fallback();
init_twoside_offset_fallback();
init_unfilled_fallback();
init_offset_unfilled_fallback();
init_twoside_unfilled_fallback();
init_twoside_offset_unfilled_fallback();
init_flat();
init_offset_flat();
init_twoside_flat();
init_twoside_offset_flat();
init_unfilled_flat();
init_offset_unfilled_flat();
init_twoside_unfilled_flat();
init_twoside_offset_unfilled_flat();
init_fallback_flat();
init_offset_fallback_flat();
init_twoside_fallback_flat();
init_twoside_offset_fallback_flat();
init_unfilled_fallback_flat();
init_offset_unfilled_fallback_flat();
init_twoside_unfilled_fallback_flat();
init_twoside_offset_unfilled_fallback_flat();
}
/**********************************************************************/
/* Render whole begin/end objects */
/**********************************************************************/
#define VERT(x) (mgaVertex *)(vertptr + ((x)*vertex_size*sizeof(int)))
#define RENDER_POINTS( start, count ) \
for ( ; start < count ; start++) \
mga_draw_point( mmesa, VERT(ELT(start)) );
#define RENDER_LINE( v0, v1 ) \
mga_draw_line( mmesa, VERT(v0), VERT(v1) )
#define RENDER_TRI( v0, v1, v2 ) \
mga_draw_triangle( mmesa, VERT(v0), VERT(v1), VERT(v2) )
#define RENDER_QUAD( v0, v1, v2, v3 ) \
mga_draw_quad( mmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) )
#define INIT(x) mgaRenderPrimitive( ctx, x )
#undef LOCAL_VARS
#define LOCAL_VARS \
mgaContextPtr mmesa = MGA_CONTEXT(ctx); \
GLubyte *vertptr = (GLubyte *)mmesa->verts; \
const GLuint vertex_size = mmesa->vertex_size; \
const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts; \
(void) elt;
#define RESET_STIPPLE
#define RESET_OCCLUSION
#define PRESERVE_VB_DEFS
#define ELT(x) x
#define TAG(x) mga_##x##_verts
#include "tnl/t_vb_rendertmp.h"
#undef ELT
#undef TAG
#define TAG(x) mga_##x##_elts
#define ELT(x) elt[x]
#include "tnl/t_vb_rendertmp.h"
/**********************************************************************/
/* Render clipped primitives */
/**********************************************************************/
static void mgaRenderClippedPoly( struct gl_context *ctx, const GLuint *elts, GLuint n )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
GLuint prim = mmesa->render_primitive;
/* Render the new vertices as an unclipped polygon.
*/
{
GLuint *tmp = VB->Elts;
VB->Elts = (GLuint *)elts;
tnl->Driver.Render.PrimTabElts[GL_POLYGON]( ctx, 0, n, PRIM_BEGIN|PRIM_END );
VB->Elts = tmp;
}
/* Restore the render primitive
*/
if (prim != GL_POLYGON)
tnl->Driver.Render.PrimitiveNotify( ctx, prim );
}
static void mgaRenderClippedLine( struct gl_context *ctx, GLuint ii, GLuint jj )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
tnl->Driver.Render.Line( ctx, ii, jj );
}
static void mgaFastRenderClippedPoly( struct gl_context *ctx, const GLuint *elts,
GLuint n )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
GLuint vertex_size = mmesa->vertex_size;
GLuint *vb = mgaAllocDmaLow( mmesa, (n-2) * 3 * 4 * vertex_size );
GLubyte *vertptr = (GLubyte *)mmesa->verts;
const GLuint *start = (const GLuint *)VERT(elts[0]);
int i,j;
for (i = 2 ; i < n ; i++) {
EMIT_VERT( j, vb, vertex_size, (mgaVertexPtr) VERT(elts[i-1]) );
EMIT_VERT( j, vb, vertex_size, (mgaVertexPtr) VERT(elts[i]) );
EMIT_VERT( j, vb, vertex_size, (mgaVertexPtr) start );
}
}
/**********************************************************************/
/* Choose render functions */
/**********************************************************************/
#define POINT_FALLBACK (DD_POINT_SMOOTH)
#define LINE_FALLBACK (DD_LINE_SMOOTH | DD_LINE_STIPPLE)
#define TRI_FALLBACK (DD_TRI_SMOOTH | DD_TRI_UNFILLED)
#define ANY_FALLBACK_FLAGS (POINT_FALLBACK|LINE_FALLBACK|TRI_FALLBACK)
#define ANY_RASTER_FLAGS (DD_FLATSHADE|DD_TRI_LIGHT_TWOSIDE|DD_TRI_OFFSET| \
DD_TRI_UNFILLED)
void mgaChooseRenderState(struct gl_context *ctx)
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLuint flags = ctx->_TriangleCaps;
GLuint index = 0;
if (flags & (ANY_FALLBACK_FLAGS|ANY_RASTER_FLAGS|DD_TRI_STIPPLE)) {
if (flags & ANY_RASTER_FLAGS) {
if (flags & DD_TRI_LIGHT_TWOSIDE) index |= MGA_TWOSIDE_BIT;
if (flags & DD_TRI_OFFSET) index |= MGA_OFFSET_BIT;
if (flags & DD_TRI_UNFILLED) index |= MGA_UNFILLED_BIT;
if (flags & DD_FLATSHADE) index |= MGA_FLAT_BIT;
}
mmesa->draw_point = mga_draw_point;
mmesa->draw_line = mga_draw_line;
mmesa->draw_tri = mga_draw_triangle;
/* Hook in fallbacks for specific primitives.
*/
if (flags & ANY_FALLBACK_FLAGS)
{
if (flags & POINT_FALLBACK)
mmesa->draw_point = mga_fallback_point;
if (flags & LINE_FALLBACK)
mmesa->draw_line = mga_fallback_line;
if (flags & TRI_FALLBACK)
mmesa->draw_tri = mga_fallback_tri;
index |= MGA_FALLBACK_BIT;
}
if ((flags & DD_TRI_STIPPLE) && !mmesa->haveHwStipple) {
mmesa->draw_tri = mga_fallback_tri;
index |= MGA_FALLBACK_BIT;
}
}
if (mmesa->RenderIndex != index) {
mmesa->RenderIndex = index;
tnl->Driver.Render.Points = rast_tab[index].points;
tnl->Driver.Render.Line = rast_tab[index].line;
tnl->Driver.Render.Triangle = rast_tab[index].triangle;
tnl->Driver.Render.Quad = rast_tab[index].quad;
if (index == 0) {
tnl->Driver.Render.PrimTabVerts = mga_render_tab_verts;
tnl->Driver.Render.PrimTabElts = mga_render_tab_elts;
tnl->Driver.Render.ClippedLine = line; /* from tritmp.h */
tnl->Driver.Render.ClippedPolygon = mgaFastRenderClippedPoly;
} else {
tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts;
tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts;
tnl->Driver.Render.ClippedLine = mgaRenderClippedLine;
tnl->Driver.Render.ClippedPolygon = mgaRenderClippedPoly;
}
}
}
/**********************************************************************/
/* Runtime render state and callbacks */
/**********************************************************************/
static GLenum reduced_prim[GL_POLYGON+1] = {
GL_POINTS,
GL_LINES,
GL_LINES,
GL_LINES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES,
GL_TRIANGLES
};
/* Always called between RenderStart and RenderFinish --> We already
* hold the lock.
*/
void mgaRasterPrimitive( struct gl_context *ctx, GLenum prim, GLuint hwprim )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
FLUSH_BATCH( mmesa );
/* Update culling */
if (mmesa->raster_primitive != prim)
mmesa->dirty |= MGA_UPLOAD_CONTEXT;
mmesa->raster_primitive = prim;
/* mmesa->hw_primitive = hwprim; */
mmesa->hw_primitive = MGA_WA_TRIANGLES; /* disable mgarender.c for now */
if (ctx->Polygon.StippleFlag && mmesa->haveHwStipple)
{
mmesa->dirty |= MGA_UPLOAD_CONTEXT;
mmesa->setup.dwgctl &= ~(0xf<<20);
if (mmesa->raster_primitive == GL_TRIANGLES)
mmesa->setup.dwgctl |= mmesa->poly_stipple;
}
}
/* Determine the rasterized primitive when not drawing unfilled
* polygons.
*
* Used only for the default render stage which always decomposes
* primitives to trianges/lines/points. For the accelerated stage,
* which renders strips as strips, the equivalent calculations are
* performed in mgarender.c.
*/
static void mgaRenderPrimitive( struct gl_context *ctx, GLenum prim )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLuint rprim = reduced_prim[prim];
mmesa->render_primitive = prim;
if (rprim == GL_TRIANGLES && (ctx->_TriangleCaps & DD_TRI_UNFILLED))
return;
if (mmesa->raster_primitive != rprim) {
mgaRasterPrimitive( ctx, rprim, MGA_WA_TRIANGLES );
}
}
static void mgaRenderFinish( struct gl_context *ctx )
{
if (MGA_CONTEXT(ctx)->RenderIndex & MGA_FALLBACK_BIT)
_swrast_flush( ctx );
}
/**********************************************************************/
/* Manage total rasterization fallbacks */
/**********************************************************************/
static const char * const fallbackStrings[] = {
"Texture mode",
"glDrawBuffer(GL_FRONT_AND_BACK)",
"read buffer",
"glBlendFunc(GL_SRC_ALPHA_SATURATE, GL_ZERO)",
"glRenderMode(selection or feedback)",
"No hardware stencil",
"glDepthFunc( GL_NEVER )",
"Mixing GL_CLAMP_TO_EDGE and GL_CLAMP",
"rasterization fallback option"
};
static const char *getFallbackString(GLuint bit)
{
int i = 0;
while (bit > 1) {
i++;
bit >>= 1;
}
return fallbackStrings[i];
}
void mgaFallback( struct gl_context *ctx, GLuint bit, GLboolean mode )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLuint oldfallback = mmesa->Fallback;
if (mode) {
mmesa->Fallback |= bit;
if (oldfallback == 0) {
FLUSH_BATCH(mmesa);
_swsetup_Wakeup( ctx );
mmesa->RenderIndex = ~0;
if (MGA_DEBUG & DEBUG_VERBOSE_FALLBACK) {
fprintf(stderr, "MGA begin rasterization fallback: 0x%x %s\n",
bit, getFallbackString(bit));
}
}
}
else {
mmesa->Fallback &= ~bit;
if (oldfallback == bit) {
_swrast_flush( ctx );
tnl->Driver.Render.Start = mgaCheckTexSizes;
tnl->Driver.Render.PrimitiveNotify = mgaRenderPrimitive;
tnl->Driver.Render.Finish = mgaRenderFinish;
tnl->Driver.Render.BuildVertices = mgaBuildVertices;
mmesa->NewGLState |= (_MGA_NEW_RENDERSTATE |
_MGA_NEW_RASTERSETUP);
if (MGA_DEBUG & DEBUG_VERBOSE_FALLBACK) {
fprintf(stderr, "MGA end rasterization fallback: 0x%x %s\n",
bit, getFallbackString(bit));
}
}
}
}
void mgaDDInitTriFuncs( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
static int firsttime = 1;
if (firsttime) {
init_rast_tab();
firsttime = 0;
}
mmesa->RenderIndex = ~0;
tnl->Driver.Render.Start = mgaCheckTexSizes;
tnl->Driver.Render.Finish = mgaRenderFinish;
tnl->Driver.Render.PrimitiveNotify = mgaRenderPrimitive;
tnl->Driver.Render.ResetLineStipple = _swrast_ResetLineStipple;
tnl->Driver.Render.BuildVertices = mgaBuildVertices;
tnl->Driver.Render.Multipass = NULL;
}

51
src/mesa/drivers/dri/mga/mgatris.h
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@ -1,51 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef MGATRIS_INC
#define MGATRIS_INC
#include "main/mtypes.h"
extern void mgaDDInitTriFuncs( struct gl_context *ctx );
extern void mgaChooseRenderState( struct gl_context *ctx );
extern void mgaRasterPrimitive( struct gl_context *ctx, GLenum prim, GLuint hwprim );
extern void mgaFallback( struct gl_context *ctx, GLuint bit, GLboolean mode );
#define FALLBACK( ctx, bit, mode ) mgaFallback( ctx, bit, mode )
#define _MGA_NEW_RENDERSTATE (_DD_NEW_POINT_SMOOTH | \
_DD_NEW_LINE_SMOOTH | \
_DD_NEW_LINE_STIPPLE | \
_DD_NEW_TRI_SMOOTH | \
_DD_NEW_FLATSHADE | \
_DD_NEW_TRI_LIGHT_TWOSIDE | \
_DD_NEW_TRI_OFFSET | \
_DD_NEW_TRI_UNFILLED | \
_DD_NEW_TRI_STIPPLE | \
_NEW_POLYGONSTIPPLE)
#endif

478
src/mesa/drivers/dri/mga/mgavb.c
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@ -1,478 +0,0 @@
/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#include <stdlib.h>
#include "mgacontext.h"
#include "mgavb.h"
#include "mgatris.h"
#include "mgaioctl.h"
#include "mga_xmesa.h"
#include "main/glheader.h"
#include "main/mtypes.h"
#include "main/imports.h"
#include "main/macros.h"
#include "main/colormac.h"
#include "tnl/t_context.h"
#include "swrast/swrast.h"
#define MGA_TEX1_BIT 0x1
#define MGA_TEX0_BIT 0x2
#define MGA_RGBA_BIT 0x4
#define MGA_SPEC_BIT 0x8
#define MGA_FOG_BIT 0x10
#define MGA_XYZW_BIT 0x20
#define MGA_PTEX_BIT 0x40
#define MGA_MAX_SETUP 0x80
static struct {
void (*emit)( struct gl_context *, GLuint, GLuint, void *, GLuint );
tnl_interp_func interp;
tnl_copy_pv_func copy_pv;
GLboolean (*check_tex_sizes)( struct gl_context *ctx );
GLuint vertex_size;
GLuint vertex_format;
} setup_tab[MGA_MAX_SETUP];
#define TINY_VERTEX_FORMAT 0
#define NOTEX_VERTEX_FORMAT 0
#define TEX0_VERTEX_FORMAT (MGA_A|MGA_S|MGA_F)
#define TEX1_VERTEX_FORMAT (MGA_A|MGA_S|MGA_F|MGA_T2)
#define PROJ_TEX1_VERTEX_FORMAT 0
#define TEX2_VERTEX_FORMAT 0
#define TEX3_VERTEX_FORMAT 0
#define PROJ_TEX3_VERTEX_FORMAT 0
#define DO_XYZW (IND & MGA_XYZW_BIT)
#define DO_RGBA (IND & MGA_RGBA_BIT)
#define DO_SPEC (IND & MGA_SPEC_BIT)
#define DO_FOG (IND & MGA_FOG_BIT)
#define DO_TEX0 (IND & MGA_TEX0_BIT)
#define DO_TEX1 (IND & MGA_TEX1_BIT)
#define DO_TEX2 0
#define DO_TEX3 0
#define DO_PTEX (IND & MGA_PTEX_BIT)
#define VERTEX mgaVertex
#define VERTEX_COLOR mga_color_t
#define LOCALVARS mgaContextPtr mmesa = MGA_CONTEXT(ctx);
#define GET_VIEWPORT_MAT() mmesa->hw_viewport
#define GET_TEXSOURCE(n) mmesa->tmu_source[n]
#define GET_VERTEX_FORMAT() mmesa->vertex_format
#define GET_VERTEX_STORE() mmesa->verts
#define GET_VERTEX_SIZE() mmesa->vertex_size * sizeof(GLuint)
#define HAVE_HW_VIEWPORT 0
#define HAVE_HW_DIVIDE 0
#define HAVE_RGBA_COLOR 0
#define HAVE_TINY_VERTICES 0
#define HAVE_NOTEX_VERTICES 0
#define HAVE_TEX0_VERTICES 1
#define HAVE_TEX1_VERTICES 1
#define HAVE_TEX2_VERTICES 0
#define HAVE_TEX3_VERTICES 0
#define HAVE_PTEX_VERTICES 0
#define UNVIEWPORT_VARS \
const GLfloat dx = - mmesa->drawX - SUBPIXEL_X; \
const GLfloat dy = (mmesa->driDrawable->h + \
mmesa->drawY + SUBPIXEL_Y); \
const GLfloat sz = 1.0 / mmesa->depth_scale
#define UNVIEWPORT_X(x) x + dx;
#define UNVIEWPORT_Y(y) - y + dy;
#define UNVIEWPORT_Z(z) z * sz;
#define PTEX_FALLBACK() FALLBACK(ctx, MGA_FALLBACK_TEXTURE, 1)
#define INTERP_VERTEX setup_tab[mmesa->SetupIndex].interp
#define COPY_PV_VERTEX setup_tab[mmesa->SetupIndex].copy_pv
/***********************************************************************
* Generate pv-copying and translation functions *
***********************************************************************/
#define TAG(x) mga_##x
#include "tnl_dd/t_dd_vb.c"
/***********************************************************************
* Generate vertex emit and interp functions *
***********************************************************************/
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT)
#define TAG(x) x##_wg
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_SPEC_BIT)
#define TAG(x) x##_wgs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_wgt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_wgt0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_TEX0_BIT|MGA_PTEX_BIT)
#define TAG(x) x##_wgpt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_wgst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_wgst0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT|MGA_PTEX_BIT)
#define TAG(x) x##_wgspt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT)
#define TAG(x) x##_wgf
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT|MGA_SPEC_BIT)
#define TAG(x) x##_wgfs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_wgft0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_wgft0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT|MGA_TEX0_BIT|MGA_PTEX_BIT)
#define TAG(x) x##_wgfpt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_wgfst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_wgfst0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_XYZW_BIT|MGA_RGBA_BIT|MGA_FOG_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT|MGA_PTEX_BIT)
#define TAG(x) x##_wgfspt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_TEX0_BIT)
#define TAG(x) x##_t0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_t0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_FOG_BIT)
#define TAG(x) x##_f
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_FOG_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_ft0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_FOG_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_ft0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT)
#define TAG(x) x##_g
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_SPEC_BIT)
#define TAG(x) x##_gs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_gt0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_gt0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_gst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_gst0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_FOG_BIT)
#define TAG(x) x##_gf
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_FOG_BIT|MGA_SPEC_BIT)
#define TAG(x) x##_gfs
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_FOG_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_gft0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_FOG_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_gft0t1
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_FOG_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT)
#define TAG(x) x##_gfst0
#include "tnl_dd/t_dd_vbtmp.h"
#define IND (MGA_RGBA_BIT|MGA_FOG_BIT|MGA_SPEC_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT)
#define TAG(x) x##_gfst0t1
#include "tnl_dd/t_dd_vbtmp.h"
static void init_setup_tab( void )
{
init_wg();
init_wgs();
init_wgt0();
init_wgt0t1();
init_wgpt0();
init_wgst0();
init_wgst0t1();
init_wgspt0();
init_wgf();
init_wgfs();
init_wgft0();
init_wgft0t1();
init_wgfpt0();
init_wgfst0();
init_wgfst0t1();
init_wgfspt0();
init_t0();
init_t0t1();
init_f();
init_ft0();
init_ft0t1();
init_g();
init_gs();
init_gt0();
init_gt0t1();
init_gst0();
init_gst0t1();
init_gf();
init_gfs();
init_gft0();
init_gft0t1();
init_gfst0();
init_gfst0t1();
}
void mgaPrintSetupFlags(char *msg, GLuint flags )
{
fprintf(stderr, "%s: %d %s%s%s%s%s%s\n",
msg,
(int)flags,
(flags & MGA_XYZW_BIT) ? " xyzw," : "",
(flags & MGA_RGBA_BIT) ? " rgba," : "",
(flags & MGA_SPEC_BIT) ? " spec," : "",
(flags & MGA_FOG_BIT) ? " fog," : "",
(flags & MGA_TEX0_BIT) ? " tex-0," : "",
(flags & MGA_TEX1_BIT) ? " tex-1," : "");
}
void mgaCheckTexSizes( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
TNLcontext *tnl = TNL_CONTEXT(ctx);
/*fprintf(stderr, "%s\n", __FUNCTION__);*/
if (!setup_tab[mmesa->SetupIndex].check_tex_sizes(ctx)) {
mmesa->SetupIndex |= MGA_PTEX_BIT;
mmesa->SetupNewInputs = ~0;
if (!mmesa->Fallback &&
!(ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) {
tnl->Driver.Render.Interp = setup_tab[mmesa->SetupIndex].interp;
tnl->Driver.Render.CopyPV = setup_tab[mmesa->SetupIndex].copy_pv;
}
if (mmesa->Fallback) {
tnl->Driver.Render.Start(ctx);
}
}
}
void mgaBuildVertices( struct gl_context *ctx,
GLuint start,
GLuint count,
GLuint newinputs )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
GLuint stride = mmesa->vertex_size * sizeof(int);
GLubyte *v = ((GLubyte *)mmesa->verts + (start * stride));
newinputs |= mmesa->SetupNewInputs;
mmesa->SetupNewInputs = 0;
if (!newinputs)
return;
if (newinputs & VERT_BIT_POS) {
setup_tab[mmesa->SetupIndex].emit( ctx, start, count, v, stride );
} else {
GLuint ind = 0;
if (newinputs & VERT_BIT_COLOR0)
ind |= MGA_RGBA_BIT;
if (newinputs & VERT_BIT_COLOR1)
ind |= MGA_SPEC_BIT;
if (newinputs & VERT_BIT_TEX0)
ind |= MGA_TEX0_BIT;
if (newinputs & VERT_BIT_TEX1)
ind |= MGA_TEX0_BIT|MGA_TEX1_BIT;
if (newinputs & VERT_BIT_FOG)
ind |= MGA_FOG_BIT;
if (mmesa->SetupIndex & MGA_PTEX_BIT)
ind = ~0;
ind &= mmesa->SetupIndex;
if (ind) {
setup_tab[ind].emit( ctx, start, count, v, stride );
}
}
}
void mgaChooseVertexState( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
TNLcontext *tnl = TNL_CONTEXT(ctx);
GLuint ind = MGA_XYZW_BIT|MGA_RGBA_BIT;
if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
ind |= MGA_SPEC_BIT;
if (ctx->Fog.Enabled)
ind |= MGA_FOG_BIT;
if (ctx->Texture._EnabledUnits & 0x2) {
/* unit 1 enabled */
if (ctx->Texture._EnabledUnits & 0x1) {
/* unit 0 enabled */
ind |= MGA_TEX1_BIT|MGA_TEX0_BIT;
}
else {
ind |= MGA_TEX0_BIT;
}
}
else if (ctx->Texture._EnabledUnits & 0x1) {
/* unit 0 enabled */
ind |= MGA_TEX0_BIT;
}
mmesa->SetupIndex = ind;
if (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED)) {
tnl->Driver.Render.Interp = mga_interp_extras;
tnl->Driver.Render.CopyPV = mga_copy_pv_extras;
} else {
tnl->Driver.Render.Interp = setup_tab[ind].interp;
tnl->Driver.Render.CopyPV = setup_tab[ind].copy_pv;
}
if (setup_tab[ind].vertex_format != mmesa->vertex_format) {
FLUSH_BATCH(mmesa);
mmesa->dirty |= MGA_UPLOAD_PIPE;
mmesa->vertex_format = setup_tab[ind].vertex_format;
mmesa->vertex_size = setup_tab[ind].vertex_size;
}
}
void *mga_emit_contiguous_verts( struct gl_context *ctx,
GLuint start,
GLuint count,
void *dest)
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLuint stride = mmesa->vertex_size * 4;
setup_tab[mmesa->SetupIndex].emit( ctx, start, count, dest, stride );
return (void *)((char *)dest + stride * (count - start));
}
void mgaInitVB( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
GLuint size = TNL_CONTEXT(ctx)->vb.Size;
mmesa->verts = (GLubyte *)_mesa_align_malloc(size * sizeof(mgaVertex), 32);
{
static int firsttime = 1;
if (firsttime) {
init_setup_tab();
firsttime = 0;
}
}
mmesa->dirty |= MGA_UPLOAD_PIPE;
mmesa->vertex_format = setup_tab[0].vertex_format;
mmesa->vertex_size = setup_tab[0].vertex_size;
}
void mgaFreeVB( struct gl_context *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
if (mmesa->verts) {
_mesa_align_free(mmesa->verts);
mmesa->verts = 0;
}
}

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/*
* Copyright 2000-2001 VA Linux Systems, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
*/
#ifndef MGAVB_INC
#define MGAVB_INC
#include "main/mtypes.h"
#include "mgacontext.h"
#include "swrast/swrast.h"
#define _MGA_NEW_RASTERSETUP (_NEW_TEXTURE | \
_DD_NEW_SEPARATE_SPECULAR | \
_DD_NEW_TRI_UNFILLED | \
_DD_NEW_TRI_LIGHT_TWOSIDE | \
_NEW_FOG)
extern void mgaChooseVertexState( struct gl_context *ctx );
extern void mgaCheckTexSizes( struct gl_context *ctx );
extern void mgaBuildVertices( struct gl_context *ctx,
GLuint start,
GLuint count,
GLuint newinputs );
extern void mgaPrintSetupFlags(char *msg, GLuint flags );
extern void mgaInitVB( struct gl_context *ctx );
extern void mgaFreeVB( struct gl_context *ctx );
extern void *mga_emit_contiguous_verts( struct gl_context *ctx,
GLuint start,
GLuint count,
void *dest );
extern void mga_translate_vertex(struct gl_context *ctx,
const mgaVertex *src,
SWvertex *dst);
extern void mga_print_vertex( struct gl_context *ctx, const mgaVertex *v );
#endif

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/*
* MGA Millennium (MGA2064W) functions
*
* Copyright 1996 The XFree86 Project, Inc.
*
* Authors
* Dirk Hohndel
* hohndel@XFree86.Org
* David Dawes
* dawes@XFree86.Org
*/
#ifndef MGA_H
#define MGA_H
#include "xf86drm.h"
#include "linux/types.h"
#define PCI_CHIP_MGA2085 0x0518
#define PCI_CHIP_MGA2064 0x0519
#define PCI_CHIP_MGA1064 0x051A
#define PCI_CHIP_MGA2164 0x051B
#define PCI_CHIP_MGA2164_AGP 0x051F
#define PCI_CHIP_MGAG200_PCI 0x0520
#define PCI_CHIP_MGAG200 0x0521
#define PCI_CHIP_MGAG400 0x0525
#define PCI_CHIP_MGAG550 0x2527
#define PCI_CHIP_MGAG100_PCI 0x1000
#define PCI_CHIP_MGAG100 0x1001
# define MMIO_IN8(base, offset) \
*(volatile unsigned char *)(((unsigned char*)(base)) + (offset))
# define MMIO_IN16(base, offset) \
*(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset))
# define MMIO_IN32(base, offset) \
*(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset))
# define MMIO_OUT8(base, offset, val) \
*(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) = (val)
# define MMIO_OUT16(base, offset, val) \
*(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset)) = (val)
# define MMIO_OUT32(base, offset, val) \
*(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) = (val)
#define INREG8(addr) MMIO_IN8(pMga->IOBase, addr)
#define INREG16(addr) MMIO_IN16(pMga->IOBase, addr)
#define INREG(addr) MMIO_IN32(pMga->IOBase, addr)
#define OUTREG8(addr, val) MMIO_OUT8(pMga->IOBase, addr, val)
#define OUTREG16(addr, val) MMIO_OUT16(pMga->IOBase, addr, val)
#define OUTREG(addr, val) MMIO_OUT32(pMga->IOBase, addr, val)
#define MGAIOMAPSIZE 0x00004000
typedef struct {
int Chipset; /**< \brief Chipset number */
int irq; /**< \brief IRQ number */
int frontOffset; /**< \brief Front color buffer offset */
int frontPitch; /**< \brief Front color buffer pitch */
int backOffset; /**< \brief Back color buffer offset */
int backPitch; /**< \brief Back color buffer pitch */
int depthOffset; /**< \brief Depth buffer offset */
int depthPitch; /**< \brief Depth buffer pitch */
int textureOffset; /**< \brief Texture area offset */
int textureSize; /**< \brief Texture area size */
int logTextureGranularity;
/**
* \name AGP
*/
/*@{*/
drmSize agpSize; /**< \brief AGP map size */
int agpMode; /**< \brief AGP mode */
/*@}*/
drmRegion agp;
/* PCI mappings */
drmRegion registers;
drmRegion status;
/* AGP mappings */
drmRegion warp;
drmRegion primary;
drmRegion buffers;
drmRegion agpTextures;
drmBufMapPtr drmBuffers;
unsigned long IOAddress;
unsigned char *IOBase;
int HasSDRAM;
__u32 reg_ien;
} MGARec, *MGAPtr;
#define MGA_FRONT 0x1
#define MGA_BACK 0x2
#define MGA_DEPTH 0x4
#define MGA_AGP_1X_MODE 0x01
#define MGA_AGP_2X_MODE 0x02
#define MGA_AGP_4X_MODE 0x04
#define MGA_AGP_MODE_MASK 0x07
#endif

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#ifndef MGA_BIOS_H
#define MGA_BIOS_H
/*
* MGABiosInfo - This struct describes the video BIOS info block.
*
* DESCRIPTION
* Do not mess with this, unless you know what you are doing.
* The data lengths and types are critical.
*
* HISTORY
* October 7, 1996 - [aem] Andrew E. Mileski
* This struct was shamelessly stolen from the MGA DDK.
* It has been reformatted, and the data types changed.
*/
typedef struct {
/* Length of this structure in bytes */
__u16 StructLen;
/*
* Unique number identifying the product type
* 0 : MGA-S1P20 (2MB base with 175MHz Ramdac)
* 1 : MGA-S1P21 (2MB base with 220MHz Ramdac)
* 2 : Reserved
* 3 : Reserved
* 4 : MGA-S1P40 (4MB base with 175MHz Ramdac)
* 5 : MGA-S1P41 (4MB base with 220MHz Ramdac)
*/
__u16 ProductID;
/* Serial number of the board */
__u8 SerNo[ 10 ];
/*
* Manufacturing date of the board (at product test)
* Format: yyyy yyym mmmd dddd
*/
__u16 ManufDate;
/* Identification of manufacturing site */
__u16 ManufId;
/*
* Number and revision level of the PCB
* Format: nnnn nnnn nnnr rrrr
* n = PCB number ex:576 (from 0->2047)
* r = PCB revision (from 0->31)
*/
__u16 PCBInfo;
/* Identification of any PMBs */
__u16 PMBInfo;
/*
* Bit 0-7 : Ramdac speed (0=175MHz, 1=220MHz)
* Bit 8-15 : Ramdac type (0=TVP3026, 1=TVP3027)
*/
__u16 RamdacType;
/* Maximum PCLK of the ramdac */
__u16 PclkMax;
/* Maximum LDCLK supported by the WRAM memory */
__u16 LclkMax;
/* Maximum MCLK of base board */
__u16 ClkBase;
/* Maximum MCLK of 4Mb board */
__u16 Clk4MB;
/* Maximum MCLK of 8Mb board */
__u16 Clk8MB;
/* Maximum MCLK of board with multimedia module */
__u16 ClkMod;
/* Diagnostic test pass frequency */
__u16 TestClk;
/* Default VGA mode1 pixel frequency */
__u16 VGAFreq1;
/* Default VGA mode2 pixel frequency */
__u16 VGAFreq2;
/* Date of last BIOS programming/update */
__u16 ProgramDate;
/* Number of times BIOS has been programmed */
__u16 ProgramCnt;
/* Support for up to 32 hardware/software options */
__u32 Options;
/* Support for up to 32 hardware/software features */
__u32 FeatFlag;
/* Definition of VGA mode MCLK */
__u16 VGAClk;
/* Indicate the revision level of this header struct */
__u16 StructRev;
__u16 Reserved[ 3 ];
} MGABiosInfo;
/* from the PINS structure, refer pins info from MGA */
typedef struct tagParamMGA {
__u16 PinID; /* 0 */
__u8 StructLen; /* 2 */
__u8 Rsvd1; /* 3 */
__u16 StructRev; /* 4 */
__u16 ProgramDate; /* 6 */
__u16 ProgramCnt; /* 8 */
__u16 ProductID; /* 10 */
__u8 SerNo[16]; /* 12 */
__u8 PLInfo[6]; /* 28 */
__u16 PCBInfo; /* 34 */
__u32 FeatFlag; /* 36 */
__u8 RamdacType; /* 40 */
__u8 RamdacSpeed; /* 41 */
__u8 PclkMax; /* 42 */
__u8 ClkGE; /* 43 */
__u8 ClkMem; /* 44 */
__u8 Clk4MB; /* 45 */
__u8 Clk8MB; /* 46 */
__u8 ClkMod; /* 47 */
__u8 TestClk; /* 48 */
__u8 VGAFreq1; /* 49 */
__u8 VGAFreq2; /* 50 */
__u8 MCTLWTST; /* 51 */
__u8 VidCtrl; /* 52 */
__u8 Clk12MB; /* 53 */
__u8 Clk16MB; /* 54 */
__u8 Reserved[8]; /* 55-62 */
__u8 PinCheck; /* 63 */
} MGABios2Info;
#endif

112
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/*
* Copyright 2000 VA Linux Systems Inc., Fremont, California.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
* Gareth Hughes <gareth@valinux.com>
*/
#ifndef __MGA_DRI_H__
#define __MGA_DRI_H__
#include "xf86drm.h"
#include "drm.h"
#include "mga_drm.h"
#define MGA_DEFAULT_AGP_SIZE 64
#define MGA_DEFAULT_AGP_MODE 4
#define MGA_MAX_AGP_MODE 4
/* Buffer are aligned on 4096 byte boundaries.
*/
#define MGA_BUFFER_ALIGN 0x00000fff
#ifdef __GNUC__
# define DEPRECATED __attribute__ ((deprecated))
#else
# define DEPRECATED
#endif
#if 1
typedef struct _mgaDrmRegion {
drm_handle_t handle;
unsigned int offset;
drmSize size;
} mgaDrmRegion, *mgaDrmRegionPtr;
#else
#define mgaDrmRegion drmRegion
#endif
typedef struct {
int chipset;
int width DEPRECATED;
int height DEPRECATED;
int mem DEPRECATED;
int cpp;
int agpMode;
unsigned int frontOffset;
unsigned int frontPitch;
unsigned int backOffset;
unsigned int backPitch;
unsigned int depthOffset;
unsigned int depthPitch;
unsigned int textureOffset;
unsigned int textureSize;
int logTextureGranularity DEPRECATED;
/* Allow calculation of setup dma addresses.
*/
unsigned int agpBufferOffset DEPRECATED;
unsigned int agpTextureOffset;
unsigned int agpTextureSize;
int logAgpTextureGranularity DEPRECATED;
unsigned int mAccess DEPRECATED;
/**
* \name DRM memory regions.
*
* \todo
* Several of these fields are no longer used (and will never be used
* again) on the client-side. None of them, except \c registers, are used
* on the server-side. At some point when it is safe to do so (probably
* for the X.org 6.9 / 7.0 release), these fields should be removed.
*/
/*@{*/
mgaDrmRegion registers; /**< MMIO registers. */
mgaDrmRegion status DEPRECATED; /**< No longer used on the client-side. */
mgaDrmRegion primary; /**< Primary DMA region. */
mgaDrmRegion buffers DEPRECATED; /**< No longer used on the client-side. */
/*@}*/
unsigned int sarea_priv_offset;
} MGADRIRec, *MGADRIPtr;
#endif

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#ifndef _MGA_MACROS_H_
#define _MGA_MACROS_H_
#ifndef PSZ
#define PSZ 8
#endif
#if PSZ == 8
#define REPLICATE(r) r &= 0xFF; r |= r << 8; r |= r << 16
#elif PSZ == 16
#define REPLICATE(r) r &= 0xFFFF; r |= r << 16
#elif PSZ == 24
#define REPLICATE(r) r &= 0xFFFFFF; r |= r << 24
#else
#define REPLICATE(r) /* */
#endif
#define RGBEQUAL(c) (!((((c) >> 8) ^ (c)) & 0xffff))
#ifdef XF86DRI
#define MGA_SYNC_XTAG 0x275f4200
#define MGABUSYWAIT() do { \
OUTREG(MGAREG_DWGSYNC, MGA_SYNC_XTAG); \
while(INREG(MGAREG_DWGSYNC) != MGA_SYNC_XTAG) ; \
}while(0);
#endif
#define MGAISBUSY() (INREG8(MGAREG_Status + 2) & 0x01)
#define WAITFIFO(cnt) \
if(!pMga->UsePCIRetry) {\
register int n = cnt; \
if(n > pMga->FifoSize) n = pMga->FifoSize; \
while(pMga->fifoCount < (n))\
pMga->fifoCount = INREG8(MGAREG_FIFOSTATUS);\
pMga->fifoCount -= n;\
}
#define XYADDRESS(x,y) \
((y) * pMga->CurrentLayout.displayWidth + (x) + pMga->YDstOrg)
#define MAKEDMAINDEX(index) ((((index) >> 2) & 0x7f) | (((index) >> 6) & 0x80))
#define DMAINDICES(one,two,three,four) \
( MAKEDMAINDEX(one) | \
(MAKEDMAINDEX(two) << 8) | \
(MAKEDMAINDEX(three) << 16) | \
(MAKEDMAINDEX(four) << 24) )
#if PSZ == 24
#define SET_PLANEMASK(p) /**/
#else
#define SET_PLANEMASK(p) \
if(!(pMga->AccelFlags & MGA_NO_PLANEMASK) && ((p) != pMga->PlaneMask)) { \
pMga->PlaneMask = (p); \
REPLICATE((p)); \
OUTREG(MGAREG_PLNWT,(p)); \
}
#endif
#define SET_FOREGROUND(c) \
if((c) != pMga->FgColor) { \
pMga->FgColor = (c); \
REPLICATE((c)); \
OUTREG(MGAREG_FCOL,(c)); \
}
#define SET_BACKGROUND(c) \
if((c) != pMga->BgColor) { \
pMga->BgColor = (c); \
REPLICATE((c)); \
OUTREG(MGAREG_BCOL,(c)); \
}
#define DISABLE_CLIP() { \
pMga->AccelFlags &= ~CLIPPER_ON; \
WAITFIFO(1); \
OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); }
#ifdef XF86DRI
#define CHECK_DMA_QUIESCENT(pMGA, pScrn) { \
if (!pMGA->haveQuiescense) { \
pMGA->GetQuiescence( pScrn ); \
} \
}
#else
#define CHECK_DMA_QUIESCENT(pMGA, pScrn)
#endif
#ifdef USEMGAHAL
#define HAL_CHIPSETS ((pMga->Chipset == PCI_CHIP_MGAG200_PCI) || \
(pMga->Chipset == PCI_CHIP_MGAG200) || \
(pMga->Chipset == PCI_CHIP_MGAG400) || \
(pMga->Chipset == PCI_CHIP_MGAG550))
#define MGA_HAL(x) { \
MGAPtr pMga = MGAPTR(pScrn); \
if (pMga->HALLoaded && HAL_CHIPSETS) { x; } \
}
#define MGA_NOT_HAL(x) { \
MGAPtr pMga = MGAPTR(pScrn); \
if (!pMga->HALLoaded || !HAL_CHIPSETS) { x; } \
}
#else
#define MGA_NOT_HAL(x) { x; }
#endif
#define MGAISGx50(x) ( (((x)->Chipset == PCI_CHIP_MGAG400) && ((x)->ChipRev >= 0x80)) || \
((x)->Chipset == PCI_CHIP_MGAG550) )
#define MGA_DH_NEEDS_HAL(x) (((x)->Chipset == PCI_CHIP_MGAG400) && \
((x)->ChipRev < 0x80))
#endif /* _MGA_MACROS_H_ */

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/*
* MGA Millennium (MGA2064W) functions
* MGA Mystique (MGA1064SG) functions
*
* Copyright 1996 The XFree86 Project, Inc.
*
* Authors
* Dirk Hohndel
* hohndel@XFree86.Org
* David Dawes
* dawes@XFree86.Org
* Contributors:
* Guy DESBIEF, Aix-en-provence, France
* g.desbief@aix.pacwan.net
* MGA1064SG Mystique register file
*/
#ifndef _MGA_REG_H_
#define _MGA_REG_H_
#define MGAREG_DWGCTL 0x1c00
#define MGAREG_MACCESS 0x1c04
#define MGA_MACCESS_PW16 0x00000001
#define MGA_MACCESS_PW32 0x00000002
/* the following is a mystique only register */
#define MGAREG_MCTLWTST 0x1c08
#define MGAREG_ZORG 0x1c0c
#define MGAREG_PAT0 0x1c10
#define MGAREG_PAT1 0x1c14
#define MGAREG_PLNWT 0x1c1c
#define MGAREG_BCOL 0x1c20
#define MGAREG_FCOL 0x1c24
#define MGAREG_SRC0 0x1c30
#define MGAREG_SRC1 0x1c34
#define MGAREG_SRC2 0x1c38
#define MGAREG_SRC3 0x1c3c
#define MGAREG_XYSTRT 0x1c40
#define MGAREG_XYEND 0x1c44
#define MGAREG_SHIFT 0x1c50
/* the following is a mystique only register */
#define MGAREG_DMAPAD 0x1c54
#define MGAREG_SGN 0x1c58
#define MGAREG_LEN 0x1c5c
#define MGAREG_AR0 0x1c60
#define MGAREG_AR1 0x1c64
#define MGAREG_AR2 0x1c68
#define MGAREG_AR3 0x1c6c
#define MGAREG_AR4 0x1c70
#define MGAREG_AR5 0x1c74
#define MGAREG_AR6 0x1c78
#define MGAREG_CXBNDRY 0x1c80
#define MGAREG_FXBNDRY 0x1c84
#define MGAREG_YDSTLEN 0x1c88
#define MGAREG_PITCH 0x1c8c
#define MGAREG_YDST 0x1c90
#define MGAREG_YDSTORG 0x1c94
#define MGAREG_YTOP 0x1c98
#define MGAREG_YBOT 0x1c9c
#define MGAREG_CXLEFT 0x1ca0
#define MGAREG_CXRIGHT 0x1ca4
#define MGAREG_FXLEFT 0x1ca8
#define MGAREG_FXRIGHT 0x1cac
#define MGAREG_XDST 0x1cb0
#define MGAREG_DR0 0x1cc0
#define MGAREG_DR1 0x1cc4
#define MGAREG_DR2 0x1cc8
#define MGAREG_DR3 0x1ccc
#define MGAREG_DR4 0x1cd0
#define MGAREG_DR5 0x1cd4
#define MGAREG_DR6 0x1cd8
#define MGAREG_DR7 0x1cdc
#define MGAREG_DR8 0x1ce0
#define MGAREG_DR9 0x1ce4
#define MGAREG_DR10 0x1ce8
#define MGAREG_DR11 0x1cec
#define MGAREG_DR12 0x1cf0
#define MGAREG_DR13 0x1cf4
#define MGAREG_DR14 0x1cf8
#define MGAREG_DR15 0x1cfc
#define MGAREG_SRCORG 0x2cb4
#define MGAREG_DSTORG 0x2cb8
/* add or or this to one of the previous "power registers" to start
the drawing engine */
#define MGAREG_EXEC 0x0100
#define MGAREG_FIFOSTATUS 0x1e10
#define MGAREG_Status 0x1e14
#define MGAREG_ICLEAR 0x1e18
#define MGAREG_IEN 0x1e1c
#define MGAREG_VCOUNT 0x1e20
#define MGAREG_Reset 0x1e40
#define MGAREG_OPMODE 0x1e54
/* Warp Registers */
#define MGAREG_WIADDR 0x1dc0
#define MGAREG_WIADDR2 0x1dd8
#define MGAREG_WGETMSB 0x1dc8
#define MGAREG_WVRTXSZ 0x1dcc
#define MGAREG_WACCEPTSEQ 0x1dd4
#define MGAREG_WMISC 0x1e70
/* OPMODE register additives */
#define MGAOPM_DMA_GENERAL (0x00 << 2)
#define MGAOPM_DMA_BLIT (0x01 << 2)
#define MGAOPM_DMA_VECTOR (0x10 << 2)
/* DWGCTL register additives */
/* Lines */
#define MGADWG_LINE_OPEN 0x00
#define MGADWG_AUTOLINE_OPEN 0x01
#define MGADWG_LINE_CLOSE 0x02
#define MGADWG_AUTOLINE_CLOSE 0x03
/* Trapezoids */
#define MGADWG_TRAP 0x04
#define MGADWG_TEXTURE_TRAP 0x05
/* BitBlts */
#define MGADWG_BITBLT 0x08
#define MGADWG_FBITBLT 0x0c
#define MGADWG_ILOAD 0x09
#define MGADWG_ILOAD_SCALE 0x0d
#define MGADWG_ILOAD_FILTER 0x0f
#define MGADWG_ILOAD_HIQH 0x07
#define MGADWG_ILOAD_HIQHV 0x0e
#define MGADWG_IDUMP 0x0a
/* atype access to WRAM */
#define MGADWG_RPL ( 0x00 << 4 )
#define MGADWG_RSTR ( 0x01 << 4 )
#define MGADWG_ZI ( 0x03 << 4 )
#define MGADWG_BLK ( 0x04 << 4 )
#define MGADWG_I ( 0x07 << 4 )
/* specifies whether bit blits are linear or xy */
#define MGADWG_LINEAR ( 0x01 << 7 )
/* z drawing mode. use MGADWG_NOZCMP for always */
#define MGADWG_NOZCMP ( 0x00 << 8 )
#define MGADWG_ZE ( 0x02 << 8 )
#define MGADWG_ZNE ( 0x03 << 8 )
#define MGADWG_ZLT ( 0x04 << 8 )
#define MGADWG_ZLTE ( 0x05 << 8 )
#define MGADWG_GT ( 0x06 << 8 )
#define MGADWG_GTE ( 0x07 << 8 )
/* use this to force colour expansion circuitry to do its stuff */
#define MGADWG_SOLID ( 0x01 << 11 )
/* ar register at zero */
#define MGADWG_ARZERO ( 0x01 << 12 )
#define MGADWG_SGNZERO ( 0x01 << 13 )
#define MGADWG_SHIFTZERO ( 0x01 << 14 )
/* See table on 4-43 for bop ALU operations */
/* See table on 4-44 for translucidity masks */
#define MGADWG_BMONOLEF ( 0x00 << 25 )
#define MGADWG_BMONOWF ( 0x04 << 25 )
#define MGADWG_BPLAN ( 0x01 << 25 )
/* note that if bfcol is specified and you're doing a bitblt, it causes
a fbitblt to be performed, so check that you obey the fbitblt rules */
#define MGADWG_BFCOL ( 0x02 << 25 )
#define MGADWG_BUYUV ( 0x0e << 25 )
#define MGADWG_BU32BGR ( 0x03 << 25 )
#define MGADWG_BU32RGB ( 0x07 << 25 )
#define MGADWG_BU24BGR ( 0x0b << 25 )
#define MGADWG_BU24RGB ( 0x0f << 25 )
#define MGADWG_PATTERN ( 0x01 << 29 )
#define MGADWG_TRANSC ( 0x01 << 30 )
#define MGAREG_MISC_WRITE 0x3c2
#define MGAREG_MISC_READ 0x3cc
#define MGAREG_MISC_IOADSEL (0x1 << 0)
#define MGAREG_MISC_RAMMAPEN (0x1 << 1)
#define MGAREG_MISC_CLK_SEL_VGA25 (0x0 << 2)
#define MGAREG_MISC_CLK_SEL_VGA28 (0x1 << 2)
#define MGAREG_MISC_CLK_SEL_MGA_PIX (0x2 << 2)
#define MGAREG_MISC_CLK_SEL_MGA_MSK (0x3 << 2)
#define MGAREG_MISC_VIDEO_DIS (0x1 << 4)
#define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5)
/* MMIO VGA registers */
#define MGAREG_SEQ_INDEX 0x1fc4
#define MGAREG_SEQ_DATA 0x1fc5
#define MGAREG_CRTC_INDEX 0x1fd4
#define MGAREG_CRTC_DATA 0x1fd5
#define MGAREG_CRTCEXT_INDEX 0x1fde
#define MGAREG_CRTCEXT_DATA 0x1fdf
/* MGA bits for registers PCI_OPTION_REG */
#define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 )
#define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 )
#define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 )
#define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 )
#define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 )
#define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 )
#define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 )
#define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 )
#define MGA1064_OPT_VGA_ION ( 0x01 << 8 )
/* MGA registers in PCI config space */
#define PCI_MGA_INDEX 0x44
#define PCI_MGA_DATA 0x48
#define PCI_MGA_OPTION2 0x50
#define PCI_MGA_OPTION3 0x54
#define RAMDAC_OFFSET 0x3c00
/* TVP3026 direct registers */
#define TVP3026_INDEX 0x00
#define TVP3026_WADR_PAL 0x00
#define TVP3026_COL_PAL 0x01
#define TVP3026_PIX_RD_MSK 0x02
#define TVP3026_RADR_PAL 0x03
#define TVP3026_CUR_COL_ADDR 0x04
#define TVP3026_CUR_COL_DATA 0x05
#define TVP3026_DATA 0x0a
#define TVP3026_CUR_RAM 0x0b
#define TVP3026_CUR_XLOW 0x0c
#define TVP3026_CUR_XHI 0x0d
#define TVP3026_CUR_YLOW 0x0e
#define TVP3026_CUR_YHI 0x0f
/* TVP3026 indirect registers */
#define TVP3026_SILICON_REV 0x01
#define TVP3026_CURSOR_CTL 0x06
#define TVP3026_LATCH_CTL 0x0f
#define TVP3026_TRUE_COLOR_CTL 0x18
#define TVP3026_MUX_CTL 0x19
#define TVP3026_CLK_SEL 0x1a
#define TVP3026_PAL_PAGE 0x1c
#define TVP3026_GEN_CTL 0x1d
#define TVP3026_MISC_CTL 0x1e
#define TVP3026_GEN_IO_CTL 0x2a
#define TVP3026_GEN_IO_DATA 0x2b
#define TVP3026_PLL_ADDR 0x2c
#define TVP3026_PIX_CLK_DATA 0x2d
#define TVP3026_MEM_CLK_DATA 0x2e
#define TVP3026_LOAD_CLK_DATA 0x2f
#define TVP3026_KEY_RED_LOW 0x32
#define TVP3026_KEY_RED_HI 0x33
#define TVP3026_KEY_GREEN_LOW 0x34
#define TVP3026_KEY_GREEN_HI 0x35
#define TVP3026_KEY_BLUE_LOW 0x36
#define TVP3026_KEY_BLUE_HI 0x37
#define TVP3026_KEY_CTL 0x38
#define TVP3026_MCLK_CTL 0x39
#define TVP3026_SENSE_TEST 0x3a
#define TVP3026_TEST_DATA 0x3b
#define TVP3026_CRC_LSB 0x3c
#define TVP3026_CRC_MSB 0x3d
#define TVP3026_CRC_CTL 0x3e
#define TVP3026_ID 0x3f
#define TVP3026_RESET 0xff
/* MGA1064 DAC Register file */
/* MGA1064 direct registers */
#define MGA1064_INDEX 0x00
#define MGA1064_WADR_PAL 0x00
#define MGA1064_COL_PAL 0x01
#define MGA1064_PIX_RD_MSK 0x02
#define MGA1064_RADR_PAL 0x03
#define MGA1064_DATA 0x0a
#define MGA1064_CUR_XLOW 0x0c
#define MGA1064_CUR_XHI 0x0d
#define MGA1064_CUR_YLOW 0x0e
#define MGA1064_CUR_YHI 0x0f
/* MGA1064 indirect registers */
#define MGA1064_DVI_PIPE_CTL 0x03
#define MGA1064_CURSOR_BASE_ADR_LOW 0x04
#define MGA1064_CURSOR_BASE_ADR_HI 0x05
#define MGA1064_CURSOR_CTL 0x06
#define MGA1064_CURSOR_COL0_RED 0x08
#define MGA1064_CURSOR_COL0_GREEN 0x09
#define MGA1064_CURSOR_COL0_BLUE 0x0a
#define MGA1064_CURSOR_COL1_RED 0x0c
#define MGA1064_CURSOR_COL1_GREEN 0x0d
#define MGA1064_CURSOR_COL1_BLUE 0x0e
#define MGA1064_CURSOR_COL2_RED 0x010
#define MGA1064_CURSOR_COL2_GREEN 0x011
#define MGA1064_CURSOR_COL2_BLUE 0x012
#define MGA1064_VREF_CTL 0x018
#define MGA1064_MUL_CTL 0x19
#define MGA1064_MUL_CTL_8bits 0x0
#define MGA1064_MUL_CTL_15bits 0x01
#define MGA1064_MUL_CTL_16bits 0x02
#define MGA1064_MUL_CTL_24bits 0x03
#define MGA1064_MUL_CTL_32bits 0x04
#define MGA1064_MUL_CTL_2G8V16bits 0x05
#define MGA1064_MUL_CTL_G16V16bits 0x06
#define MGA1064_MUL_CTL_32_24bits 0x07
#define MGAGDAC_XVREFCTRL 0x18
#define MGA1064_PIX_CLK_CTL 0x1a
#define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 )
#define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 )
#define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 )
#define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 )
#define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 )
#define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 )
#define MGA1064_GEN_CTL 0x1d
#define MGA1064_MISC_CTL 0x1e
#define MGA1064_MISC_CTL_DAC_POW_DN ( 0x01 << 0 )
#define MGA1064_MISC_CTL_VGA ( 0x01 << 1 )
#define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 )
#define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 )
#define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 )
#define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 )
#define MGA1064_GEN_IO_CTL 0x2a
#define MGA1064_GEN_IO_DATA 0x2b
#define MGA1064_SYS_PLL_M 0x2c
#define MGA1064_SYS_PLL_N 0x2d
#define MGA1064_SYS_PLL_P 0x2e
#define MGA1064_SYS_PLL_STAT 0x2f
#define MGA1064_ZOOM_CTL 0x38
#define MGA1064_SENSE_TST 0x3a
#define MGA1064_CRC_LSB 0x3c
#define MGA1064_CRC_MSB 0x3d
#define MGA1064_CRC_CTL 0x3e
#define MGA1064_COL_KEY_MSK_LSB 0x40
#define MGA1064_COL_KEY_MSK_MSB 0x41
#define MGA1064_COL_KEY_LSB 0x42
#define MGA1064_COL_KEY_MSB 0x43
#define MGA1064_PIX_PLLA_M 0x44
#define MGA1064_PIX_PLLA_N 0x45
#define MGA1064_PIX_PLLA_P 0x46
#define MGA1064_PIX_PLLB_M 0x48
#define MGA1064_PIX_PLLB_N 0x49
#define MGA1064_PIX_PLLB_P 0x4a
#define MGA1064_PIX_PLLC_M 0x4c
#define MGA1064_PIX_PLLC_N 0x4d
#define MGA1064_PIX_PLLC_P 0x4e
#define MGA1064_PIX_PLL_STAT 0x4f
/*Added for G450 dual head*/
/* Supported PLL*/
#define __PIXEL_PLL 1
#define __SYSTEM_PLL 2
#define __VIDEO_PLL 3
#define MGA1064_VID_PLL_P 0x8D
#define MGA1064_VID_PLL_M 0x8E
#define MGA1064_VID_PLL_N 0x8F
#define MGA1064_DISP_CTL 0x8a
#define MGA1064_SYNC_CTL 0x8b
#define MGA1064_PWR_CTL 0xa0
#define MGA1064_PAN_CTL 0xa2
/* Using crtc2 */
#define MGAREG2_C2CTL 0x10
#define MGAREG2_C2HPARAM 0x14
#define MGAREG2_C2HSYNC 0x18
#define MGAREG2_C2VPARAM 0x1c
#define MGAREG2_C2VSYNC 0x20
#define MGAREG2_C2STARTADD0 0x28
#define MGAREG2_C2OFFSET 0x40
#define MGAREG2_C2DATACTL 0x4c
#define MGAREG_C2CTL 0x3c10
#define MGAREG_C2HPARAM 0x3c14
#define MGAREG_C2HSYNC 0x3c18
#define MGAREG_C2VPARAM 0x3c1c
#define MGAREG_C2VSYNC 0x3c20
#define MGAREG_C2STARTADD0 0x3c28
#define MGAREG_C2OFFSET 0x3c40
#define MGAREG_C2DATACTL 0x3c4c
#define MGA1064_DISP_CTL 0x8a
#define MGA1064_SYNC_CTL 0x8b
#define MGA1064_PWR_CTL 0xa0
/* video register */
#define MGAREG_BESA1C3ORG 0x3d60
#define MGAREG_BESA1CORG 0x3d10
#define MGAREG_BESA1ORG 0x3d00
#define MGAREG_BESCTL 0x3d20
#define MGAREG_BESGLOBCTL 0x3dc0
#define MGAREG_BESHCOORD 0x3d28
#define MGAREG_BESHISCAL 0x3d30
#define MGAREG_BESHSRCEND 0x3d3c
#define MGAREG_BESHSRCLST 0x3d50
#define MGAREG_BESHSRCST 0x3d38
#define MGAREG_BESLUMACTL 0x3d40
#define MGAREG_BESPITCH 0x3d24
#define MGAREG_BESV1SRCLST 0x3d54
#define MGAREG_BESV1WGHT 0x3d48
#define MGAREG_BESVCOORD 0x3d2c
#define MGAREG_BESVISCAL 0x3d34
/* texture engine registers */
#define MGAREG_TMR0 0x2c00
#define MGAREG_TMR1 0x2c04
#define MGAREG_TMR2 0x2c08
#define MGAREG_TMR3 0x2c0c
#define MGAREG_TMR4 0x2c10
#define MGAREG_TMR5 0x2c14
#define MGAREG_TMR6 0x2c18
#define MGAREG_TMR7 0x2c1c
#define MGAREG_TMR8 0x2c20
#define MGAREG_TEXORG 0x2c24
#define MGAREG_TEXWIDTH 0x2c28
#define MGAREG_TEXHEIGHT 0x2c2c
#define MGAREG_TEXCTL 0x2c30
#define MGAREG_TEXCTL2 0x2c3c
#define MGAREG_TEXTRANS 0x2c34
#define MGAREG_TEXTRANSHIGH 0x2c38
#define MGAREG_TEXFILTER 0x2c58
#define MGAREG_ALPHASTART 0x2c70
#define MGAREG_ALPHAXINC 0x2c74
#define MGAREG_ALPHAYINC 0x2c78
#define MGAREG_ALPHACTRL 0x2c7c
#define MGAREG_DWGSYNC 0x2c4c
#define MGAREG_AGP_PLL 0x1e4c
#define MGA_AGP2XPLL_ENABLE 0x1
#define MGA_AGP2XPLL_DISABLE 0x0
#endif

31
src/mesa/drivers/dri/r128/Makefile
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@ -1,31 +0,0 @@
# src/mesa/drivers/dri/r128/Makefile
TOP = ../../../../..
include $(TOP)/configs/current
LIBNAME = r128_dri.so
include ../Makefile.defines
DRIVER_SOURCES = \
r128_context.c \
r128_lock.c \
r128_state.c \
r128_texstate.c \
r128_dd.c \
r128_screen.c \
r128_tex.c \
r128_tris.c \
r128_ioctl.c \
r128_span.c \
r128_texmem.c
C_SOURCES = \
$(COMMON_SOURCES) \
$(DRIVER_SOURCES)
ASM_SOURCES =
include ../Makefile.targets

369
src/mesa/drivers/dri/r128/r128_context.c
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@ -1,369 +0,0 @@
/**************************************************************************
Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
Cedar Park, Texas.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
*
*/
#include "main/glheader.h"
#include "main/context.h"
#include "main/simple_list.h"
#include "main/imports.h"
#include "main/extensions.h"
#include "swrast/swrast.h"
#include "swrast_setup/swrast_setup.h"
#include "vbo/vbo.h"
#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
#include "drivers/common/driverfuncs.h"
#include "r128_context.h"
#include "r128_ioctl.h"
#include "r128_dd.h"
#include "r128_state.h"
#include "r128_span.h"
#include "r128_tex.h"
#include "r128_tris.h"
#include "vblank.h"
#include "utils.h"
#include "texmem.h"
#include "xmlpool.h" /* for symbolic values of enum-type options */
#ifndef R128_DEBUG
int R128_DEBUG = 0;
#endif
#define need_GL_EXT_blend_minmax
#define need_GL_EXT_fog_coord
#define need_GL_EXT_secondary_color
#include "main/remap_helper.h"
static const struct dri_extension card_extensions[] =
{
{ "GL_ARB_multitexture", NULL },
{ "GL_ARB_texture_env_add", NULL },
{ "GL_ARB_texture_mirrored_repeat", NULL },
{ "GL_EXT_blend_subtract", GL_EXT_blend_minmax_functions },
{ "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
{ "GL_EXT_texture_edge_clamp", NULL },
{ "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
{ "GL_EXT_stencil_wrap", NULL },
{ "GL_MESA_ycbcr_texture", NULL },
{ "GL_NV_blend_square", NULL },
{ NULL, NULL }
};
static const struct dri_debug_control debug_control[] =
{
{ "ioctl", DEBUG_VERBOSE_IOCTL },
{ "verb", DEBUG_VERBOSE_MSG },
{ "dri", DEBUG_VERBOSE_DRI },
{ "2d", DEBUG_VERBOSE_2D },
{ "sync", DEBUG_ALWAYS_SYNC },
{ "api", DEBUG_VERBOSE_API },
{ "fall", DEBUG_VERBOSE_FALL },
{ NULL, 0 }
};
/* Create the device specific context.
*/
GLboolean r128CreateContext( gl_api api,
const struct gl_config *glVisual,
__DRIcontext *driContextPriv,
void *sharedContextPrivate )
{
struct gl_context *ctx, *shareCtx;
__DRIscreen *sPriv = driContextPriv->driScreenPriv;
struct dd_function_table functions;
r128ContextPtr rmesa;
r128ScreenPtr r128scrn;
int i;
/* Allocate the r128 context */
rmesa = (r128ContextPtr) CALLOC( sizeof(*rmesa) );
if ( !rmesa )
return GL_FALSE;
/* Init default driver functions then plug in our Radeon-specific functions
* (the texture functions are especially important)
*/
_mesa_init_driver_functions( &functions );
r128InitDriverFuncs( &functions );
r128InitIoctlFuncs( &functions );
r128InitTextureFuncs( &functions );
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((r128ContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
rmesa->glCtx = _mesa_create_context(API_OPENGL, glVisual, shareCtx,
&functions, (void *) rmesa);
if (!rmesa->glCtx) {
FREE(rmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = rmesa;
ctx = rmesa->glCtx;
rmesa->driContext = driContextPriv;
rmesa->driScreen = sPriv;
rmesa->driDrawable = NULL;
rmesa->hHWContext = driContextPriv->hHWContext;
rmesa->driHwLock = &sPriv->pSAREA->lock;
rmesa->driFd = sPriv->fd;
r128scrn = rmesa->r128Screen = (r128ScreenPtr)(sPriv->private);
/* Parse configuration files */
driParseConfigFiles (&rmesa->optionCache, &r128scrn->optionCache,
r128scrn->driScreen->myNum, "r128");
rmesa->sarea = (drm_r128_sarea_t *)((char *)sPriv->pSAREA +
r128scrn->sarea_priv_offset);
rmesa->CurrentTexObj[0] = NULL;
rmesa->CurrentTexObj[1] = NULL;
(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
make_empty_list( & rmesa->swapped );
rmesa->nr_heaps = r128scrn->numTexHeaps;
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
r128scrn->texSize[i],
12,
R128_NR_TEX_REGIONS,
(drmTextureRegionPtr)rmesa->sarea->tex_list[i],
&rmesa->sarea->tex_age[i],
&rmesa->swapped,
sizeof( r128TexObj ),
(destroy_texture_object_t *) r128DestroyTexObj );
driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
& rmesa->c_textureSwaps );
}
rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
"texture_depth");
if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
rmesa->texture_depth = ( r128scrn->cpp == 4 ) ?
DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
rmesa->RenderIndex = -1; /* Impossible value */
rmesa->vert_buf = NULL;
rmesa->num_verts = 0;
RENDERINPUTS_ONES( rmesa->tnl_state_bitset );
/* Set the maximum texture size small enough that we can guarentee that
* all texture units can bind a maximal texture and have them both in
* texturable memory at once.
*/
ctx->Const.MaxTextureUnits = 2;
ctx->Const.MaxTextureImageUnits = 2;
ctx->Const.MaxTextureCoordUnits = 2;
driCalculateMaxTextureLevels( rmesa->texture_heaps,
rmesa->nr_heaps,
& ctx->Const,
4,
10, /* max 2D texture size is 1024x1024 */
0, /* 3D textures unsupported. */
0, /* cube textures unsupported. */
0, /* texture rectangles unsupported. */
11,
GL_FALSE,
0 );
/* No wide points.
*/
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 1.0;
ctx->Const.MaxPointSizeAA = 1.0;
/* No wide lines.
*/
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 1.0;
ctx->Const.MaxLineWidthAA = 1.0;
ctx->Const.LineWidthGranularity = 1.0;
ctx->Const.MaxDrawBuffers = 1;
#if ENABLE_PERF_BOXES
rmesa->boxes = driQueryOptionb(&rmesa->optionCache, "performance_boxes");
#endif
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_vbo_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
/* Install the customized pipeline:
*/
/* _tnl_destroy_pipeline( ctx ); */
/* _tnl_install_pipeline( ctx, r128_pipeline ); */
/* Configure swrast and T&L to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_tnl_allow_pixel_fog( ctx, GL_FALSE );
_tnl_allow_vertex_fog( ctx, GL_TRUE );
driInitExtensions( ctx, card_extensions, GL_TRUE );
if (sPriv->drm_version.minor >= 4)
_mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
r128InitTriFuncs( ctx );
r128DDInitStateFuncs( ctx );
r128DDInitSpanFuncs( ctx );
r128DDInitState( rmesa );
driContextPriv->driverPrivate = (void *)rmesa;
#if DO_DEBUG
R128_DEBUG = driParseDebugString( getenv( "R128_DEBUG" ),
debug_control );
#endif
if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
FALLBACK(rmesa, R128_FALLBACK_DISABLE, 1);
}
return GL_TRUE;
}
/* Destroy the device specific context.
*/
void r128DestroyContext( __DRIcontext *driContextPriv )
{
r128ContextPtr rmesa = (r128ContextPtr) driContextPriv->driverPrivate;
assert(rmesa); /* should never be null */
if ( rmesa ) {
GLboolean release_texture_heaps;
release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
_swsetup_DestroyContext( rmesa->glCtx );
_tnl_DestroyContext( rmesa->glCtx );
_vbo_DestroyContext( rmesa->glCtx );
_swrast_DestroyContext( rmesa->glCtx );
if ( release_texture_heaps ) {
/* This share group is about to go away, free our private
* texture object data.
*/
int i;
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
rmesa->texture_heaps[ i ] = NULL;
}
assert( is_empty_list( & rmesa->swapped ) );
}
/* free the Mesa context */
rmesa->glCtx->DriverCtx = NULL;
_mesa_destroy_context(rmesa->glCtx);
/* free the option cache */
driDestroyOptionCache (&rmesa->optionCache);
FREE( rmesa );
}
#if 0
/* Use this to force shared object profiling. */
glx_fini_prof();
#endif
}
/* Force the context `c' to be the current context and associate with it
* buffer `b'.
*/
GLboolean
r128MakeCurrent( __DRIcontext *driContextPriv,
__DRIdrawable *driDrawPriv,
__DRIdrawable *driReadPriv )
{
if ( driContextPriv ) {
GET_CURRENT_CONTEXT(ctx);
r128ContextPtr oldR128Ctx = ctx ? R128_CONTEXT(ctx) : NULL;
r128ContextPtr newR128Ctx = (r128ContextPtr) driContextPriv->driverPrivate;
if ( newR128Ctx != oldR128Ctx ) {
newR128Ctx->new_state |= R128_NEW_CONTEXT;
newR128Ctx->dirty = R128_UPLOAD_ALL;
}
if (driDrawPriv->swap_interval == (unsigned)-1) {
driDrawPriv->vblFlags = (newR128Ctx->r128Screen->irq != 0)
? driGetDefaultVBlankFlags(&newR128Ctx->optionCache)
: VBLANK_FLAG_NO_IRQ;
driDrawableInitVBlank( driDrawPriv );
}
newR128Ctx->driDrawable = driDrawPriv;
_mesa_make_current( newR128Ctx->glCtx,
(struct gl_framebuffer *) driDrawPriv->driverPrivate,
(struct gl_framebuffer *) driReadPriv->driverPrivate );
newR128Ctx->new_state |= R128_NEW_WINDOW | R128_NEW_CLIP;
} else {
_mesa_make_current( NULL, NULL, NULL );
}
return GL_TRUE;
}
/* Force the context `c' to be unbound from its buffer.
*/
GLboolean
r128UnbindContext( __DRIcontext *driContextPriv )
{
return GL_TRUE;
}

261
src/mesa/drivers/dri/r128/r128_context.h
View File

@ -1,261 +0,0 @@
/**************************************************************************
Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
Cedar Park, Texas.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
*
*/
#ifndef __R128_CONTEXT_H__
#define __R128_CONTEXT_H__
#include "dri_util.h"
#include "drm.h"
#include "r128_drm.h"
#include "main/mtypes.h"
#include "tnl/t_vertex.h"
#include "r128_reg.h"
#include "texmem.h"
struct r128_context;
typedef struct r128_context r128ContextRec;
typedef struct r128_context *r128ContextPtr;
#include "r128_lock.h"
#include "r128_texobj.h"
#include "r128_screen.h"
/* Flags for what context state needs to be updated:
*/
#define R128_NEW_ALPHA 0x0001
#define R128_NEW_DEPTH 0x0002
#define R128_NEW_FOG 0x0004
#define R128_NEW_CLIP 0x0008
#define R128_NEW_CULL 0x0010
#define R128_NEW_MASKS 0x0020
#define R128_NEW_RENDER_NOT 0x0040
#define R128_NEW_WINDOW 0x0080
#define R128_NEW_CONTEXT 0x0100
#define R128_NEW_ALL 0x01ff
/* Flags for software fallback cases:
*/
#define R128_FALLBACK_TEXTURE 0x0001
#define R128_FALLBACK_DRAW_BUFFER 0x0002
#define R128_FALLBACK_READ_BUFFER 0x0004
#define R128_FALLBACK_STENCIL 0x0008
#define R128_FALLBACK_RENDER_MODE 0x0010
#define R128_FALLBACK_LOGICOP 0x0020
#define R128_FALLBACK_SEP_SPECULAR 0x0040
#define R128_FALLBACK_BLEND_EQ 0x0080
#define R128_FALLBACK_BLEND_FUNC 0x0100
#define R128_FALLBACK_PROJTEX 0x0200
#define R128_FALLBACK_DISABLE 0x0400
/* Use the templated vertex format:
*/
#define TAG(x) r128##x
#include "tnl_dd/t_dd_vertex.h"
#undef TAG
/* Reasons why the GL_BLEND fallback mightn't work:
*/
#define R128_BLEND_ENV_COLOR 0x1
#define R128_BLEND_MULTITEX 0x2
/* Subpixel offsets for window coordinates (triangles):
*/
#define SUBPIXEL_X (0.0F)
#define SUBPIXEL_Y (0.125F)
typedef void (*r128_tri_func)( r128ContextPtr,
r128Vertex *,
r128Vertex *,
r128Vertex * );
typedef void (*r128_line_func)( r128ContextPtr,
r128Vertex *,
r128Vertex * );
typedef void (*r128_point_func)( r128ContextPtr,
r128Vertex * );
struct r128_context {
struct gl_context *glCtx; /* Mesa context */
/* Driver and hardware state management
*/
GLuint new_state;
GLuint dirty; /* Hardware state to be updated */
drm_r128_context_regs_t setup;
/* Vertex state */
GLuint vertex_size;
GLuint vertex_format;
struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
GLuint vertex_attr_count;
char *verts; /* points to tnl->clipspace.vertex_buf */
GLuint num_verts;
int coloroffset, specoffset;
DECLARE_RENDERINPUTS(tnl_state_bitset); /* tnl->render_inputs for this _tnl_install_attrs */
GLuint NewGLState;
GLuint Fallback;
GLuint RenderIndex;
GLfloat hw_viewport[16];
GLfloat depth_scale;
uint32_t ClearColor; /* Color used to clear color buffer */
uint32_t ClearDepth; /* Value used to clear depth buffer */
uint32_t ClearStencil; /* Value used to clear stencil */
/* Map GL texture units onto hardware
*/
GLint multitex;
GLint tmu_source[2];
GLuint tex_combine[2];
GLuint blend_flags;
GLuint env_color;
/* Texture object bookkeeping
*/
unsigned nr_heaps;
driTexHeap * texture_heaps[ R128_NR_TEX_HEAPS ];
driTextureObject swapped;
r128TexObjPtr CurrentTexObj[2];
int texture_depth;
/* Fallback rasterization functions
*/
r128_point_func draw_point;
r128_line_func draw_line;
r128_tri_func draw_tri;
/* Vertex buffers
*/
drmBufPtr vert_buf;
GLuint hw_primitive;
GLenum render_primitive;
/* Page flipping
*/
GLuint doPageFlip;
/* Cliprect and scissor information
*/
GLuint numClipRects; /* Cliprects for the draw buffer */
drm_clip_rect_t *pClipRects;
GLuint scissor;
drm_clip_rect_t ScissorRect; /* Current software scissor */
/* Mirrors of some DRI state
*/
__DRIcontext *driContext; /* DRI context */
__DRIscreen *driScreen; /* DRI screen */
__DRIdrawable *driDrawable; /* DRI drawable bound to this ctx */
unsigned int lastStamp; /* mirror driDrawable->lastStamp */
drm_context_t hHWContext;
drm_hw_lock_t *driHwLock;
int driFd;
r128ScreenPtr r128Screen; /* Screen private DRI data */
drm_r128_sarea_t *sarea; /* Private SAREA data */
/* Performance counters
*/
GLuint boxes; /* Draw performance boxes */
GLuint hardwareWentIdle;
GLuint c_clears;
GLuint c_drawWaits;
GLuint c_textureSwaps;
GLuint c_textureBytes;
GLuint c_vertexBuffers;
/* Configuration cache
*/
driOptionCache optionCache;
};
#define R128_CONTEXT(ctx) ((r128ContextPtr)(ctx->DriverCtx))
#define R128_IS_PLAIN( rmesa ) \
(rmesa->r128Screen->chipset == R128_CARD_TYPE_R128)
#define R128_IS_PRO( rmesa ) \
(rmesa->r128Screen->chipset == R128_CARD_TYPE_R128_PRO)
#define R128_IS_MOBILITY( rmesa ) \
(rmesa->r128Screen->chipset == R128_CARD_TYPE_R128_MOBILITY)
extern GLboolean r128CreateContext( gl_api api,
const struct gl_config *glVisual,
__DRIcontext *driContextPriv,
void *sharedContextPrivate );
extern void r128DestroyContext( __DRIcontext * );
extern GLboolean r128MakeCurrent( __DRIcontext *driContextPriv,
__DRIdrawable *driDrawPriv,
__DRIdrawable *driReadPriv );
extern GLboolean r128UnbindContext( __DRIcontext *driContextPriv );
/* ================================================================
* Debugging:
*/
#define DO_DEBUG 1
#define ENABLE_PERF_BOXES 0
#if DO_DEBUG
extern int R128_DEBUG;
#else
#define R128_DEBUG 0
#endif
#define DEBUG_ALWAYS_SYNC 0x01
#define DEBUG_VERBOSE_API 0x02
#define DEBUG_VERBOSE_MSG 0x04
#define DEBUG_VERBOSE_LRU 0x08
#define DEBUG_VERBOSE_DRI 0x10
#define DEBUG_VERBOSE_IOCTL 0x20
#define DEBUG_VERBOSE_2D 0x40
#define DEBUG_VERBOSE_FALL 0x80
#endif /* __R128_CONTEXT_H__ */

139
src/mesa/drivers/dri/r128/r128_dd.c
View File

@ -1,139 +0,0 @@
/**************************************************************************
Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc.,
Cedar Park, Texas.
All Rights Reserved.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
on the rights to use, copy, modify, merge, publish, distribute, sub
license, and/or sell copies of the Software, and to permit persons to whom
the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Kevin E. Martin <martin@valinux.com>
*
*/
#include "r128_context.h"
#include "r128_ioctl.h"
#include "r128_dd.h"
#include "main/context.h"
#include "utils.h"
/* Return the width and height of the current color buffer.
*/
static void r128GetBufferSize( struct gl_framebuffer *buffer,
GLuint *width, GLuint *height )
{
GET_CURRENT_CONTEXT(ctx);
r128ContextPtr rmesa = R128_CONTEXT(ctx);
LOCK_HARDWARE( rmesa );
*width = rmesa->driDrawable->w;
*height = rmesa->driDrawable->h;
UNLOCK_HARDWARE( rmesa );
}
/* Return various strings for glGetString().
*/
static const GLubyte *r128GetString( struct gl_context *ctx, GLenum name )
{
r128ContextPtr rmesa = R128_CONTEXT(ctx);
static char buffer[128];
unsigned offset;
const char * card_name = "Rage 128";
GLuint agp_mode = rmesa->r128Screen->IsPCI ? 0 :
rmesa->r128Screen->AGPMode;
switch ( name ) {
case GL_VENDOR:
return (GLubyte *)"VA Linux Systems, Inc.";
case GL_RENDERER:
/* Select the spefic chipset.
*/
if ( R128_IS_PRO( rmesa ) ) {
card_name = "Rage 128 Pro";
}
else if ( R128_IS_MOBILITY( rmesa ) ) {
card_name = "Rage 128 Mobility";
}
offset = driGetRendererString( buffer, card_name, agp_mode );
return (GLubyte *)buffer;
default:
return NULL;
}
}
/* Send all commands to the hardware. If vertex buffers or indirect
* buffers are in use, then we need to make sure they are sent to the
* hardware. All commands that are normally sent to the ring are
* already considered `flushed'.
*/
static void r128Flush( struct gl_context *ctx )
{
r128ContextPtr rmesa = R128_CONTEXT(ctx);
FLUSH_BATCH( rmesa );
#if ENABLE_PERF_BOXES
if ( rmesa->boxes ) {
LOCK_HARDWARE( rmesa );
r128PerformanceBoxesLocked( rmesa );
UNLOCK_HARDWARE( rmesa );
}
/* Log the performance counters if necessary */
r128PerformanceCounters( rmesa );
#endif
}
/* Make sure all commands have been sent to the hardware and have
* completed processing.
*/
static void r128Finish( struct gl_context *ctx )
{
r128ContextPtr rmesa = R128_CONTEXT(ctx);
#if ENABLE_PERF_BOXES
/* Bump the performance counter */
rmesa->c_drawWaits++;
#endif
r128Flush( ctx );
r128WaitForIdle( rmesa );
}
/* Initialize the driver's misc functions.
*/
void r128InitDriverFuncs( struct dd_function_table *functions )
{
functions->GetBufferSize = r128GetBufferSize;
functions->GetString = r128GetString;
functions->Finish = r128Finish;
functions->Flush = r128Flush;
}

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