Commit Graph

56587 Commits

Author SHA1 Message Date
Courtney Goeltzenleuchter daa90f91ff ilo: Add support for HW primitive restart.
Now tells Gallium that ilo supports primitive restart.
Updated ilo_draw_vbo to be able to check that the indexed
primitive being rendered can actually be supported in HW. If not,
will break up into individual prims similar to what Mesa does.

[olv: a minor fix after rebasing and formatting]
2013-05-10 00:06:14 +08:00
Brian Paul 009d79734f svga: misc whitespace and comment fixes in svga_cmd.c 2013-05-09 07:43:46 -06:00
Brian Paul 60c71cce3f docs: remove ^M chars from GL3.txt 2013-05-09 07:43:46 -06:00
Brian Paul e0144019c0 st/mesa: generate GL_OUT_OF_MEMORY if we can't create the index buffer
Before, if we failed to allocate the index buffer we'd silently
return from st_draw_vbo() without drawing anything.  We should
raise GL_OUT_OF_MEMORY to give some indication that something went
wrong.

Note: This is a candidate for the stable branches.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-05-09 07:43:46 -06:00
Chia-I Wu a8e4614071 ilo: add support for PIPE_FORMAT_ETC1_RGB8
It is decompressed to and stored as PIPE_FORMAT_R8G8B8X8_UNORM on-the-fly.
2013-05-09 16:05:48 +08:00
Chia-I Wu 183ea823fd ilo: support mapping with a staging system buffer
It can be used for unpacking compressed texture on-the-fly or to support
explicit transfer flushing.
2013-05-09 16:05:47 +08:00
Chia-I Wu baa44db065 ilo: allow for different mapping methods
We want to or need to use a different mapping method when when the resource is
busy, the bo format differs from the requested format, and etc.
2013-05-09 16:05:47 +08:00
Chia-I Wu 7cca1aac9d ilo: allow bo format to differ from that requested
For separate stencil buffer or formats not supported natively, the real format
of the bo may differ from that requested.
2013-05-09 16:05:47 +08:00
Stéphane Marchesin 1c56fc1025 draw/llvm: Add additional llvm optimization passes
It helps a bit with vertex shader performance on i915g
(a couple percent faster with openarena).

I have tried most other passes, and they weren't showing
any measurable improvement. Note that my vertex shaders
didn't have loops, so maybe the loop optimizations could
still be useful in the future.

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-05-08 22:05:54 -07:00
Eric Anholt 0b0d6f97cf i965: Sync brw_format_for_mesa_format() table with new Mesa formats.
I'm not filling them all in, to prevent any breakage in this commit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-08 15:31:07 -07:00
Eric Anholt 2755946427 i965: Update the surface formats table from the current specs.
Unfortunately the surface formats table is now splattered across multiple
chapters.  All surface format enums from brw_defines.h are present, but
only support for them that is mentioned in the public specs is included
here.

v2 (from Ken): Mark R32G32B32A32_SFIXED as unsupported on Ivybridge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-08 15:31:06 -07:00
Eric Anholt 5d89487eb2 i965: Add surface format defines from the public specs.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-08 14:27:30 -07:00
Fabian Bieler 4e9c7f9c5a mesa/program: Don't copy propagate from swizzles.
Do not propagate a copy if source and destination are identical.

Otherwise code like

MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].xyzw

is changed to

MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].wzyx

This fixes Piglit test shaders/glsl-copy-propagation-self-2 for drivers that
use Mesa IR.

NOTE: This is a candidate for the stable branches.
Signed-off-by: Fabian Bieler <fabianbieler@fastmail.fm>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-05-08 13:59:19 -07:00
Fabian Bieler e1ff753d67 mesa/st: Don't copy propagate from swizzles.
Do not propagate a copy if source and destination are identical.

Otherwise code like

MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].xyzw

is changed to

MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].wzyx

This fixes Piglit test shaders/glsl-copy-propagation-self-2 for gallium drivers.

NOTE: This is a candidate for the stable branches.
Signed-off-by: Fabian Bieler <fabianbieler@fastmail.fm>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-05-08 13:59:14 -07:00
Eric Anholt 5d06c9ea0f i965: Fix hangs on HSW since the gen6 blorp fix.
The constant packets for gen6 are too small for gen7, and while IVB seems
happy with them HSW blows up.  Fix it by emitting the correct packets on
gen7, for all stages.

v2: Include the packets instead of just skipping them.
NOTE: This is a candidate for the stable branches.
Reviewed-and-tested-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-08 10:23:41 -07:00
Chad Versace 2878f4685c egl/android: Fix error condition for EGL_ANDROID_image_native_buffer
Emit EGL_BAD_CONTEXT if the user passes a context to
eglCreateImageKHR(type=EGL_ANDROID_image_native_buffer).

From the EGL_ANDROID_image_native_buffer spec:
  * If <target> is EGL_NATIVE_BUFFER_ANDROID and <ctx> is not
    EGL_NO_CONTEXT, the error EGL_BAD_CONTEXT is generated.

Note: This is a candidate for the stable branches.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2013-05-08 08:44:05 -07:00
Stéphane Marchesin 38d2a16c01 i915: Use Y tiling for textures
This basically reverts commit
2acc719374.

With the previous change, we're not batchbuffer limited any
longer. So we actually start seeing a performance difference
between X and Y tiling. X tiling is funny because it is
faster for screen-aligned quads but slower in games. So let's
use Y tiling which is 10% faster overall.
2013-05-08 02:07:00 -07:00
Stéphane Marchesin fc24c7aede i915g: Optimize batchbuffer sizes
Now that we don't throttle at every batchbuffer, we can shrink
the size of batchbuffers to achieve early flushing. This gives
a significant speed boost in a lot of games (on the order of
20%).
2013-05-08 02:06:56 -07:00
Stéphane Marchesin 7f7c7fda83 i915g: Add more PIPE_CAP_* support 2013-05-08 01:37:55 -07:00
Chia-I Wu 00035670de ilo: remove our own type inference
tgsi_opcode_infer_{src,dst}_type() works just fine.
2013-05-08 11:33:34 +08:00
Chia-I Wu b74af51a46 ilo: use tgsi_util_get_texture_coord_dim()
And remove toy_tgsi_get_texture_coord_dim().
2013-05-08 11:07:46 +08:00
Chia-I Wu 75a48a53d8 tgsi: fix operand type of TGSI_OPCODE_NOT
It should be TGSI_TYPE_UNSIGNED, not TGSI_TYPE_FLOAT.

Fixed also gallivm not_emit_cpu() to use uint build context.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2013-05-08 11:03:49 +08:00
Chia-I Wu 1f970816b1 tgsi: refactor tgsi_opcode_infer_src_type()
Call tgsi_opcode_infer_type() from tgsi_opcode_infer_src_type().

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2013-05-08 11:03:47 +08:00
Chia-I Wu 364feb327d tgsi: refactor tgsi_opcode_infer_dst_type()
Move the body of tgsi_opcode_infer_dst_type() to a new helper function,
tgsi_opcode_infer_type(), and call the helper function from
tgsi_opcode_infer_dst_type().  The diff looks complicated simply because the
code is moved around.

A following commit will make tgsi_opcode_infer_src_type() call
tgsi_opcode_infer_type().

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2013-05-08 11:03:43 +08:00
Chia-I Wu 8a52453f5d tgsi: reorder opcodes in opcode type inference
Reorder opcodes by their assigned numbers.  This makes it easier to see the
differences between tgsi_opcode_infer_src_type() and
tgsi_opcode_infer_dst_type().

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2013-05-08 11:03:24 +08:00
Chia-I Wu 61d57ec276 tgsi: clean up exec_tex()
Make use of tgsi_util_get_texture_coord_dim() to replace the big switch table.

There is a subtle difference with this change.  When TXP is used with an array
texture, the layer is now also projected.  This behavior matches the TGSI doc.
Since GLSL does not allow TXP on an array texture, I am not sure which
behavior is correct or preferred.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2013-05-08 11:00:07 +08:00
Chia-I Wu 80857d2c8b tgsi: add tgsi_util_get_texture_coord_dim()
This util function returns the dimension of the texture coordinates for a
texture target, and the location of the shadow reference value.

For example, when the texture target is TGSI_TEXTURE_SHADOW2D, the dimension
of the texture coordinates is 2, and the location of the ref value is 2
(that is, the Z channel).

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
2013-05-08 10:58:53 +08:00
Bryan Cain 14a0bb81fe nv50: initialize kick_notify callback in nv50_create
Fixes infinite loop on startup in Portal and Left 4 Dead 2.

NOTE: This is a candidate for the 9.0 and 9.1 branches.
2013-05-07 17:01:59 -05:00
Eric Anholt 3f09e528d5 i965: Use Y-tiled blits to untile for cached mappings of miptrees.
Fixes a regression in firefox's unaccelerated compositing path for WebGL
with the introduction of Y tiling.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64213
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-07 11:45:45 -07:00
Eric Anholt d641a01d98 i965: Add support for Y-tiled blits on gen6+.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-05-07 11:45:45 -07:00
Eric Anholt 7a74808d78 i965: Count occlusion query samples for CopyPixels using the 2D engine.
We accidentally "fixed" the piglit test for this when introducing Y
tiling, since this path stopped being executed.  In reenabling this path
for Y tiling, we ended up regressing it again, so just fix it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59439
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-05-07 11:45:45 -07:00
Robert Bragg f8c3242682 egl/wayland: Implement EGL_EXT_swap_buffers_with_damage
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2013-05-07 17:07:50 +01:00
Robert Bragg 6425b14515 egl: Add extension infrastructure for EGL_EXT_swap_buffers_with_damage
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2013-05-07 17:07:45 +01:00
Robert Bragg 95dda0d649 egl: Update to revision 21254 of eglext.h
This pulls in EGL_EXT_swap_buffers_with_damage.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2013-05-07 17:07:44 +01:00
Roland Scheidegger 65102b708b gallium: more tgsi documentation updates
Adds the remaining integer opcodes, and some opcodes are moved to more
appropriate places, along with getting rid of the (already nearly empty)
ps_2_x section. Though the CAP bits for some of these are still a bit in
the air so the documentation isn't quite as watertight as is desirable.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-05-07 16:13:23 +02:00
Vinson Lee 4ba9c9c5be ilo: Add missing break statement in aos_tex TGSI_OPCODE_TEX2 case.
Fixes "Missing break in switch" defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2013-05-07 12:15:48 +08:00
Vadim Girlin c9cf83b587 r600g/sb: optimize some cases for CNDxx instructions
We can replace CNDxx with MOV (and possibly eliminate after
propagation) in following cases:

If src1 is equal to src2 in CNDxx instruction then the result doesn't
depend on condition and we can replace the instruction with
"MOV dst, src1".

If src0 is const then we can evaluate the condition at compile time and
also replace it with MOV.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-05-07 04:40:26 +04:00
Vadim Girlin 46dfad8b36 r600g/sb: fix memory leaks
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-05-07 04:40:26 +04:00
Vadim Girlin 1c28e7c5a1 r600g/sb: fix kcache handling on r6xx
Use the same limit for kcache constants in alu group on r6xx as on other
chips (two const pairs). Relaxing this will require additional checks to
make sure that all 4 consts in the group come from 2 kcache sets (clause
limit), probably without noticeable improvements of shader performance.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-05-07 04:40:26 +04:00
Eric Anholt 03ef60681e intel: Remove renderbuffer delete setup from texture wrapping.
This is already set by intel_new_renderbuffer().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-06 14:34:27 -07:00
Eric Anholt 77a405dba7 mesa: Make Mesa core set up wrapped texture renderbuffer state.
Everyone was doing effectively the same thing, except for some funky code
reuse in Intel, and swrast mistakenly recomputing _BaseFormat instead of
using the texture's _BaseFormat.  swrast's sRGB handling is left in place,
though it should be done by using _mesa_get_render_format() at render time
instead (as-is, it will miss updates to GL_FRAMEBUFFER_SRGB).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-06 14:34:14 -07:00
Eric Anholt 5b190d19d3 intel: Simplify renderbuffer-for-texture width setup.
We're looking for the logical width of our level, which is what
image->Width2/Height2 is.  The previous code relied on MSAA textures being
only level 0.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-06 14:33:43 -07:00
Eric Anholt 749a92786d mesa: Make core Mesa allocate the texture renderbuffer wrapper.
Every driver did the same thing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-06 14:33:38 -07:00
Eric Anholt 5b9609f59a i965: Use brw_blorp_blit_miptrees() for CopyTexSubImage().
Now that depth resolves are handled there, we don't need to make the
temporary renderbuffer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-06 14:33:33 -07:00
Eric Anholt 40956c5519 i965: Move blorp resolve setup into brw_blorp_blit_miptrees().
There was some comment about trying to avoid marking resolves in
updownsample, but if the downsample is never actually rendered to, then
the required resolve tracked in the downsample will never be executed, so
who cares?

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-05-06 14:33:27 -07:00
Tom Stellard 730c90a70e gallivm: Fix build for LLVM < 3.3
The C API versions of the LLVM multithreaded functions were added in
LLVM 3.3.
2013-05-06 11:17:03 -07:00
Tom Stellard bb94d4d8fe r600g/llvm: Parse config values in register / value pairs
Rather than relying on a predetermined order for the config values.
2013-05-06 10:54:52 -07:00
Tom Stellard df27320560 r600g/llvm: Don't feed LLVM output through r600_bytecode_build()
The LLVM backend emits raw ISA now, so we can just its output
unmodified.
2013-05-06 10:54:52 -07:00
Tom Stellard e917ed96ae r600g/llvm: Don't emit CALL_FS for vertex shaders
The LLVM backend takes care of this now.
2013-05-06 10:54:52 -07:00
Matt Turner 1d09a8c3cd i965: Lower bitfieldInsert.
v2: Only lower bitfieldInsert to BFM+BFI (and don't lower
    bitfieldExtract at all) since three-source instructions are now
    usable in the vertex shader.
v3: Lower bitfield_insert in the same pass with everything else, since
    it doesn't produce any instructions to be lowered (the other two
    lowering passes that were in a previous iteration of this series
    emitted subtractions which needed to be lowered).

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> [v2]
2013-05-06 10:17:14 -07:00