Commit Graph

141563 Commits

Author SHA1 Message Date
Iago Toral Quiroga aa61a653a5 v3dv: implement vkCmdResolveImage2KHR
The common Vulkan code will call this to implement vkCmdResolveImage.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11443>
2021-06-21 06:00:56 +00:00
Iago Toral Quiroga 8e358a74d0 v3dv: implement vkCmdCopyImage2KHR
The common Vulkan code will call this to implement vkCmdCopyImage.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11443>
2021-06-21 06:00:56 +00:00
Iago Toral Quiroga 3bdc03fd28 v3dv: implement vkCmdCopyBufferToImage2KHR and vkCmdCopyImageToBuffer2KHR
The common Vulkan code will call this to implement vkCmdCopyImageToBuffer.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11443>
2021-06-21 06:00:56 +00:00
Iago Toral Quiroga 47390d6669 v3dv: implement vkCmdCopyBuffer2KHR
The common Vulkan code will call this to implement vkCmdCopyBuffer.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11443>
2021-06-21 06:00:56 +00:00
Iago Toral Quiroga 06a9a3ead5 v3dv: implement vkCmdBlitImage2KHR
The common Vulkan code will call this to implement vkCmdBlitImage.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11443>
2021-06-21 06:00:56 +00:00
Yurii Kolesnykov 89b4f337d5 c_std=c11 in meson default_options
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1020

Co-authored-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Yurii Kolesnykov <root@yurikoles.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6935>
2021-06-20 11:36:06 +03:00
Marek Olšák 61a845ca19 ac/surface: don't set DCC_PIPE_ALIGN modifier bit for gfx10 with 1 RB
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 2acd34f266 ac/surface/tests: fix RB counts
The real number of RBs can be less than what GB_ADDR_CONFIG contains.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 9c3225cb53 radeonsi: move the accepting code into the bbox cull branch in NGG cull code
This reduces the number of jumps. No change in behavior.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 12d2df15f1 ac/llvm: add a callback to ac_cull_triangle to generate code in inner-most block
This will reduce jumps in culling code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 1805572694 radeonsi: fix multi draws for the prim discard CS
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 848dbe9ff7 radeonsi: fix incorrect counting of compute_num_verts_rejected
Both cases should subtract to undo what is done in the conditional.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 3cde2f96f9 radeonsi: use ac_build_bit_count instead of opencoding it
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 70b5a5cbbf radeonsi: fix compile failures with SI_PRIM_DISCARD_DEBUG enabled
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Eleni Maria Stea b4d90b1182 egl: fix in expected type
Function mincore expects a pointer of type char* but we use an unsigned
char* instead generating signedness related warnings.

v2: Made the fix FreeBSD specific because the type is unsigned char* for
Linux and char* for FreeBSD. (Adam Jackson)

v3: We'd rather cast the param to (void*) to avoid warnings in all
systems (Adam Jackson)

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11298>
2021-06-19 19:34:20 +00:00
Jason Ekstrand 7b8199e4a2 crocus: Drop extra_aux support
This exists for combined MCS+CCS or HiZ+CCS which was introduced on
Tigerlake.  Crocus will never support hardware that has these features
so there's no point carrying the dead copied+pasted code from iris.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11483>
2021-06-19 14:57:25 +00:00
Bas Nieuwenhuizen 82de184c3a radv: Enable VK_KHR_acceleration_structure with RADV_PERFTEST=rt.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen c27e3a6248 radv: Add rt perftest flag.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen 438cb7f9a3 radv: Expose formats for acceleration structure.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen 9920eadf83 radv: Implement load_vulkan_descriptor for acceleration structures.
It always uses nir_address_format_64bit_global.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen 85e39cb325 radv: Convert lower_intrinsics to a switch statement
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen a4b3ce5d56 radv: Add acceleration structure descriptor set support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen 0dad88b469 radv: Implement device-side BVH building.
Same naive algorithm as the host build.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen d51a4b4c4b radv: Add initial CPU BVH building.
The algorithm used for the BVH:

1) first create 1 leaf per primitive (triangle/aabb/instance)
2) Then create internal layers from the bottom up until we are left with
   1 node in the top layer. Node i in the layer will have children
   (i*4+0) ... (i*4+3) in the previous layer.

This results in a very naive algorithm but it is also very simple to implement.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen 67e949a8f8 radv: Use the global BO list for acceleration structures.
We have nested structures so tracking this from the descriptor
set is going to be a mess.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Jason Ekstrand f31bfda34a util: Move the 4x4 matrix inverse function to u_math
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Rob Clark 1727adfbc5 freedreno/ci: Increase # of jobs for CI runners
The idea is that the tests will spend *some* time stalling waiting to
read back results from the GPU.  So use a # of jobs that is slightly
more than the # of CPUs to keep the CPUs more busy.

Locally this is dropping a bit more than a minute off a parallel
deqp-gles31 run, so turn it on across the board for a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11477>
2021-06-18 21:59:06 +00:00
Rob Clark fc00abe46c freedreno/ci: Start longest traces first
Shave off a bit of runtime on the CI job by starting the longer traces
first.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11477>
2021-06-18 21:59:06 +00:00
Dave Airlie 714145f54c crocus/gen6: fix depth blit blorp regression.
The tesseract fix broke depth blits using blorp as depth blits
on gen6 are done using the color engine. Just disable aux
up front on the destination for this case.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11456>
2021-06-19 06:05:08 +10:00
Emma Anholt caa5c5b12e freedreno/ir3: Move NIR printing to mesa_log.
Now we can get some NIR debug on Android.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Emma Anholt 990c232603 nir: Add an interface for logging shaders with mesa_log*.
For debug on Android, it's useful to be able to print shaders to the
android log interface, since you don't usually have stdout/stderr.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Emma Anholt 88fe7ab4fa freedreno/ir3: Move the native code output to mesa_log as well.
I didn't feel like rewriting ir3_shader_disasm() off of FILE *s, so use
the same trick as the disasm_info path above to write to memory and then
hand the multi-line blob off to mesa_log.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Emma Anholt 9d458336c6 freedreno/ir3: Use mesa_log_stream() for ir3 disassembly.
This means you can get dumps on android, and output on Linux goes to
stderr.  However, this does mean that on Linux the output goes from
looking like:

AFTER: ir3_legalize:
block3276208368 {
	0000:0001:002: 	cov.u32s16 hr2.x, c2.x
	0000:0002:002: 	mov.u32u32 r0.x, c0.x
[...]

to:

MESA: info: AFTER: ir3_legalize:
MESA: info: block3405271904 {
MESA: info: 	0000:0001:002: 	cov.u32s16 hr2.x, c2.x
MESA: info: 	0000:0002:002: 	mov.u32u32 r0.x, c0.x
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Emma Anholt 250c127c20 util/log: Add a streaming printf interface.
Often disassemblers and things in our drivers want to be able to
incrementally printf together a line, but that gets in the way of
Android's logging that wants to see a whole line all at once.  Make a
little wrapper to do the ralloc_asprintf_rewrite_tail() and flushing lines
as they appear.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Emma Anholt 3863008c22 freedreno/ir3: Move the assert output to mesa_loge().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Emma Anholt ecf807c900 freedreno: Move some driver debug printfs to mesa_logd.
This means the logging will work on Android, and won't get mixed up in
application stdout on Linux.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Emma Anholt caf69b5b77 i915g: Add triangle provoking vertex support.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11470>
2021-06-18 18:11:12 +00:00
Eric Engestrom ddf5c798d2 docs: update calendar and link releases notes for 21.1.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11472>
2021-06-18 18:07:12 +00:00
Eric Engestrom b8d54b7a71 docs: add release notes for 21.1.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11472>
2021-06-18 18:07:11 +00:00
Mike Blumenkrantz 4f86cd46eb nine: add zink to the build target
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11467>
2021-06-18 17:44:14 +00:00
Mike Blumenkrantz f91ffe1349 nine: only enable tgsi disk cache if the driver supports it
this crashes otherwise

Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11471>
2021-06-18 17:34:09 +00:00
Samuel Pitoiset 977355c6e5 radv: fix dynamic culling and depth/stencil related dynamic states
To avoid overwriting previous dynamic state with default state from
the pipeline.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4926
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11375>
2021-06-18 16:27:57 +00:00
Mike Blumenkrantz 651c6b16ff radv: move pipe_misaligned and l2_coherent image checks to flags set on init
this should save 4-5% cpu in some cases

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11462>
2021-06-18 16:02:26 +00:00
Boyuan Zhang e1af22d9dd radeon/vcn: allocate non-tmz context buffer for VCN2+
By design, context buffer should be allocated as TMZ buffer for secure playback
for VCN 1 only. For VCN 2&2+, context buffer should be moved out of TMZ.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11388>
2021-06-18 14:35:44 +00:00
Boyuan Zhang 796358e2f5 radeon/vcn: move calc_dpb_size into create_decoder
Dpb buffer size calculation should based on the values provided in player's
decoder creation call. db_alignmet should be decided in decoder creation
call as well. Therefore, move db_alignment and dpb buffer size calculation
from rvcn_dec_message_decode to radeon_create_decoder function.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11378>
2021-06-18 14:23:24 +00:00
Jason Ekstrand b97dedd365 docs/isl: Add detailed documentation about CCS compression
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11366>
2021-06-18 13:03:48 +00:00
Jason Ekstrand 6b15ce9fa2 docs/isl: Add detailed documentation about tiling on Intel GPUs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11366>
2021-06-18 13:03:48 +00:00
Jason Ekstrand 0f6ebd2b73 docs/isl: Add detailed documentation about isl formats
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11366>
2021-06-18 13:03:48 +00:00
Jason Ekstrand 3894e42590 docs/isl: Document ISL's units
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11366>
2021-06-18 13:03:48 +00:00
Jason Ekstrand d07ec294bb isl: Document more members of isl_surf
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11366>
2021-06-18 13:03:48 +00:00