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crocus: Drop extra_aux support 

This exists for combined MCS+CCS or HiZ+CCS which was introduced on
Tigerlake.  Crocus will never support hardware that has these features
so there's no point carrying the dead copied+pasted code from iris.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11483>
This commit is contained in:
Jason Ekstrand 2021-06-18 17:17:17 -05:00 committed by Marge Bot
parent 82de184c3a
commit 7b8199e4a2
2 changed files with 3 additions and 43 deletions
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39
src/gallium/drivers/crocus/crocus_resource.c
View File

@ -349,7 +349,6 @@ crocus_resource_disable_aux(struct crocus_resource *res)
res->aux.surf.size_B = 0;
res->aux.surf.levels = 0;
res->aux.bo = NULL;
res->aux.extra_aux.surf.size_B = 0;
res->aux.state = NULL;
}
@ -467,19 +466,10 @@ crocus_resource_configure_aux(struct crocus_screen *screen,
((devinfo->ver >= 7 && !res->mod_info && !(INTEL_DEBUG & DEBUG_NO_RBC)) ||
(res->mod_info && res->mod_info->aux_usage != ISL_AUX_USAGE_NONE)) &&
isl_surf_get_ccs_surf(&screen->isl_dev, &res->surf, &res->aux.surf,
&res->aux.extra_aux.surf, 0);
NULL, 0);
/* Having both HIZ and MCS is impossible. */
assert(!has_mcs || !has_hiz);
/* Ensure aux surface creation for MCS_CCS and HIZ_CCS is correct. */
if (has_ccs && (has_mcs || has_hiz)) {
assert(res->aux.extra_aux.surf.size_B > 0 &&
res->aux.extra_aux.surf.usage & ISL_SURF_USAGE_CCS_BIT);
assert(res->aux.surf.size_B > 0 &&
res->aux.surf.usage &
(ISL_SURF_USAGE_HIZ_BIT | ISL_SURF_USAGE_MCS_BIT));
}
/* Having more than one type of compression is impossible */
assert(has_ccs + has_mcs + has_hiz <= 1);
if (res->mod_info && has_ccs) {
res->aux.usage = res->mod_info->aux_usage;
@ -553,14 +543,6 @@ crocus_resource_configure_aux(struct crocus_screen *screen,
ALIGN(res->surf.size_B, res->aux.surf.alignment_B) : 0;
uint64_t size = res->aux.surf.size_B;
/* Allocate space in the buffer for storing the CCS. */
if (res->aux.extra_aux.surf.size_B > 0) {
const uint64_t padded_aux_size =
ALIGN(size, res->aux.extra_aux.surf.alignment_B);
res->aux.extra_aux.offset = res->aux.offset + padded_aux_size;
size = padded_aux_size + res->aux.extra_aux.surf.size_B;
}
/* Allocate space in the buffer for storing the clear color. On modern
* platforms (gen > 9), we can read it directly from such buffer.
*
@ -611,21 +593,6 @@ crocus_resource_init_aux_buf(struct crocus_resource *res, uint32_t alloc_flags)
res->aux.surf.size_B);
}
/* Bspec section titled : MCS/CCS Buffers for Render Target(s) states:
* - If Software wants to enable Color Compression without Fast clear,
* Software needs to initialize MCS with zeros.
* - Lossless compression and CCS initialized to all F (using HW Fast
* Clear or SW direct Clear)
*
* We think, the first bullet point above is referring to CCS aux
* surface. Since we initialize the MCS in the clear state, we also
* initialize the CCS in the clear state (via SW direct clear) to keep
* the two in sync.
*/
memset((char*)map + res->aux.extra_aux.offset,
isl_aux_usage_has_mcs(res->aux.usage) ? 0xFF : 0,
res->aux.extra_aux.surf.size_B);
crocus_bo_unmap(res->aux.bo);
}

7
src/gallium/drivers/crocus/crocus_resource.h
View File

@ -136,13 +136,6 @@ struct crocus_resource {
/** Offset into 'bo' where the auxiliary surface starts. */
uint32_t offset;
struct {
struct isl_surf surf;
/** Offset into 'bo' where the auxiliary surface starts. */
uint32_t offset;
} extra_aux;
/**
* Fast clear color for this surface. For depth surfaces, the clear
* value is stored as a float32 in the red component.