Commit Graph

6226 Commits

Author SHA1 Message Date
Timothy Arceri 3d1022382c glsl: enforce restrictions on builtin functions moved to compat
Section 8.9.4 (Compatibility Profile Texture Functions) of the
GLSL 4.20 spec outlines a number of builtin texture functions that
have been moved to compatibility shaders.

This change enforces those restrictions. Note we don't worry about
enforcing restrictions on the EXT_gpu_shader4 extensions of these
functions because EXT_gpu_shader4 should only be enabled for compat
already.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9887>
2021-04-01 02:41:40 +00:00
Vinson Lee cd222e4a9c glsl: Initialize parcel_out_uniform_storage members.
Fix defects reported by Coverity Scan.

uninit_member: Non-static class member buffer_block_index is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member ubo_byte_offset is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member shader_type is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member next_sampler is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member next_bindless_sampler is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member next_image is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member next_bindless_image is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member next_subroutine is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member field_counter is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member current_var is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member explicit_location is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member record_array_count is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member record_next_sampler is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member record_next_image is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member record_next_bindless_sampler is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member record_next_bindless_image is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member targets is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member shader_samplers_used is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member shader_shadow_samplers is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member num_bindless_samplers is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member num_bindless_images is not initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7910>
2021-03-30 21:26:04 -07:00
Erik Faye-Lund 89a04a54c4 compiler/glsl: avoid null-pointer deref
When we encounter a bindless image here, lower_deref returns a
NULL-pointer, and calling record_images_used will try to dereference
that NULL-pointer.

So let's dig out the var from the source instruction instead of the
result of the lowering.

Fixes: 5910c938a2 ("nir/glsl: gather bitmask of images used by program")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9895>
2021-03-30 15:22:17 +00:00
Alyssa Rosenzweig 8578adeaa6 nir: Unify memory atomics
Avoids some copypaste and makes it easier to see how the different types
relate.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8847>
2021-03-30 00:11:01 +00:00
Eric Anholt 683d3972a6 nir: Update clip_distance_array_size in clip lowering.
If we've added the array, then we should update the info.  This is the
value that gallium drivers setting !PIPE_CAP_CLIP_PLANES have to use in
place of rasterizer->clip_planes_enabled.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9815>
2021-03-26 20:51:18 +00:00
Danylo Piliaiev 2bff8fd53b nir: add nir_shader_as_str function
It would be later used by Turnip in implementation of
VK_KHR_pipeline_executable_properties.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8877>
2021-03-25 13:53:33 +00:00
Jesse Schwartzentruber 02492bea5f glcpp: Fix undefined behaviour in glcpp
Specifically, fix this error (which is covered in existing tests):

    ../src/compiler/glsl/glcpp/pp.c:198:28: runtime error: applying non-zero offset 1 to null pointer
    SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior ../src/compiler/glsl/glcpp/pp.c:198:28 in

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9669>
2021-03-25 00:23:43 +00:00
Mike Blumenkrantz 674132dee8 compiler/spirv: use undefs when extending image coords
we need 4 components for the nir ops, but swizzling one value to multiple
channels like this gets confusing when trying to debug image ops that don't
require 4 channels

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9723>
2021-03-24 19:07:19 +00:00
Mike Blumenkrantz 6900498faa nir: add nir_lower_indirect_builtin_uniform_derefs()
this is a special version of indirect deref lowering which is used by
mesa/st to remove dynamic indexing from builtin uniforms for the lowering
pass in non-packed uniform case

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9741>
2021-03-23 14:44:48 +00:00
Gert Wollny 318701b803 nir: Add r600 specific sin and cos variants
r600 expect the input values to be normalited by divinding by 2 *PI, so
add an opcode to be able to lower this in nir.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
2021-03-22 15:19:46 +01:00
Gert Wollny 0f5b3c37c5 nir: Add opcodes for fused comp + csel and optimizations
Some backends, like r600 support a fused version of int and float compare
against zero and and csel. Adding these opcodes here makes it possible to
optimize this in nir.

v2: Add rules for float compare + csel

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
2021-03-22 15:19:46 +01:00
Gert Wollny a5747f8ab3 nir: add opcodes for *find_msb_rev and lowering
Some hardware supports a version of find_msb where the bits are counted
starting at the high bit, and this needs some lowering to obtain the
value that is expected by *find_msb

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
2021-03-22 15:19:46 +01:00
Dave Airlie 48080e5bdf nir: lower 64-bit floats to 32-bit first.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
2021-03-22 12:17:14 +10:00
Dave Airlie 01dfd65a2d nir: port fp16 casting code from dxil
This moves the dxil pass to common code and makes dxil
use the new code.

Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
2021-03-22 12:16:59 +10:00
Jesse Natalie 55d153b9f5 nir: Temporarily disable optimizations for MSVC ARM64
There's currently an MSVC optimizer bug which causes a stack overflow
in the compiler if it attempts to optimize fsat.

Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9700>
2021-03-21 21:41:41 +00:00
Jose Fonseca 6e6cd7d93c scons: Remove.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9720>
2021-03-20 10:38:55 +00:00
Michel Dänzer 5057f14cba Revert "glsl/test: Don't run whitespace tests in parallel"
This reverts commit c60cea0daa.

Didn't have the intended effect, and slowed down the meson test run.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9528>
2021-03-19 08:50:38 +00:00
Michel Dänzer d8911a0ae8 Revert "meson: add enable-glcpp-tests option"
This reverts commit f9ae947e72.

Not needed anymore.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9528>
2021-03-19 08:50:38 +00:00
Michel Dänzer 7fedf51b95 glsl/tests: Use exit code 126 to detect valgrind errors
valgrind returns exit code 126 if it can't write to the file passed to
--log-file. Hopefully it'll be the same for any other invalid valgrind
command line parameters or internal errors as well.

Using a different exit code (31) for this was hiding the fact that the
valgrind test wasn't actually working.

v2:
* Use exit code 126; can't treat any non-0 exit code as failure because
  glcpp is expected to exit with non-0 for some of the input we feed it

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9528>
2021-03-19 08:50:38 +00:00
Michel Dänzer 4cc8c25d56 glsl/tests: Don't use tempfiles
Use pipes for direct communication between child & parent process.

Using tempfiles sometimes resulted in hitting the meson timeout if there
was high filesystem pressure (I saw a single unlink system call take as
long as 4 seconds; attempts to re-use a single tempfile just shifted the
delays to truncate/close systems calls).

As a bonus, this gets the valgrind test actually working as intended.
It wasn't working because the tempfile passed to --log-file didn't exist
(due to the earlier os.close(fd)?).

v2:
* Wrap .read() in "with open()" (Dylan Baker)

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9528>
2021-03-19 08:50:37 +00:00
Michel Dänzer deb654cdd0 glsl/tests: Bump glcpp valgrind test timeout to 240 seconds
Once it's actually working as intended again, it may need that much
time.

v2:
* Bump to 240 seconds, still hit timeouts with 180.
* Don't change test priority.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9528>
2021-03-19 08:50:37 +00:00
Michel Dänzer 37855fd59d glcpp: Fully initialize struct gl_context
valgrind flagged members of gl_ctx->Extensions being used uninitialized:

==23417== Conditional jump or move depends on uninitialised value(s)
==23417==    at 0x112642: _glcpp_parser_handle_version_declaration.part.0 (glcpp-parse.y:2493)
==23417==    by 0x11A515: glcpp_lex_update_state_per_token (glcpp-lex.l:132)
==23417==    by 0x11A515: glcpp_lex (glcpp-lex.l:547)
==23417==    by 0x114D46: glcpp_parser_lex (glcpp-parse.y:2302)
==23417==    by 0x114D46: glcpp_parser_parse (glcpp-parse.c:1871)
==23417==    by 0x11ADC6: glcpp_preprocess (pp.c:238)
==23417==    by 0x111384: main (glcpp.c:174)
==23417==  Uninitialised value was created by a stack allocation
==23417==    at 0x111295: main (glcpp.c:136)

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9528>
2021-03-19 08:50:37 +00:00
Timothy Arceri 4feb26f647 glsl: add compilation errors for attribute and varying qualifiers
These qualifiers were removed in GLSL 4.20 and GLSL ES 3.00. For
desktop GL they are now only allowed if the shader is declared as
a compatibility shader.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9552>
2021-03-19 01:13:17 +00:00
Mike Blumenkrantz 50881d59e6 compiler/spirv: fix image sample queries
this was only implemented for textures (I assume because drivers which implement
the corresponding intrinsic don't support multisampled images), but it's also
used for shader images

Fixes: 22fdb2f855 ("nir/spirv: Update to the latest revision")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9682>
2021-03-18 14:16:35 +00:00
Jason Ekstrand a572471edc spirv: Add support for SPV_EXT_shader_atomic_float_min_max
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8750>
2021-03-18 00:13:40 +00:00
Jason Ekstrand 1ba9c262fd nir: Add image atomic_fmin/fmax intrinsics
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8750>
2021-03-18 00:13:40 +00:00
Caio Marcelo de Oliveira Filho 302183d635 nir: Handle deref_atomic_fadd in a couple of passes
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8750>
2021-03-18 00:13:40 +00:00
Caio Marcelo de Oliveira Filho ba8ef1df9b spirv: Update headers and metadata from latest Khronos commit
This corresponds to bcf55210f13a4fa3c3d0963b509ff1070e434c79
("Merge pull request #178 from orbea/datadir") in
https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8750>
2021-03-18 00:13:40 +00:00
Jason Ekstrand 4079279051 anv/apply_pipeline_layout: Add support for A64 descriptor access
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8635>
2021-03-17 17:49:59 +00:00
Jason Ekstrand c8748771bb nir/lower_io: Support global addresses for UBOs in nir_lower_explicit_io
For nir_address_format_64bit_global_32bit_offset and
nir_address_format_64bit_bounded_global, we use a new intrinsics which
take the base address and offset as separate parameters.  For bounds-
checked access, the bound is also included in the intrinsic.  This gives
the drive more control over the bounds checking so that UBOs don't
suddenly become massively more expensive.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8635>
2021-03-17 17:49:59 +00:00
Jason Ekstrand 93a3f18719 nir: Add a new 64+32-bit address format
This is a global address format where you have a 64-bit base pointer and
a 32-bit offset.  It's intentionally identical to 64bit_bounded_global
except nir_lower_explicit_io does no bounds checking with it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8635>
2021-03-17 17:49:59 +00:00
Jason Ekstrand 1ce3660a5a intel/fs,rt: Add a predicate to load_global_const_block
This allows us to do bounds checked A64 block load without the it being
counted as control-flow by NIR.  This means that NIR optimizations like
CSE will be able to work on these the same as a regular load.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8635>
2021-03-17 17:49:58 +00:00
Timur Kristóf 4c5c610f1d nir: Add AMD-specific Geometry Shader related intrinsics.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf 38df949f98 nir: Add tessellation related AMD-specific intrinsics.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf 744dc74078 nir: Add nir_opt_offsets to fold const adds into load/store offsets.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf eee3435757 nir: Add AMD-specific buffer load/store intrinsics.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf c2a81ebe19 nir: Add default unsigned upper bound configuration.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf 8ebb8d31af nir: Add unsigned upper bound for TCS load_invocation_id.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf 9fbfafb57a nir: Shrink vectors for load_shared.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf 084863bb5d nir: Fix unsigned upper bound of local_invocation_index for non-CS stages.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf 132171dc4e nir: Add a few more algebraic optimizations to help address calculation.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf 9f9b0f583b nir: Add nir_builder helper for I/O address offset calculations.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Timur Kristóf f6f68d5cf1 nir: Add new nir_builder helpers for iadd with no_unsigned_wrap.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Rhys Perry 5bc42ce579 nir: Don't update base in vectorize_loads()
The offset is already updated with consideration to the base above under
"/* update the offset */".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
2021-03-17 12:42:23 +00:00
Iago Toral Quiroga f29de817eb compiler/glsl: call util_cpu_detect from glsl_type_singleton_init_or_ref
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Closes: #4393
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9457>
2021-03-17 08:15:36 +01:00
Hyunjun Ko d82b58c03e nir: Set access at lower_ubo_vec4
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9125>
2021-03-17 01:09:30 +00:00
Timothy Arceri 684f97de80 glsl: fix declarations of gl_MaxVaryingFloats
gl_MaxVaryingFloats was not removed from core until 4.20 and is still
available in compat shaders. Found while writing some new CTS to test
the correct declarations of this constant.

Fixes: 0ebf4257a385i ("glsl: define some GLES3 constants in GLSL 4.1")

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9514>
2021-03-12 04:30:32 +00:00
Ian Romanick da7389eced nir/range_analysis: Simplify analysis of bcsel
union_ranges was previously guarded by 'ifndef NDEBUG'.  After removing
that, I noticed that the two tables were identical.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>
2021-03-11 22:00:30 +00:00
Ian Romanick 7019cd84c0 nir/search: Use range analysis for is_finite
There are only a couple patterns that use is_finite, so the changes
aren't huge.  Mostly shaders from Batman Arkham City and a few shaders
from Shadow of the Tomb Raider were affected.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Tiger Lake
Instructions in all programs: 160902591 -> 160902489 (-0.0%)
SENDs in all programs: 6812270 -> 6812270 (+0.0%)
Loops in all programs: 38225 -> 38225 (+0.0%)
Cycles in all programs: 7429003266 -> 7428992369 (-0.0%)
Spills in all programs: 192582 -> 192582 (+0.0%)
Fills in all programs: 304539 -> 304539 (+0.0%)

Ice Lake
Instructions in all programs: 145301634 -> 145301460 (-0.0%)
SENDs in all programs: 6863890 -> 6863890 (+0.0%)
Loops in all programs: 38219 -> 38219 (+0.0%)
Cycles in all programs: 8798589772 -> 8798575869 (-0.0%)
Spills in all programs: 216880 -> 216880 (+0.0%)
Fills in all programs: 334250 -> 334250 (+0.0%)

Skylake
Instructions in all programs: 135892010 -> 135891836 (-0.0%)
SENDs in all programs: 6802916 -> 6802916 (+0.0%)
Loops in all programs: 38216 -> 38216 (+0.0%)
Cycles in all programs: 8442597324 -> 8442583202 (-0.0%)
Spills in all programs: 194839 -> 194839 (+0.0%)
Fills in all programs: 301116 -> 301116 (+0.0%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>
2021-03-11 22:00:30 +00:00
Ian Romanick f4a7dbc58f nir/range_analysis: Fix analysis of fmin, fmax, or fsat with NaN source
Recall that when either value is NaN, fmax will pick the other value.
This means the result range of the fmax will either be the "ideal"
result range (calculated above) or the range of the non-NaN value.

Previously, something like fmax({gt_zero}, {lt_zero, is_a_number}) would
return a range of gt_zero.  However, if the "gt_zero" parameter is NaN,
the actual result will be the "lt_zero" parameter.

This analysis depends on the is_a_number analysis also added in this MR.
Assuming this doesn't cause any unforeseen problems, I believe we should
wait a bit, then nominate a subset of the series for the stable
branches.

This fixes the piglit tests

    tests/spec/glsl-1.30/execution/range_analysis_fmax_of_nan.shader_test
    tests/spec/glsl-1.30/execution/range_analysis_fmin_of_nan.shader_test

from https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/463.

Even with the added fsat fixes, range_analysis_fsat_of_nan.shader_test
still fails.  There are some other issues there that will be addressed
in later commits (in another MR).

v2: Add fsat fixes.  Suggested by Rhys.

Fixes: 405de7ccb6 ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Shader-db results:

All Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 21049290 -> 21049314 (<.01%)
instructions in affected programs: 3175 -> 3199 (0.76%)
helped: 0
HURT: 17
HURT stats (abs)   min: 1 max: 3 x̄: 1.41 x̃: 1
HURT stats (rel)   min: 0.20% max: 1.89% x̄: 0.97% x̃: 0.92%
95% mean confidence interval for instructions value: 1.09 1.73
95% mean confidence interval for instructions %-change: 0.75% 1.19%
Instructions are HURT.

total cycles in shared programs: 855136176 -> 855136406 (<.01%)
cycles in affected programs: 37579 -> 37809 (0.61%)
helped: 0
HURT: 17
HURT stats (abs)   min: 12 max: 20 x̄: 13.53 x̃: 14
HURT stats (rel)   min: 0.17% max: 1.13% x̄: 0.79% x̃: 0.91%
95% mean confidence interval for cycles value: 12.53 14.53
95% mean confidence interval for cycles %-change: 0.63% 0.94%
Cycles are HURT.

Fossil-db results:

Tiger Lake
Instructions in all programs: 160901033 -> 160902591 (+0.0%)
SENDs in all programs: 6812270 -> 6812270 (+0.0%)
Loops in all programs: 38225 -> 38225 (+0.0%)
Cycles in all programs: 7430016795 -> 7429003266 (-0.0%)
Spills in all programs: 192582 -> 192582 (+0.0%)
Fills in all programs: 304539 -> 304539 (+0.0%)

Ice Lake
Instructions in all programs: 145299102 -> 145301634 (+0.0%)
SENDs in all programs: 6863890 -> 6863890 (+0.0%)
Loops in all programs: 38219 -> 38219 (+0.0%)
Cycles in all programs: 8798390846 -> 8798589772 (+0.0%)
Spills in all programs: 216880 -> 216880 (+0.0%)
Fills in all programs: 334250 -> 334250 (+0.0%)

Skylake
Instructions in all programs: 135889478 -> 135892010 (+0.0%)
SENDs in all programs: 6802916 -> 6802916 (+0.0%)
Loops in all programs: 38216 -> 38216 (+0.0%)
Cycles in all programs: 8442624166 -> 8442597324 (-0.0%)
Spills in all programs: 194839 -> 194839 (+0.0%)
Fills in all programs: 301116 -> 301116 (+0.0%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>
2021-03-11 22:00:30 +00:00
Ian Romanick aa5d38decd nir/range_analysis: Add "is a number" range analysis tracking
This commit is necessary to support "nir/range_analysis: Fix analysis of
fmin and fmax with NaN".

No shader-db or fossil-db changes on any Intel platform.

v2: Pack and unpack is_a_number.

v3: Don't set is_a_number of integer constants.  The bit pattern might
be NaN.

v4: Update handling of b2i32.  intBitsToFloat(int(true)) is
1.401298464324817e-45.  Return a value consistent with that.

Fixes: 405de7ccb6 ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>
2021-03-11 22:00:30 +00:00
Ian Romanick d4f21b53f2 nir/range_analysis: Add "is finite" range analysis tracking
The obvious changes to nir_search_helpers.h are in a separate commit to
limit the scope of this change.  These additions are really only needed
to support the next commit "nir/range_analysis: Add "is a number" range
analysis tracking".  This reduction in scope is intended to increase the
suitability for stable branches.

No shader-db or fossil-db changes on any Intel platform.

v2: Pack and unpack is_finite.

v3: Split nir_search_helpers.h changes into a separate commit.

v4: Remove assertion intended for the next commit.  Update is_finite
comment for fsign.  Both noticed by Rhys.  Fix is_finite handling for
load_const vectors.  If any element is not finite, set the flag to
false.  This is the same way is_integral is already handled.

v5: Update handling of b2i32.  intBitsToFloat(int(true)) is
1.401298464324817e-45.  Return a value consistent with that.

Fixes: 405de7ccb6 ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>
2021-03-11 22:00:30 +00:00
Ian Romanick 86fb53b1be nir/range_analysis: Refactor fsat handling
This will greatly simplify a later commit.  The assert(r.is_integral) in
the eq_zero case is dropped because I don't think it's useful anymore.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9108>
2021-03-11 22:00:30 +00:00
Pierre Moreau 4a408ff7ea spirv: Ignore WorkgroupSize in non-compute stages
If a SPIR-V module contains for example both a geometry and a compute
shader, when processing the geometry shader its vertices out, input
primitive and output primitive attributes would get overwritten by the
value of the WorkgroupSize.

```
; SPIR-V
; Version: 1.5
; Generator: Khronos; 17
; Bound: 12
; Schema: 0
               OpCapability Geometry
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Geometry %main "main"
               OpEntryPoint GLCompute %main_0 "main"
               OpExecutionMode %main InputPoints
               OpExecutionMode %main Invocations 1
               OpExecutionMode %main OutputTriangleStrip
               OpExecutionMode %main OutputVertices 4
               OpExecutionMode %main_0 LocalSize 1 1 1
               OpSource GLSL 460
               OpSource GLSL 460
               OpName %main "main"
               OpName %main_0 "main"
               OpModuleProcessed "Linked by SPIR-V Tools Linker"
               OpDecorate %gl_WorkGroupSize BuiltIn WorkgroupSize
       %void = OpTypeVoid
          %6 = OpTypeFunction %void
       %uint = OpTypeInt 32 0
     %v3uint = OpTypeVector %uint 3
     %uint_1 = OpConstant %uint 1
%gl_WorkGroupSize = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
       %main = OpFunction %void None %6
         %10 = OpLabel
               OpReturn
               OpFunctionEnd
     %main_0 = OpFunction %void None %6
         %11 = OpLabel
               OpReturn
               OpFunctionEnd
```

Running spirv_to_nir on the SPIR-V sample above and for the geometry
entry point would say that (among others):

* vertices out: 1
* input primitive: LINES
* output primitive: LINES

By removing any reference to `%gl_WorkGroupSize`, the output would
change to (among others):

* vertices out: 4
* input primitive: POINTS
* output primitive: TRIANGLE_STRIP

Fixes: 7d862ef530 ("spirv: Rework handling of spec constant workgroup size built-ins")

v2:
* Move the check from inside `handle_workgroup_size_decoration_cb()` to
  its caller (Caio Marcelo de Oliveira Filho )
* Add an assert on the shader stage before using
  `workgroup_size_builtin` (Caio Marcelo de Oliveira Filho )

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9418>
2021-03-11 20:30:38 +00:00
Timothy Arceri 1772569449 Revert "glsl: default to compat shaders in compat profile"
This reverts commit 6c8cc9be12.

A spec bug was resolved confirming the original behaviour. Also it
seems the game Foundation no longer depends on the incorrect
behaviour.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9486>
2021-03-11 04:09:49 +00:00
Marek Vasut b19f1dc7d6 compiler/nir: Increment shader input count and mark as used when adding new gl_PointCoord
In case a new gl_PointCoord shader input is created, increment shader
input count and set valid driver_location to the new input variable,
otherwise the input gets aliased to input 0 and shows up in NIR_PRINT
output as whatever shader input 0 is instead of gl_PointCoord. Also
set the input as used, otherwise it might get removed.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9214>
2021-03-09 21:24:35 +00:00
Dave Airlie 8027a7ba8a shader_info: convert textures_used to a bitset.
For now keep it a bitset of 1 32-bit dword.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9456>
2021-03-10 06:16:09 +10:00
Dave Airlie 0e1afe7c70 util/panfrost/glsl: rename BITSET_LAST_BIT to BITSET_LAST_BIT_SIZED
The current users all pass in the number of dwords, but I'd like
to provide an interface that doess ARRAY_SIZE implicitly.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9456>
2021-03-10 06:15:50 +10:00
Jesse Natalie ef0d2a5b4b nir: Add a nir_after_instr_and_phis helper
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9464>
2021-03-09 01:41:32 +00:00
Caio Marcelo de Oliveira Filho a41c3ed384 spirv: Update a couple of comments in variable handling
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9440>
2021-03-08 20:23:28 +00:00
Caio Marcelo de Oliveira Filho 3a7bb38b70 spirv: Explicitly break when finished handling SpvDecorationBuiltIn
When tyding up this section in 1e5b09f42f ("spirv: Tidy some repeated
if checks by using a switch statement.") the break got lost.  It is
not a real problem because the next case just break, but better to
have it explicitly here instead of a FALLTHROUGH.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9440>
2021-03-08 20:23:28 +00:00
Caio Marcelo de Oliveira Filho 94d2a51453 spirv: Reuse nir_is_per_vertex_io()
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9440>
2021-03-08 20:23:28 +00:00
Jason Ekstrand e20e85f01e nir: Make nir_ssa_def_rewrite_uses_after take an SSA value
This replaces the new_src parameter of nir_ssa_def_rewrite_uses_after()
with an SSA def, and rewrites all the users as needed.

Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
2021-03-08 16:59:55 +00:00
Jason Ekstrand 117668b811 nir: Make nir_ssa_def_rewrite_uses take an SSA value
This commit replaces the new_src parameter of nir_ssa_def_rewrite_uses()
with an SSA def, removes nir_ssa_def_rewrite_uses_ssa(), and rewrites
all the users as needed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
2021-03-08 16:59:55 +00:00
Jason Ekstrand 13a0ee8a51 nir: Add and use a new nir_ssa_def_rewrite_uses_src helper
This is currently an alias for nir_ssa_def_rewrite_uses but we move all
the instances which used it to write a non-SSA source to the newly named
helper.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
2021-03-08 16:59:55 +00:00
Alyssa Rosenzweig e30994a471 nir/lower_viewport_transform: Allow geom/tess
This pass needs to run on the last shader in a pipeline writing
gl_Position. In GLES2, that's always the vertex shader, but in ES3.2, it
can be a geometry or tessellation shader. The shared code works the same
in this case, just make the assert more generous.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9444>
2021-03-07 17:57:04 +00:00
Ian Romanick 2c4fd24c01 nir/algebraic: Apply addition property of equality to the other ordering too
Inequality comparison operations are not commutative, so `foo < bar` and
`bar < foo` both have to be explicitly listed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

All Intel GPUs had similar results. (Ice Lake shown)
total instructions in shared programs: 20027051 -> 20026899 (<.01%)
instructions in affected programs: 37181 -> 37029 (-0.41%)
helped: 85
HURT: 0
helped stats (abs) min: 1 max: 20 x̄: 1.79 x̃: 1
helped stats (rel) min: 0.05% max: 6.78% x̄: 0.92% x̃: 0.68%
95% mean confidence interval for instructions value: -2.42 -1.15
95% mean confidence interval for instructions %-change: -1.23% -0.61%
Instructions are helped.

total cycles in shared programs: 979762793 -> 979753527 (<.01%)
cycles in affected programs: 2653905 -> 2644639 (-0.35%)
helped: 104
HURT: 50
helped stats (abs) min: 1 max: 1048 x̄: 119.99 x̃: 11
helped stats (rel) min: <.01% max: 9.88% x̄: 0.77% x̃: 0.20%
HURT stats (abs)   min: 1 max: 734 x̄: 64.26 x̃: 8
HURT stats (rel)   min: <.01% max: 3.06% x̄: 0.36% x̃: 0.10%
95% mean confidence interval for cycles value: -98.65 -21.68
95% mean confidence interval for cycles %-change: -0.66% -0.15%
Cycles are helped.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9374>
2021-03-04 22:50:53 +00:00
Ian Romanick 33031bdab6 nir/algebraic: Apply addition property of equality more conservatively
This allows a lot more CSE.  Depending on where the addition and the
comparison are scheduled, it may also reduce register pressure by
reducing the live range of the addends.

Across all the platforms, the shaders affected for spills or fills were
all fragment shaders from Dirt Rally.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Tiger Lake and Ice Lake had similar results. (Tiger Lake shown)
total instructions in shared programs: 21043103 -> 21038804 (-0.02%)
instructions in affected programs: 892878 -> 888579 (-0.48%)
helped: 1549
HURT: 724
helped stats (abs) min: 1 max: 225 x̄: 4.14 x̃: 2
helped stats (rel) min: 0.05% max: 11.18% x̄: 1.04% x̃: 0.78%
HURT stats (abs)   min: 1 max: 71 x̄: 2.93 x̃: 1
HURT stats (rel)   min: 0.07% max: 6.90% x̄: 0.80% x̃: 0.56%
95% mean confidence interval for instructions value: -2.33 -1.45
95% mean confidence interval for instructions %-change: -0.50% -0.40%
Instructions are helped.

total cycles in shared programs: 855054155 -> 855757566 (0.08%)
cycles in affected programs: 58275918 -> 58979329 (1.21%)
helped: 1213
HURT: 1680
helped stats (abs) min: 1 max: 107405 x̄: 1684.00 x̃: 10
helped stats (rel) min: <.01% max: 38.09% x̄: 1.51% x̃: 0.25%
HURT stats (abs)   min: 1 max: 126632 x̄: 1634.59 x̃: 12
HURT stats (rel)   min: <.01% max: 85.91% x̄: 2.75% x̃: 0.49%
95% mean confidence interval for cycles value: -98.06 584.35
95% mean confidence interval for cycles %-change: 0.71% 1.22%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 9843 -> 9771 (-0.73%)
spills in affected programs: 72 -> 0
helped: 5
HURT: 0

total fills in shared programs: 9600 -> 9451 (-1.55%)
fills in affected programs: 149 -> 0
helped: 5
HURT: 0

LOST:   14
GAINED: 9

Skylake
total instructions in shared programs: 18185074 -> 18183866 (<.01%)
instructions in affected programs: 575180 -> 573972 (-0.21%)
helped: 1286
HURT: 468
helped stats (abs) min: 1 max: 15 x̄: 1.55 x̃: 1
helped stats (rel) min: 0.03% max: 4.08% x̄: 0.67% x̃: 0.65%
HURT stats (abs)   min: 1 max: 8 x̄: 1.69 x̃: 1
HURT stats (rel)   min: 0.13% max: 7.69% x̄: 0.87% x̃: 0.45%
95% mean confidence interval for instructions value: -0.77 -0.60
95% mean confidence interval for instructions %-change: -0.30% -0.22%
Instructions are helped.

total cycles in shared programs: 960518105 -> 960608234 (<.01%)
cycles in affected programs: 42536073 -> 42626202 (0.21%)
helped: 1210
HURT: 1714
helped stats (abs) min: 1 max: 7015 x̄: 123.41 x̃: 10
helped stats (rel) min: <.01% max: 33.76% x̄: 1.32% x̃: 0.26%
HURT stats (abs)   min: 1 max: 14474 x̄: 139.71 x̃: 14
HURT stats (rel)   min: <.01% max: 58.94% x̄: 2.00% x̃: 0.44%
95% mean confidence interval for cycles value: 4.02 57.63
95% mean confidence interval for cycles %-change: 0.43% 0.82%
Cycles are HURT.

LOST:   16
GAINED: 42

Broadwell
total instructions in shared programs: 17856880 -> 17852158 (-0.03%)
instructions in affected programs: 564836 -> 560114 (-0.84%)
helped: 1243
HURT: 418
helped stats (abs) min: 1 max: 115 x̄: 4.36 x̃: 1
helped stats (rel) min: 0.03% max: 9.67% x̄: 0.90% x̃: 0.67%
HURT stats (abs)   min: 1 max: 8 x̄: 1.67 x̃: 1
HURT stats (rel)   min: 0.14% max: 7.69% x̄: 0.89% x̃: 0.46%
95% mean confidence interval for instructions value: -3.45 -2.23
95% mean confidence interval for instructions %-change: -0.51% -0.38%
Instructions are helped.

total cycles in shared programs: 1031140321 -> 1029856892 (-0.12%)
cycles in affected programs: 66986946 -> 65703517 (-1.92%)
helped: 1084
HURT: 1653
helped stats (abs) min: 1 max: 415168 x̄: 1835.32 x̃: 10
helped stats (rel) min: <.01% max: 57.16% x̄: 1.19% x̃: 0.28%
HURT stats (abs)   min: 1 max: 43930 x̄: 427.14 x̃: 12
HURT stats (rel)   min: <.01% max: 57.53% x̄: 1.32% x̃: 0.39%
95% mean confidence interval for cycles value: -915.76 -22.07
95% mean confidence interval for cycles %-change: 0.17% 0.47%
Inconclusive result (value mean confidence interval and %-change mean confidence interval disagree).

total spills in shared programs: 20891 -> 20335 (-2.66%)
spills in affected programs: 1567 -> 1011 (-35.48%)
helped: 70
HURT: 0

total fills in shared programs: 27307 -> 25905 (-5.13%)
fills in affected programs: 5381 -> 3979 (-26.05%)
helped: 71
HURT: 0

LOST:   17
GAINED: 20

Haswell
total instructions in shared programs: 16411850 -> 16409414 (-0.01%)
instructions in affected programs: 602666 -> 600230 (-0.40%)
helped: 1152
HURT: 781
helped stats (abs) min: 1 max: 103 x̄: 3.59 x̃: 1
helped stats (rel) min: 0.03% max: 8.61% x̄: 0.85% x̃: 0.65%
HURT stats (abs)   min: 1 max: 41 x̄: 2.18 x̃: 1
HURT stats (rel)   min: 0.12% max: 7.69% x̄: 0.88% x̃: 0.69%
95% mean confidence interval for instructions value: -1.74 -0.78
95% mean confidence interval for instructions %-change: -0.21% -0.10%
Instructions are helped.

total cycles in shared programs: 1035338781 -> 1036977801 (0.16%)
cycles in affected programs: 68961096 -> 70600116 (2.38%)
helped: 1246
HURT: 2206
helped stats (abs) min: 1 max: 392022 x̄: 1040.28 x̃: 14
helped stats (rel) min: <.01% max: 56.44% x̄: 2.32% x̃: 0.38%
HURT stats (abs)   min: 1 max: 68630 x̄: 1330.56 x̃: 18
HURT stats (rel)   min: <.01% max: 69.97% x̄: 3.31% x̃: 0.61%
95% mean confidence interval for cycles value: 90.43 859.17
95% mean confidence interval for cycles %-change: 1.02% 1.54%
Cycles are HURT.

total spills in shared programs: 17805 -> 17457 (-1.95%)
spills in affected programs: 1202 -> 854 (-28.95%)
helped: 34
HURT: 31

total fills in shared programs: 20939 -> 20387 (-2.64%)
fills in affected programs: 2702 -> 2150 (-20.43%)
helped: 34
HURT: 31

LOST:   24
GAINED: 45

Ivy Bridge and earlier Intel GPUs had similar results. (Ivy Bridge shown)
total instructions in shared programs: 15515912 -> 15516757 (<.01%)
instructions in affected programs: 396569 -> 397414 (0.21%)
helped: 578
HURT: 858
helped stats (abs) min: 1 max: 9 x̄: 1.32 x̃: 1
helped stats (rel) min: 0.04% max: 3.70% x̄: 0.65% x̃: 0.65%
HURT stats (abs)   min: 1 max: 11 x̄: 1.87 x̃: 1
HURT stats (rel)   min: 0.08% max: 12.90% x̄: 0.95% x̃: 0.53%
95% mean confidence interval for instructions value: 0.47 0.70
95% mean confidence interval for instructions %-change: 0.24% 0.37%
Instructions are HURT.

total cycles in shared programs: 584395455 -> 584466352 (0.01%)
cycles in affected programs: 20346570 -> 20417467 (0.35%)
helped: 1192
HURT: 1896
helped stats (abs) min: 1 max: 4108 x̄: 123.27 x̃: 14
helped stats (rel) min: <.01% max: 37.20% x̄: 2.27% x̃: 0.46%
HURT stats (abs)   min: 1 max: 3698 x̄: 114.89 x̃: 19
HURT stats (rel)   min: <.01% max: 70.28% x̄: 3.02% x̃: 0.71%
95% mean confidence interval for cycles value: 10.75 35.16
95% mean confidence interval for cycles %-change: 0.73% 1.23%
Cycles are HURT.

LOST:   20
GAINED: 12
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9374>
2021-03-04 22:50:53 +00:00
Gert Wollny 81b41e0c76 nir: Add r600 specific intrinsic for loading the tesselation coords
Only the XY pair is provided directly, the Z value has to be deducted
from the primitive type.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9373>
2021-03-04 09:14:03 +00:00
Ian Romanick c393ae9d84 nir/search: Constify instruction parameter to search helpers
The search helps must *never* modify the instruction passed in, so let
the compiler enforce this.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9378>
2021-03-03 18:32:14 +00:00
Rhys Perry cbb5ed476c nir/opt_shrink_vectors: add option to skip shrinking image stores
Some games declare the wrong format, so we might want to disable this
optimization in that case.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: e4d75c22 ("nir/opt_shrink_vectors: shrink image stores using the format")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9229>
2021-03-03 14:18:37 +00:00
Eric Anholt 8bd0cc1a5a nir/vec_to_movs: Don't generate MOVs for undef channels.
This appeared in softpipe's image operations, since NIR always uses
4-component values for the coords, while the GLSL IR only has 2 components
for a 2D image (for example).
arb_shader_image_load_store-shader-mem-barrier (which times out in CI and
spends its time inside of tgsi_exec) was spending 4/51 of its instructions
on moving these undefs around.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9345>
2021-03-03 00:51:44 +00:00
Eric Anholt 1e5ef4c60c nir: Add a nir_src_is_undef() helper, like nir_src_is_const().
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9345>
2021-03-03 00:51:44 +00:00
Gert Wollny 935d9e6863 nir: disaallow reordering for r600 shared load and remove component field
The original shared load op can't be reordered, so it might be better to
also not allow this for the lowered variant.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9330>
2021-03-02 18:46:17 +01:00
Kenneth Graunke a48151ffad glsl/float64: Bump #version to 400
An earlier commit tried to make this shader compatible with GLSL 3.30,
but it requires, GL_ARB_gpu_shader_int64, which requires GLSL 4.00 and
GL 4.0 according to the extension spec.  So we were failing to enable
the required extension, breaking compilation of this shader.

The original intention of that patch was to get this working on zink,
which at the time only supported GL 3.3.  But now it supports later
OpenGL versions, so we don't need to do this any longer.  Rather than
revert the patch and raise the version all the way back to 430, just
bump it to the require 400 at Ian Romanick's suggestion.

Fixes: 4d47b22bf0 ("glsl/float64: make this compatible with glsl 330")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3991
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9351>
2021-03-02 09:30:24 +00:00
Timothy Arceri 7186da8e38 util/disk_cache: move cache tests to the util directory
The cache has been detangled from glsl and used outside it (with Vulkan drivers)
for years now.

This also cleans up the dependancies in the build file. The test doesn't
depend on the glsl lib but rather the util lib.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9327>
2021-03-02 02:39:05 +00:00
Rhys Perry 812dd9c9f6 nir/copy_prop: use nir_{instr,if}_rewrite_{src,condition}_ssa
Compile-time (nir_copy_prop):
Difference at 95.0% confidence
	-2470.88 +/- 19.8762
	-35.7461% +/- 0.247259%
	(Student's t, pooled s = 23.4747)

Compile-time (overall):
Difference at 95.0% confidence
	-2175.72 +/- 178.786
	-1.73627% +/- 0.140826%
	(Student's t, pooled s = 211.155)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8784>
2021-03-01 17:38:10 +00:00
Rhys Perry c2209d836c nir/copy_prop: visit copies instead of sources
There are less copy instructions than sources, so instead of visiting each
source and rewriting it if it's uses a copy instruction, visit each copy
instruction and rewrite it's users.

Besides improving compile time, this also has a side effect of fixing a
rare situation where copy-propagation does not happen:
loop {
   a = phi ..., b
   c = vec ...
   b = mov c.y
}
It might have been the case that a phi source could not be rewritten until
the copy was visited later.

Compile-time (nir_copy_prop):
Difference at 95.0% confidence
	-2613.13 +/- 15.2094
	-27.4333% +/- 0.150247%
	(Student's t, pooled s = 17.963)

Comple-time (overall):
Difference at 95.0% confidence
	-2627.89 +/- 201.557
	-2.05404% +/- 0.156221%
	(Student's t, pooled s = 238.048)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8784>
2021-03-01 17:38:10 +00:00
Rhys Perry 41125bff4f nir/copy_prop: remove unused copies
These were hurting performance of other passes.

Compile-time (overall):
Difference at 95.0% confidence
	-5496.3 +/- 219.752
	-4.11912% +/- 0.160285%
	(Student's t, pooled s = 259.538)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8784>
2021-03-01 17:38:10 +00:00
Rhys Perry ed9c3c4f19 nir: add nir_ssa_def_is_unused()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8784>
2021-03-01 17:38:10 +00:00
Rhys Perry f66a7240f9 nir: fix build at -O1
At -O1 with GCC 10.2.1, _nir_visit_dest_indirect (declared ALWAYS_INLINE)
will fail to inline if it's caller (nir_foreach_dest) is not inlined,
because _nir_visit_dest_indirect is passed as a function pointer. This
results in a compilation error.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Fixes: 336bcbacd0 ("nir: inline nir_foreach_{src,dest}")
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4353
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9301>
2021-02-26 21:54:53 +00:00
Rob Clark a9618e7c42 util: Add accessor for util_cpu_caps
In release builds, there should be no change, but in debug builds the
assert will help us catch undefined behavior resulting from using
util_cpu_caps before it is initialized.

With fix for u_half_test for MSVC from Jesse Natalie squashed in.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9266>
2021-02-26 18:31:19 +00:00
Gert Wollny e5db9c3dd4 nir: Add r600 specific CUBE opcode to evaluate cube texture coords and
face

The opcode evaluates tha unnormalized coordinates, the length of the
major axis, and the cube face.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9200>
2021-02-26 09:51:37 +01:00
Gert Wollny 4f4e1e5ed9 nir: Add flag to tex instruction to indicate lowering cube to array
E.g. r600 a cube texture lookup uses a specific cube instruction
to evaluate the sample coordinates and the face ID, so that the cube
texture lookup can be lowered to a array texture lookup, thereby sharing
the code with the 2D array texture lopkup.
However, for TXD the given gradients still need to be three-component
vectors, so add a flag that the NIR validation knows that we deal with
cube texture that was lowered to an array and can validate accordingly.

v2: Handle new flag in serialization (Marek)
v3: Rebase so that the change does not require the patch to deduct the
    number of offset and grad components from sampler type

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9200>
2021-02-26 09:51:37 +01:00
Vinson Lee 7b934d1ecd nir/lower_tex: Change coord type to int.
nir_tex_instr_src_index returns an int.

Fix defect reported by Coverity Scan.

Macro compares unsigned to 0 (NO_EFFECT)
unsigned_compare: This greater-than-or-equal-to-zero comparison of an unsigned value is always true. coord >= 0U.

Fixes: b154a4154b ("nir/lower_tex: rewrite tex/txb -> txd/txl before saturating srcs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9181>
2021-02-25 04:15:07 +00:00
Mike Blumenkrantz 2e60929b47 nir/texcoord_replace: add a yinvert param
vulkan needs to invert the y coord in order to handle PIPE_SPRITE_COORD_LOWER_LEFT

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9115>
2021-02-24 23:25:01 +00:00
Rhys Perry 71a985d80b nir/dce: perform DCE for unlooped instructions in a single pass
It's unnecessary to iterate twice for instructions outside loops.

Compile-time (nir_opt_dce):
Difference at 95.0% confidence
	-630.64 +/- 6.18761
	-27.0751% +/- 0.223134%
	(Student's t, pooled s = 7.30785)

Compile-time (entire run):
Difference at 95.0% confidence
	-749.54 +/- 48.8272
	-1.82644% +/- 0.117838%
	(Student's t, pooled s = 57.6672)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7691>
2021-02-24 09:58:59 +00:00
Rhys Perry 336bcbacd0 nir: inline nir_foreach_{src,dest}
Compile-time (nir_opt_dce):
Difference at 95.0% confidence
	-319.51 +/- 5.67632
	-12.0627% +/- 0.208076%
	(Student's t, pooled s = 6.70399)

Compile-time (overall):
Difference at 95.0% confidence
	-385.025 +/- 42.1124
	-0.929489% +/- 0.10139%
	(Student's t, pooled s = 49.7367)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7691>
2021-02-24 09:58:59 +00:00
Rhys Perry 325f627d88 nir/dce: replace instruction worklist with ssa def bitset
Instead of a keeping a worklist of live instructions, use a bitset of live
ssa defs and iterate over instructions in reverse.

Compile-time (nir_opt_dce):
Difference at 95.0% confidence
	-931.911 +/- 4.41383
	-26.0263% +/- 0.105781%
	(Student's t, pooled s = 5.21293)

Compile-time (overall):
Difference at 95.0% confidence
	-882.245 +/- 28.3492
	-2.08541% +/- 0.0665121%
	(Student's t, pooled s = 33.4818)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7691>
2021-02-24 09:58:59 +00:00
Christian Gmeiner 8cb52f6735 nir/lower_tex: wider usage of nir_tex_instr_src_index(..)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Suggested-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8898>
2021-02-23 14:04:30 +00:00
Christian Gmeiner a403ff4d70 nir/lower_tex: 'txs free' tex_rect lowering
GPUs without native txs support (and without an emulation in sw)
can use this new lowering. Also it saves us from doing int/float
conversions.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8898>
2021-02-23 14:04:30 +00:00
Christian Gmeiner 3fbde2fd93 nir: add has_txs flag
Some nir lowerings might need to know if txs is supported by
the backend.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8898>
2021-02-23 14:04:30 +00:00
Christian Gmeiner b0e23c92b3 nir: add load_texture_rect_scaling
Will be used in a different form of lower_rect tex lowering.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8898>
2021-02-23 14:04:30 +00:00
Ian Romanick f2656569c6 nir/range_analysis: Handle vectors better in ssa_def_bits_used
If a query is made of a vector ssa_def (possibly from an intermediate
result), return all_bits.  If a constant source is a vector, swizzle
the correct component.

Unit tests were added for the constant vector cases.  I don't see a
great way to make unit tests for the other cases.

v2: Add a FINIHSME comment about u16vec2 hardware.

Fixes: 96303a59ea ("nir: Add some range analysis for used bits")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9123>
2021-02-22 22:37:17 +00:00
Ian Romanick ce649e54f1 nir/range-analysis: C++ linkage
Fixes: 96303a59ea ("nir: Add some range analysis for used bits")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9123>
2021-02-22 22:37:17 +00:00
Timothy Arceri 9f474bd4b4 nir: handle negatives in ffma reassociation optimisation
shader-db results Iris (BDW):

total instructions in shared programs: 16632076 -> 16631057 (<.01%)
instructions in affected programs: 48010 -> 46991 (-2.12%)
helped: 47
HURT: 6

total cycles in shared programs: 915266726 -> 915263622 (<.01%)
cycles in affected programs: 1182283 -> 1179179 (-0.26%)
helped: 18
HURT: 27

total loops in shared programs: 4929 -> 4929 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 18834 -> 18801 (-0.18%)
spills in affected programs: 525 -> 492 (-6.29%)
helped: 3
HURT: 0

total fills in shared programs: 23008 -> 22981 (-0.12%)
fills in affected programs: 435 -> 408 (-6.21%)
helped: 3
HURT: 0

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8608>
2021-02-22 00:49:13 +00:00
Ian Romanick 3250e04d25 nir/algebraic: Add some max/min optimizations with 3 variables
Specifically, ARB assembly shaders with code like

    SLT    r0, r0, c[0].xxxx;
    ...
    KIL    r0.xyzx;

can result in this pattern.  The other cases (e.g., 'KIL r0.xxxx' and
'KIL r0.xyxx') are handled by existing patterns.

Reviewed-by: Matt Turner <mattst88@gmail.com>

All Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 21050098 -> 21050065 (<.01%)
instructions in affected programs: 2062 -> 2029 (-1.60%)
helped: 31
HURT: 1
helped stats (abs) min: 1 max: 3 x̄: 1.10 x̃: 1
helped stats (rel) min: 1.14% max: 4.35% x̄: 1.89% x̃: 1.69%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.65% max: 0.65% x̄: 0.65% x̃: 0.65%
95% mean confidence interval for instructions value: -1.23 -0.84
95% mean confidence interval for instructions %-change: -2.12% -1.50%
Instructions are helped.

total cycles in shared programs: 855105466 -> 855105055 (<.01%)
cycles in affected programs: 50136 -> 49725 (-0.82%)
helped: 33
HURT: 0
helped stats (abs) min: 3 max: 22 x̄: 12.45 x̃: 12
helped stats (rel) min: 0.13% max: 1.57% x̄: 0.86% x̃: 0.92%
95% mean confidence interval for cycles value: -13.78 -11.13
95% mean confidence interval for cycles %-change: -0.97% -0.76%
Cycles are helped.

No fossil-db changes on any Intel platform.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
2021-02-19 17:31:27 -08:00
Ian Romanick d9b5bce85a nir/algebraic: Remove some redundant b2f logic-op reduction patterns
There are patterns that will re-write the fmin or fmax part into a form
that other patterns will gradually convert to the same ior or iand.  For
example,

    fmax(b2f(a), b2f(b)) != 0
    b2f(a || b) != 0
    a || b

No shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
2021-02-19 17:31:24 -08:00
Ian Romanick 7e127c1fca nir/algebraic: Fix some min/max of b2f replacements
fmin(-A, -B) is -fmax(A, B), and fmax(-A, -B) is -fmin(A, B).  Therefore
the logic joining A and B should toggle between ior and iand for the
negated versions.

At the very least, a shader from Euro Truck Simulator 2 in shader-db is
affected by this.  The KIL instruction in the (ARB assembly) shader ends
up with the wrong logic.  This is _probably_ the source of
https://gitlab.freedesktop.org/mesa/mesa/-/issues/1346.

That said, the issue mentions that Mesa 18.0.5 works, but commit
68420d8322 ("nir: Simplify min and max of b2f") was added in 17.3.
Moreover, I was not able to reproduce the error in the ETS2 shader from
shader-db from any Mesa commit near the time the original fd.o bugzilla
was submitted (December 2018). 🤷

In fact, the current error in that shader starts with 9167324a86
("nir/algebraic: Mark some logic-joined comparison reductions as
exact").  That's a bit of a red herring as 9167324a86 just sets off a
chain of replacements that eventually leads to the incorrect min/max of
b2f patterns fixed by this commit.

The other affected shaders in the shader-db results are from Cargo
Commander.  These are also ARB assembly shaders.

I think any ARB assembly shader that uses the pattern

    SLT    r0, ...;
    ...
    KIL    -r0;

will suffer from issues related to this.

This change fixes the piglit
tests/spec/arb_fragment_program/kil-of-slt.shader_test test added in
https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/454.

shader-db results:

All Gen6+ platforms had similar result. (Ice Lake shown)
total instructions in shared programs: 20034604 -> 20034486 (<.01%)
instructions in affected programs: 3885 -> 3767 (-3.04%)
helped: 47
HURT: 2
helped stats (abs) min: 2 max: 4 x̄: 2.64 x̃: 2
helped stats (rel) min: 2.33% max: 8.33% x̄: 3.48% x̃: 3.39%
HURT stats (abs)   min: 3 max: 3 x̄: 3.00 x̃: 3
HURT stats (rel)   min: 13.64% max: 16.67% x̄: 15.15% x̃: 15.15%
95% mean confidence interval for instructions value: -2.83 -1.99
95% mean confidence interval for instructions %-change: -3.84% -1.60%
Instructions are helped.

total cycles in shared programs: 979881379 -> 979879406 (<.01%)
cycles in affected programs: 119873 -> 117900 (-1.65%)
helped: 46
HURT: 3
helped stats (abs) min: 10 max: 756 x̄: 45.41 x̃: 26
helped stats (rel) min: 0.53% max: 19.72% x̄: 1.67% x̃: 1.26%
HURT stats (abs)   min: 28 max: 56 x̄: 38.67 x̃: 32
HURT stats (rel)   min: 1.44% max: 3.54% x̄: 2.75% x̃: 3.27%
95% mean confidence interval for cycles value: -70.83 -9.70
95% mean confidence interval for cycles %-change: -2.23% -0.57%
Cycles are helped.

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115098 -> 8115076 (<.01%)
instructions in affected programs: 2592 -> 2570 (-0.85%)
helped: 32
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.88% max: 2.70% x̄: 1.35% x̃: 1.31%
HURT stats (abs)   min: 5 max: 5 x̄: 5.00 x̃: 5
HURT stats (rel)   min: 17.24% max: 18.52% x̄: 17.88% x̃: 17.88%
95% mean confidence interval for instructions value: -1.15 -0.15
95% mean confidence interval for instructions %-change: -1.83% 1.39%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 238189718 -> 238189802 (<.01%)
cycles in affected programs: 75076 -> 75160 (0.11%)
helped: 3
HURT: 31
helped stats (abs) min: 2 max: 130 x̄: 44.67 x̃: 2
helped stats (rel) min: 0.18% max: 5.70% x̄: 2.02% x̃: 0.19%
HURT stats (abs)   min: 2 max: 70 x̄: 7.03 x̃: 4
HURT stats (rel)   min: 0.07% max: 6.41% x̄: 0.53% x̃: 0.15%
95% mean confidence interval for cycles value: -7.27 12.21
95% mean confidence interval for cycles %-change: -0.33% 0.94%
Inconclusive result (value mean confidence interval includes 0).

No fossil-db changes on any Intel platform.

Fixes: 68420d8322 ("nir: Simplify min and max of b2f")
Closes: #1346
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
2021-02-19 17:30:53 -08:00
Adam Jackson b882857d28 glsl: Silence a warning at -Og
../src/compiler/glsl/gl_nir_link_uniforms.c:1786:50: warning: ‘blocks’ may be used uninitialized in this function [-Wmaybe-uninitialized]
    1786 |             const struct gl_uniform_block *const block =

Just do nothing if we somehow fail to initialize blocks.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8724>
2021-02-18 20:59:43 +00:00
Adam Jackson 89acceda60 glsl: Silence some warnings at -Og
./src/compiler/glsl/link_uniforms.cpp: In member function ‘virtual void parcel_out_uniform_storage::visit_field(const glsl_type*, const char*, bool, const glsl_type*, glsl_interface_packing, bool)’:
   ../src/compiler/glsl/link_uniforms.cpp:1171:61: warning: ‘id’ may be used uninitialized in this function [-Wmaybe-uninitialized]
    1171 |       calculate_array_size_and_stride(prog, &this->uniforms[id],

   ../src/compiler/glsl/link_uniform_initializers.cpp: In function ‘gl_uniform_storage* linker::get_storage(gl_shader_program*, const char*)’:
   ../src/compiler/glsl/link_uniform_initializers.cpp:41:42: warning: ‘id’ may be used uninitialized in this function [-Wmaybe-uninitialized]
      41 |       return &prog->data->UniformStorage[id];

Can't happen, but flow control apparently can't prove it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8724>
2021-02-18 20:59:43 +00:00
Adam Jackson 831eff15f8 glsl: Silence a warning at -Og
../src/compiler/glsl/gl_nir_link_uniforms.c: In function ‘gl_nir_link_uniforms’:
   ../src/compiler/glsl/gl_nir_link_uniforms.c:1747:39: warning: ‘num_blocks’ may be used uninitialized in this function [-Wmaybe-uninitialized]
    1747 |                for (unsigned i = 0; i < num_blocks; i++) {

Don't have the patience to seee how you'd hit this but doing nothing is
clearly the right edge case behavior.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8724>
2021-02-18 20:59:43 +00:00
Adam Jackson fad353d7f8 nir: Silence a warning at -Og
This throws a curious warning:

   In file included from ../src/compiler/nir/nir.h:32,
                    from ../src/compiler/nir/nir_opt_if.c:24:
   ../src/compiler/nir/nir_opt_if.c: In function ‘opt_if_loop_last_continue’:
   ../src/compiler/glsl/list.h:415:64: warning: ‘nif’ may be used uninitialized in this function [-Wmaybe-uninitialized]
     415 |    return !exec_list_is_empty(list) ? list->tail_sentinel.prev : NULL;
         |                                                                ^

What's going on here is not enough of the optimizer has run to be able
to prove that nif is always initialized. So just handle the "can't
happen" case as if it could.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8724>
2021-02-18 20:59:43 +00:00
Mike Blumenkrantz b154a4154b nir/lower_tex: rewrite tex/txb -> txd/txl before saturating srcs
this fixes mipmapping with saturate by saturating the coord param while
passing an additional param (partial derivatives or lod) that uses the
unsaturated coord value

Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8756>
2021-02-18 14:32:05 +00:00
Daniel Schürmann 2e6c9e54f1 nir: lower is/load_helper to zero if no helper lanes are needed
If there are no helper invocations required during the
execution of the shader, we can assume that there also
are no helper invocations active.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9058>
2021-02-17 21:53:52 +00:00
Daniel Schürmann b689a65316 nir: lower load_helper to is_helper if the shader uses demote()
load_helper_invocation is an Input Builtin, for which the
value should not change during the execution of a shader.
This new pass inserts an is_helper intrinsic before any
demote() instruction and re-uses its value.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9058>
2021-02-17 21:53:52 +00:00
Alyssa Rosenzweig 2104135f38 nir: Fix grammar error
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9103>
2021-02-17 17:23:09 +00:00
Jason Ekstrand 12fa219768 nir/opt_large_constants: Handle generic pointers
We already throw out any variables which may have a complex use so we
just need to make sure that our mode checks don't assert if we have a
deref which may_be but not must_be nir_var_function_temp.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
2021-02-17 03:59:25 +00:00
Jason Ekstrand 8b133a1b25 nir: Fix parameter order in the bcsel-of-shuffle optimization
Fixes: 4ff4d4e569 "nir/opt_intrinsic: Optimize bcsel(b, shuffle..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
2021-02-17 03:59:25 +00:00
Jason Ekstrand ceb6986d34 nir: Don't optimize bcsel-of-shuffle across blocks
We can't move the shuffle to a new block so this only works if the
shuffle and the bcsel are in the same block.  Fortunately, in the
motivating case, this is true.

Also, we have to be careful around discard.  We could try really hard to
just avoid moving them past discard but we choose to simply bail if we
see a discard instead.

Fixes: 4ff4d4e569 "nir/opt_intrinsic: Optimize bcsel(b, shuffle..."
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
2021-02-17 03:59:25 +00:00
Jason Ekstrand 1ef04f56c1 spirv: Delete the impl for prototype-only functions
Previously, when we had a prototype-only function in SPIR-V, we would
compile it just fine and the function would have an impl that did
nothing.  This commit changes that so that the nir_function::impl is
NULL to indicate a prototype-only function.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9069>
2021-02-16 20:50:51 +00:00
Jason Ekstrand 9d1d55f0fd spirv: Store the nir_function in vtn_function
This is a better mapping as not all nir_functions have impls.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9069>
2021-02-16 20:50:51 +00:00
Jason Ekstrand 2491d5a662 nir/algebraic: Covert up-cast of down-cast to extract on Intel
This starts generating extract for bit sizes other than 32 but our
back-end handles that just fine.

Reviewed-by: Ian Romanick <ian.d.romanick@.intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8872>
2021-02-16 16:36:31 +00:00
Jason Ekstrand f9b3be09e1 nir/algebraic: Clean up up-cast of down-cast when we can
There are a bunch of cases where we can pretty quickly determine that
the high bits don't matter.  In these cases, delete the casts.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8872>
2021-02-16 16:36:31 +00:00
Jason Ekstrand 96303a59ea nir: Add some range analysis for used bits
This isn't 100% accurate, of course, but it should be good enough for
what we're about to do with it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8872>
2021-02-16 16:36:31 +00:00
Jason Ekstrand d41ac6e2ca nir/lower_bit_size: Support phi instructions
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8872>
2021-02-16 16:36:31 +00:00
Jason Ekstrand 6413e67591 nir: Add a couple helpers for phis and cursors
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8872>
2021-02-16 16:36:31 +00:00
Caio Marcelo de Oliveira Filho a36d5bf11b compiler: Drop now unused gl_varying_slot_name()
There's reuse of values depending on the stage, so a function that
just takes the value might produce invalid results.  All the codebase
was already changed to use the gl_varying_slot_name_for_stage()
instead.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8998>
2021-02-13 00:44:53 +00:00
Alyssa Rosenzweig 2afdcc187b nir: Add sample_positions_pan intrinsic
Facilites the gl_SamplePosition lowering on Bifrost, where the sample
positions are accessed directly in a packed in-memory format.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12 16:44:28 -05:00
Alyssa Rosenzweig 9f934e922d compiler, nir: Add and set barrier metadata
Useful for determining whether certain optimizations are legal for a
compute shader (e.g. optimizing workgroup size in the driver).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6312>
2021-02-12 01:37:05 +00:00
Dave Airlie 14b2dc0013 glsl: fix leak in gl_nir_link_uniform_blocks
asan on llvmpipe with piglit tests/spec/arb_gl_spirv/execution/ssbo/array-indirect.shader_test
reported.

=================================================================
==3288325==ERROR: LeakSanitizer: detected memory leaks

Direct leak of 48 byte(s) in 1 object(s) allocated from:
    #0 0x7f5b2d6513cf in __interceptor_malloc (/lib64/libasan.so.6+0xab3cf)
    #1 0x7f5b2a1ae810 in ralloc_size ../src/util/ralloc.c:133
    #2 0x7f5b2a1ae7e1 in ralloc_context ../src/util/ralloc.c:120
    #3 0x7f5b2b210177 in gl_nir_link_uniform_blocks ../src/compiler/glsl/gl_nir_link_uniform_blocks.c:585
    #4 0x7f5b2af7f52d in gl_nir_link_spirv ../src/compiler/glsl/gl_nir_linker.c:614
    #5 0x7f5b2a3b76fa in st_link_nir ../src/mesa/state_tracker/st_glsl_to_nir.cpp:765
    #6 0x7f5b2a3ace7b in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:65
    #7 0x7f5b2a471165 in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3122
    #8 0x7f5b2a97a6d8 in link_program ../src/mesa/main/shaderapi.c:1311
    #9 0x7f5b2a97a6d8 in link_program_error ../src/mesa/main/shaderapi.c:1419
    #10 0x7f5b2a97df45 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1911
    #11 0x7f5b299b59e5 in stub_glLinkProgram /mnt/devel/gl/piglit/tests/util/piglit-dispatch-gen.c:33956
    #12 0x40a71a in link_and_use_shaders /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:1604
    #13 0x415722 in init_test /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5225
    #14 0x4164ce in piglit_init /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5597
    #15 0x7f5b29a214e9 in run_test /mnt/devel/gl/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:73
    #16 0x7f5b29a103fe in piglit_gl_test_run /mnt/devel/gl/piglit/tests/util/piglit-framework-gl.c:229
    #17 0x407847 in main /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:72
    #18 0x7f5b2928f1e1 in __libc_start_main (/lib64/libc.so.6+0x281e1)

SUMMARY: AddressSanitizer: 48 byte(s) leaked in 1 allocation(s).

Fixes: 57239192 ("nir/linker: add gl_nir_link_uniform_blocks.c")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8974>
2021-02-11 14:20:22 +10:00
Caio Marcelo de Oliveira Filho 568a668259 spirv: Allow variable pointers pointing to an array of blocks
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8864>
2021-02-08 14:37:25 +00:00
Ian Romanick ed138f2861 nir/algebraic: Partially revert 3f782cdd25
I'm not sure what the logic was, but there is no opportunity for
anything to flush to zero here.  'a' is a Boolean value, and b2f
produces 1.0 or 0.0.

This was originally part of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3765/.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: Andres Gomez <agomez@igalia.com>
Cc: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8910>
2021-02-07 18:31:01 -08:00
Ian Romanick 5923742356 nir/algebraic: add patterns for a >> #b << #b and a << #b >> #b
Commit 5476d18183 ("nir/algebraic: add patterns for a >> #b << #b")
added the ushr version, but it missed the ishr.  A bunch of compute
shaders with stores to shared storage generate the ishr pattern.

Enabling this optimization also enables the iadd/iand reassociation
(right after this hunk), and that enables merging of stores to shared
storage.  A couple shaders have spills and fills hurt on some
platforms.  These all occur in shaders that also have SENDs helped.
On Gen9 and Gen11, the helped SENDs more than makes up for the extra
spills and fills.

On Gen7 and Gen8, it's not as clear.  All of the shaders affected are
compute shaders in DiRT Rally 2 or Bioshock Inifinite.  The most
affected Bioshock shader on Broadwell looks like:

Before: CS SIMD8 shader: 1335 inst, 0 loops, 22411 cycles, 42:36 spills:fills, 159 sends, scheduled with mode lifo, Promoted 2 constants, compacted 21360 to 16528 bytes.

After:  CS SIMD8 shader: 1175 inst, 0 loops, 25916 cycles, 96:135 spills:fills, 72 sends, scheduled with mode lifo, Promoted 2 constants, compacted 18800 to 13648 bytes.

The results on Haswell and Ivy Bridge are similar.  Given that there
are only 2 promoted constants, MR !7698 won't have any effect.

There were no statistically significant changes on Gen9+ in Bioshock in
our performance CI.  Gen8 isn't in that CI, and DiRT Showdown 2 is also
not included in that CI.  It is possible that these shaders aren't used
in the settings or demos used in the CI.

The other pattern, which switches the order of the shifts, only helps a
couple shaders.  If I wasn't already adding another pattern, I
definitely wouldn't bother with that one.

v2: s/ishr/ushr/ in the replacement for the ushr pattern.  Noticed by
Rhys.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Tiger Lake
total instructions in shared programs: 21052760 -> 21049269 (-0.02%)
instructions in affected programs: 59497 -> 56006 (-5.87%)
helped: 46
HURT: 0
helped stats (abs) min: 2 max: 552 x̄: 75.89 x̃: 53
helped stats (rel) min: 0.28% max: 43.43% x̄: 5.87% x̃: 4.10%
95% mean confidence interval for instructions value: -108.96 -42.82
95% mean confidence interval for instructions %-change: -8.38% -3.35%
Instructions are helped.

total cycles in shared programs: 855229761 -> 855148518 (<.01%)
cycles in affected programs: 8491373 -> 8410130 (-0.96%)
helped: 33
HURT: 15
helped stats (abs) min: 42 max: 26940 x̄: 6200.70 x̃: 4329
helped stats (rel) min: 0.09% max: 38.78% x̄: 7.97% x̃: 4.29%
HURT stats (abs)   min: 2 max: 18132 x̄: 8225.33 x̃: 7288
HURT stats (rel)   min: <.01% max: 13.37% x̄: 5.72% x̃: 4.53%
95% mean confidence interval for cycles value: -4331.52 946.40
95% mean confidence interval for cycles %-change: -6.78% -0.61%
Inconclusive result (value mean confidence interval includes 0).

total sends in shared programs: 989947 -> 989694 (-0.03%)
sends in affected programs: 523 -> 270 (-48.37%)
helped: 5
HURT: 0
helped stats (abs) min: 9 max: 87 x̄: 50.60 x̃: 37
helped stats (rel) min: 25.71% max: 54.72% x̄: 43.49% x̃: 42.53%
95% mean confidence interval for sends value: -93.95 -7.25
95% mean confidence interval for sends %-change: -58.48% -28.50%
Sends are helped.

Ice Lake and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 20033498 -> 20030552 (-0.01%)
instructions in affected programs: 59220 -> 56274 (-4.97%)
helped: 48
HURT: 0
helped stats (abs) min: 1 max: 465 x̄: 61.38 x̃: 39
helped stats (rel) min: 0.03% max: 42.27% x̄: 5.19% x̃: 3.90%
95% mean confidence interval for instructions value: -89.57 -33.18
95% mean confidence interval for instructions %-change: -7.49% -2.89%
Instructions are helped.

total cycles in shared programs: 979993675 -> 979840773 (-0.02%)
cycles in affected programs: 6738454 -> 6585552 (-2.27%)
helped: 46
HURT: 0
helped stats (abs) min: 42 max: 6265 x̄: 3323.96 x̃: 3579
helped stats (rel) min: 0.09% max: 37.38% x̄: 4.34% x̃: 2.39%
95% mean confidence interval for cycles value: -3664.70 -2983.21
95% mean confidence interval for cycles %-change: -6.63% -2.06%
Cycles are helped.

total spills in shared programs: 10659 -> 10661 (0.02%)
spills in affected programs: 36 -> 38 (5.56%)
helped: 1
HURT: 1

total fills in shared programs: 11551 -> 11551 (0.00%)
fills in affected programs: 70 -> 70 (0.00%)
helped: 1
HURT: 1

total sends in shared programs: 1032117 -> 1031785 (-0.03%)
sends in affected programs: 711 -> 379 (-46.69%)
helped: 5
HURT: 0
helped stats (abs) min: 18 max: 87 x̄: 66.40 x̃: 74
helped stats (rel) min: 27.69% max: 54.72% x̄: 44.49% x̃: 44.31%
95% mean confidence interval for sends value: -101.79 -31.01
95% mean confidence interval for sends %-change: -58.42% -30.55%
Sends are helped.

Broadwell
total instructions in shared programs: 17865005 -> 17862757 (-0.01%)
instructions in affected programs: 66438 -> 64190 (-3.38%)
helped: 49
HURT: 0
helped stats (abs) min: 1 max: 266 x̄: 45.88 x̃: 39
helped stats (rel) min: 0.03% max: 11.99% x̄: 3.73% x̃: 3.92%
95% mean confidence interval for instructions value: -59.15 -32.61
95% mean confidence interval for instructions %-change: -4.35% -3.12%
Instructions are helped.

total cycles in shared programs: 1031298803 -> 1031219023 (<.01%)
cycles in affected programs: 7253602 -> 7173822 (-1.10%)
helped: 45
HURT: 2
helped stats (abs) min: 18 max: 7828 x̄: 1928.33 x̃: 1918
helped stats (rel) min: <.01% max: 10.51% x̄: 1.58% x̃: 1.31%
HURT stats (abs)   min: 3490 max: 3505 x̄: 3497.50 x̃: 3497
HURT stats (rel)   min: 15.56% max: 15.64% x̄: 15.60% x̃: 15.60%
95% mean confidence interval for cycles value: -2174.88 -1220.01
95% mean confidence interval for cycles %-change: -2.00% 0.30%
Inconclusive result (%-change mean confidence interval includes 0).

total spills in shared programs: 20799 -> 20924 (0.60%)
spills in affected programs: 843 -> 968 (14.83%)
helped: 0
HURT: 4

total fills in shared programs: 27110 -> 27334 (0.83%)
fills in affected programs: 1824 -> 2048 (12.28%)
helped: 1
HURT: 4

total sends in shared programs: 1017935 -> 1017603 (-0.03%)
sends in affected programs: 711 -> 379 (-46.69%)
helped: 5
HURT: 0
helped stats (abs) min: 18 max: 87 x̄: 66.40 x̃: 74
helped stats (rel) min: 27.69% max: 54.72% x̄: 44.49% x̃: 44.31%
95% mean confidence interval for sends value: -101.79 -31.01
95% mean confidence interval for sends %-change: -58.42% -30.55%
Sends are helped.

Haswell and Ivy Bridge had similar results. (Haswell shown)
total instructions in shared programs: 16397496 -> 16395411 (-0.01%)
instructions in affected programs: 59384 -> 57299 (-3.51%)
helped: 49
HURT: 0
helped stats (abs) min: 1 max: 208 x̄: 42.55 x̃: 39
helped stats (rel) min: 0.03% max: 8.18% x̄: 3.74% x̃: 3.91%
95% mean confidence interval for instructions value: -53.59 -31.51
95% mean confidence interval for instructions %-change: -4.24% -3.23%
Instructions are helped.

total cycles in shared programs: 1035483504 -> 1035397592 (<.01%)
cycles in affected programs: 9379739 -> 9293827 (-0.92%)
helped: 45
HURT: 4
helped stats (abs) min: 10 max: 5600 x̄: 2164.51 x̃: 2350
helped stats (rel) min: <.01% max: 11.61% x̄: 1.93% x̃: 1.56%
HURT stats (abs)   min: 2 max: 5756 x̄: 2872.75 x̃: 2866
HURT stats (rel)   min: <.01% max: 24.65% x̄: 12.29% x̃: 12.26%
95% mean confidence interval for cycles value: -2293.06 -1213.56
95% mean confidence interval for cycles %-change: -2.42% 0.88%
Inconclusive result (%-change mean confidence interval includes 0).

total spills in shared programs: 17672 -> 17803 (0.74%)
spills in affected programs: 364 -> 495 (35.99%)
helped: 2
HURT: 2

total fills in shared programs: 20752 -> 20937 (0.89%)
fills in affected programs: 656 -> 841 (28.20%)
helped: 2
HURT: 2

total sends in shared programs: 1044703 -> 1044450 (-0.02%)
sends in affected programs: 523 -> 270 (-48.37%)
helped: 5
HURT: 0
helped stats (abs) min: 9 max: 87 x̄: 50.60 x̃: 37
helped stats (rel) min: 25.71% max: 54.72% x̄: 43.49% x̃: 42.53%
95% mean confidence interval for sends value: -93.95 -7.25
95% mean confidence interval for sends %-change: -58.48% -28.50%
Sends are helped.

No changes on Gen6 or earlier GPUs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8852>
2021-02-08 00:25:22 +00:00
Ian Romanick 6b0443a900 nir/algebraic: Fix a >> #b << #b for sizes other than 32-bit
The base mask previously used was 0xffffffff.  This is not correct (but
should still work) for 16-bit and 8-bit values, but it means the high
32-bits of 64-bit values will get chopped off.

Instead of just restricting the pattern to 32-bits (as was done before
00b28a50b2), this extends the optimization in two ways:

1. Make it correct for other bit sizes.
2. Make it work for arbitrary shift counts.

This has the added benefit of reducing the number of patterns actually
added (7 previously, 4 now).

The "Reassociate for improved CSE" part is just reverted to its
pre-00b28a50b2c behavior.  I doubt that pattern is likely to have much
impact outside 32-bits.

This change fixes the piglit tests
tests/spec/arb_gpu_shader_int64/fs-shl-of-shr-int64.shader_test and
tests/spec/arb_gpu_shader_int64/fs-iand-of-iadd-int64.shader_test.

All of the shaders helped in shader-db are vertex shaders on platforms
with vector-oriented vertex processing.  The shaders contain ((x >> 16)
<< 16).  These platforms set lower_extract_word, so the optimization
that transforms (x >> 16) to extract_u16 doesn't trigger.  With only ~60
shaders involved, I didn't bother trying to add extract_XYZ versions of
these patterns to try to get those cases.

Fixes: 00b28a50b2 ("nir/algebraic: trivially enable existing 32-bit patterns for all bit sizes")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Haswell and earlier Intel GPUs had simlar results. (Haswell shown)
total instructions in shared programs: 16397554 -> 16397496 (<.01%)
instructions in affected programs: 7961 -> 7903 (-0.73%)
helped: 58
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.36% max: 1.89% x̄: 0.99% x̃: 0.78%
95% mean confidence interval for instructions value: -1.00 -1.00
95% mean confidence interval for instructions %-change: -1.13% -0.85%
Instructions are helped.

total cycles in shared programs: 1035483770 -> 1035483504 (<.01%)
cycles in affected programs: 75922 -> 75656 (-0.35%)
helped: 44
HURT: 2
helped stats (abs) min: 2 max: 12 x̄: 6.14 x̃: 2
helped stats (rel) min: 0.05% max: 1.67% x̄: 0.87% x̃: 0.72%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.06% max: 0.06% x̄: 0.06% x̃: 0.06%
95% mean confidence interval for cycles value: -7.28 -4.29
95% mean confidence interval for cycles %-change: -1.03% -0.63%
Cycles are helped.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8852>
2021-02-08 00:25:22 +00:00
Caio Marcelo de Oliveira Filho 0c3fe06421 spirv: Skip creating unused variables in SPIR-V >= 1.4
Newer versions of SPIR-V require that all the global variables used by
the entry point are declared (in contrast to only I/O in previous
versions), so there's no need to remove dead variables or keep track
of the indirectly used variables.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8456>
2021-02-05 04:52:46 +00:00
Caio Marcelo de Oliveira Filho e3abbe7a24 spirv: Count variables *after* unused ones are removed
Previous code was counting more variables than those used by the entry
point.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8456>
2021-02-05 04:52:46 +00:00
Caio Marcelo de Oliveira Filho cc98ba2eaf spirv: Use OpEntryPoint to identify valid I/O variables
OpEntryPoint declares the list of variables in Input and Output
storage classes that are used.  Use that information to skip creating
other variables from such storage classes that are unused by the entry
point.

After that change, is not necessary to use remove dead variables for
those types of variables; and because of that is also not necessary to
lower initalizers for output variables.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8456>
2021-02-05 04:52:46 +00:00
Alyssa Rosenzweig 083843de1e nir/lower_io: Fix grammar errors
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8846>
2021-02-04 11:45:26 +00:00
Caio Marcelo de Oliveira Filho 1e59cdbf77 spirv: Fail when parsing invalid Initializers
Fail when parsing Initializers used in Variables with Storage Classes
that doesn't support it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8820>
2021-02-03 15:21:13 -08:00
Caio Marcelo de Oliveira Filho a2414ada87 nir: Add nir_zero_initialize_shared_memory
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8708>
2021-02-02 17:06:56 +00:00
Caio Marcelo de Oliveira Filho c4f2297f00 spirv: Recognize zero initializers in Workgroup variables
This will be used to implement
VK_KHR_zero_initialize_workgroup_memory.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8708>
2021-02-02 17:06:56 +00:00
Caio Marcelo de Oliveira Filho 378eca1394 spirv: Refactor variable initializer code
Pass the vtn_value and let vtn_create_variable do the validation.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8708>
2021-02-02 17:06:56 +00:00
Jason Ekstrand 774fae34f0 nir: Drop the lower_mem_constant_vars declaration
The function was removed in c730ace12b.

Fixes: c730ace12b "nir,clover: Drop nir_lower_mem_constant_vars"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8834>
2021-02-02 16:34:22 +00:00
Jason Ekstrand f064b7a42c nir: Add some ssa-only fast-paths for nir_src rewrite
Basically every pass in NIR uses nir_ssa_def_rewrite_uses which calls
nir_instr_rewrite_src which is fairly complex because it handles all
sorts of non-SSA cases.  Since we already know a priori that every
source written by nir_ssa_def_rewrite_uses is SSA, we can check new_src
once at the top of the function and cut out all that complexity.

While we're at it, we expose a new SSA-only nir_ssa_def_rewrite_uses_ssa
helper which takes an SSA def which avoids the one SSA check.  It's also
more convenient 90% of the time.

Compile time as tested by Rhys Perry <pendingchaos02@gmail.com>

    Difference at 95.0% confidence
        -797.166 +/- 418.649
        -0.566174% +/- 0.296441%
        (Student's t, pooled s = 325.459)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8790>
2021-02-02 15:35:55 +00:00
Yevhenii Kolesnikov a678ec9b8c nir/from_ssa: don't check for interference within the same set
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8246>
2021-02-01 14:28:35 -06:00
Yevhenii Kolesnikov fd05620e43 nir/from_ssa: consider defs in sibling blocks
If def a and def b are in sibling blocks, the one with higher
parent_instr's index does not necessarily come after the other.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3712
Fixes: 943ddb9458 "nir: Add a better out-of-SSA pass"
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8246>
2021-02-01 14:27:56 -06:00
Jason Ekstrand c7fc44f9eb nir/from_ssa: Respect and populate divergence information
Reviewed-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7726>
2021-02-01 08:11:48 +00:00
Arcady Goldmints-Orlov 8fb6cbdcb6 nir: store the results of divergence analysis on loops
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7726>
2021-02-01 08:11:48 +00:00
Arcady Goldmints-Orlov 019449dad7 nir: handle v3d intrinsics in divergence analysis
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7726>
2021-02-01 08:11:48 +00:00
Arcady Goldmints-Orlov 349e4f3c65 nir: add more intrinsics to divergence analysis
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7726>
2021-02-01 08:11:48 +00:00
Caio Marcelo de Oliveira Filho 1869072c80 spirv: Store SPIR-V version of the module
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8786>
2021-01-29 23:36:29 +00:00
Caio Marcelo de Oliveira Filho a0d73ca65c spirv: Don't remove dead variables in `create_library` mode
The issues fixed by the removal happen when a module has multiple
entry points and conflicting global variables.  Neither conditions are
expected in a library.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8786>
2021-01-29 23:36:29 +00:00
Caio Marcelo de Oliveira Filho fd44bcf9a8 spirv: Don't bother counting num_images/num_textures
Not only these are recalculated in nir_shader_gather_info, but
currently they are also counting all the images / textures in the
module instead of in the shader (entrypoint).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8786>
2021-01-29 23:36:29 +00:00
Mike Blumenkrantz d76f51d6fd glsl: support 64bit integer loop iterators
this was crashing due to the assumption that non-32bit integer values must be
floats

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7316>
2021-01-29 17:13:14 +00:00
Mike Blumenkrantz f9ae947e72 meson: add enable-glcpp-tests option
these are too intermittent to be left enabled on CI for now

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8738>
2021-01-28 15:52:32 +00:00
Mike Blumenkrantz 6a29632dd2 Revert "glcpp: disable 'windows' tests"
This reverts commit f7527f7f65.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8738>
2021-01-28 15:52:32 +00:00
cheyang 070334dc69 glsl: redeclare built-in variable with separate shader
according to :
https://www.khronos.org/registry/OpenGL/extensions/EXT/EXT_separate_shader_objects.gles.txt
properly handle the declaration of these interface block varibales

Signed-off-by: cheyang <cheyang@bytedance.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8101>
2021-01-28 13:15:13 +00:00
Caio Marcelo de Oliveira Filho 5de6c5973a spirv: Implement SPV_KHR_workgroup_memory_explicit_layout
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8699>
2021-01-27 22:20:53 +00:00
Caio Marcelo de Oliveira Filho a9d230077f nir: Two shared memory *blocks* may alias each other
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8699>
2021-01-27 22:20:53 +00:00
Caio Marcelo de Oliveira Filho bb2a0fbcd3 spirv: Update headers and metadata from latest Khronos commit
This corresponds to faa570afbc91ac73d594d787486bcf8f2df1ace0
("Merge pull request #192 from cmarcelo/SPV_KHR_workgroup_memory_explicit_layout") in
https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8699>
2021-01-27 22:20:53 +00:00
Rhys Perry 30f40364f6 nir,spirv: allow non-uniform OpArrayLength
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7969>
2021-01-27 13:00:33 +00:00
Caio Marcelo de Oliveira Filho 9f3d5e99ea compiler: Use util/bitset.h for system_values_read
It is currently a bitset on top of a uint64_t but there are already
more than 64 values.  Change to use BITSET to cover all the
SYSTEM_VALUE_MAX bits.

Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8585>
2021-01-26 20:20:47 +00:00
Caio Marcelo de Oliveira Filho ecd0ae09f9 nir/linking: Remove system_value handling from helper
All uses are passing variables of either nir_var_shader_in or
nir_var_shader_out modes.  Note that currently there are more than 64
system values, so the uint64_t wouldn't be enough anyway.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8585>
2021-01-26 20:20:46 +00:00
Samuel Pitoiset 4c3ad4d065 nir/algebraic: mark more optimization with fsat(NaN) as inexact
These optimizations are duplicated from the main optimization table
to the late one... And I missed some in the original fix.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3368
Fixes: bc123c396a ("nir/algebraic: mark some optimizations with fsat(NaN) as inexact")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8716>
2021-01-26 17:06:23 +00:00
Gert Wollny 4099cdc97f compiler/nir: Add support for lowering stores with nir_lower_instruction
The function is very convenient for lowering any type of instruction
that can be easily filtered, but so far instructions that didn't return
a value were siletly ignored.

Fix this by
  - not requiring a return value in the instruction
  - add a new special return value from the lowering implementation
    function to indicated that an instruction that doesn't have a
    return value must be removed, and
  - don't try to collect and replace uses in this case.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8177>
2021-01-26 15:27:17 +00:00
Rhys Perry b729cd58d7 nir/algebraic: eliminate exact a*0.0 if float execution mode allow it
fossil-db (GFX10):
Totals from 611 (0.44% of 139391) affected shaders:
SGPRs: 40528 -> 40288 (-0.59%)
VGPRs: 16136 -> 16152 (+0.10%); split: -0.15%, +0.25%
CodeSize: 970192 -> 951036 (-1.97%)
MaxWaves: 10561 -> 10557 (-0.04%); split: +0.08%, -0.11%
Instrs: 174874 -> 172879 (-1.14%); split: -1.18%, +0.04%

fossil-db (GFX10.3):
Totals from 611 (0.44% of 139391) affected shaders:
SGPRs: 40680 -> 40488 (-0.47%)
VGPRs: 18368 -> 18276 (-0.50%); split: -0.57%, +0.07%
CodeSize: 1050712 -> 1033624 (-1.63%); split: -1.64%, +0.02%
MaxWaves: 8658 -> 8674 (+0.18%)
Instrs: 205364 -> 201220 (-2.02%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5523>
2021-01-26 11:36:13 +00:00
Rhys Perry 614ab26afd nir/algebraic: optimize out exact a+0.0 if it's used only as a float
fossil-db (GFX10):
Totals from 133 (0.10% of 139391) affected shaders:
SGPRs: 7864 -> 7856 (-0.10%); split: -0.20%, +0.10%
VGPRs: 4884 -> 4836 (-0.98%)
CodeSize: 288932 -> 287084 (-0.64%)
MaxWaves: 1973 -> 1979 (+0.30%)
Instrs: 53899 -> 53550 (-0.65%)

fossil-db (GFX10.3):
Totals from 133 (0.10% of 139391) affected shaders:
SGPRs: 7832 -> 7835 (+0.04%); split: -0.06%, +0.10%
VGPRs: 5144 -> 5088 (-1.09%)
CodeSize: 318912 -> 316696 (-0.69%)
MaxWaves: 1735 -> 1746 (+0.63%)
Instrs: 65367 -> 64853 (-0.79%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5523>
2021-01-26 11:36:13 +00:00
Rhys Perry 2849f0b5aa nir/algebraic: optimize out exact a*1.0 if it's used only as a float
fossil-db (GFX10):
Totals from 10180 (7.30% of 139391) affected shaders:
SGPRs: 549392 -> 549448 (+0.01%); split: -0.00%, +0.01%
VGPRs: 243228 -> 243008 (-0.09%); split: -0.11%, +0.02%
CodeSize: 12939080 -> 12603996 (-2.59%); split: -2.59%, +0.00%
MaxWaves: 186948 -> 186976 (+0.01%)
Instrs: 2497266 -> 2414648 (-3.31%)

fossil-db (GFX10.3):
Totals from 10180 (7.30% of 139391) affected shaders:
SGPRs: 549672 -> 549280 (-0.07%); split: -0.23%, +0.16%
VGPRs: 289296 -> 283672 (-1.94%); split: -2.83%, +0.88%
CodeSize: 13920180 -> 13255560 (-4.77%); split: -4.77%, +0.00%
MaxWaves: 151789 -> 153165 (+0.91%)
Instrs: 2756978 -> 2671517 (-3.10%); split: -3.10%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5523>
2021-01-26 11:36:13 +00:00
Caio Marcelo de Oliveira Filho 10b3eecd36 spirv: Don't remove variables used by resource indexing intrinsics
In Vulkan, for some variable modes, the generated NIR will have derefs
pointing to resource index intrinsics instead of the variable.  This
was letting nir_remove_dead_variables pass remove those variables,
which would lose information relevant for later passes after
spirv2nir.

Add a set to keep track of such variables and prevent them to be
removed when producing the NIR output.

Issue reported by Rhys.

Fixes: c4c9c780b1 ("spirv: Remove more dead variables")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8706>
2021-01-26 05:58:34 +00:00
Caio Marcelo de Oliveira Filho cb7352ae95 nir: Add a data pointer to the callback in nir_remove_dead_variables
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8706>
2021-01-26 05:58:34 +00:00
Rhys Perry f8072c133d nir/opt_uniform_atomics: fix elect detection
fossil-db (GFX10.3):
Totals from 30 (0.02% of 139391) affected shaders:
SGPRs: 1736 -> 1712 (-1.38%)
CodeSize: 262116 -> 254728 (-2.82%)
Instrs: 50341 -> 48857 (-2.95%)
Cycles: 486384 -> 477556 (-1.82%)
VMEM: 4821 -> 4589 (-4.81%)
Copies: 5013 -> 4890 (-2.45%)
Branches: 2108 -> 1983 (-5.93%)
PreSGPRs: 1444 -> 1418 (-1.80%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8654>
2021-01-25 21:04:52 +00:00
Rhys Perry eb70c52abe nir/opt_uniform_atomics: recognize more complicated invocation comparisons
For example, gl_LocalInvocationID.x + gl_LocalInvocationID.y * 8.

fossil-db (GFX10.3):
Totals from 8 (0.01% of 139391) affected shaders:
CodeSize: 15224 -> 14800 (-2.79%)
Instrs: 2880 -> 2798 (-2.85%)
Cycles: 44556 -> 44204 (-0.79%)
VMEM: 407 -> 473 (+16.22%); split: +17.69%, -1.47%
Copies: 491 -> 483 (-1.63%)
Branches: 200 -> 192 (-4.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8654>
2021-01-25 21:04:52 +00:00
Erik Faye-Lund bc0222d471 compiler/nir: add texcoord replace lowering pass
This lowering pass allows us to replace point-sprites to gl_PointCoord,
which better match what modern hardware does.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6473>
2021-01-25 17:32:33 +00:00
Connor Abbott 6ca1ab3bb4 nir/lower_tex: Assume that nir_tex_instr::dest_type is sized
This reverts the code back to the form it was before, but with an
explicitly sized float32 instead of float, now that all producers are
switched over.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:59 +01:00
Connor Abbott 708c47e663 nir: Validate nir_tex_instr::dest_type bitsize
In theory, we could also verify this against the sampler type for
sampler derefs, but there are a number of complications there:

- SPIR-V 1.4 lets you override the signedness of integer samplers
per-instruction. So the base type may not match.
- mediump/RelaxedPrecision samplers may get lowered to f16 in the
instruction or may not. So the bitsize may not match.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:53 +01:00
Connor Abbott 6af5181f13 vtn: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:53 +01:00
Connor Abbott d5e54c6edb glsl/nir: Use sized types for nir_tex_instr::dest_type
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:53 +01:00
Connor Abbott b2da598ff9 nir: Use sized types for nir_tex_instr::dest_type
Revieweeviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:48 +01:00
Connor Abbott 3d803893da nir/lower_bool: Rewrite dest_type for boolean destinations
This happens with nir_texop_samples_identical, and we need to keep
things consistent and (soon) keep the validator happy when expanding
booleans once we switch that to having a dest_type of bool1.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:42 +01:00
Connor Abbott acd6616eab nir/lower_tex: Handle sized tex destination types
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:26 +01:00
Mike Blumenkrantz 64fd191d8a spirv: handle NoContraction in GLSL450 alu ops
we were dropping this when it was set, leading to incorrect algebraic
optimizations that broke various types of tests, e.g., running
spec@arb_gpu_shader5@execution@precise@fs-fract-of-nan in zink

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6116>
2021-01-23 01:39:09 +00:00
Jason Ekstrand 178820212b nir/lower_int64: Lower 64-bit vote_ieq
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
2021-01-22 18:38:37 +00:00
Jason Ekstrand 731adf1e17 nir/lower_int64: Add lowering for 64-bit iadd shuffle/reduce
Lowering iadd is a bit trickier because we have to deal with potential
overflow but it's still not bad to do in NIR.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
2021-01-22 18:38:37 +00:00
Jason Ekstrand bf7a114246 nir/lower_int64: Add lowering for some 64-bit subgroup ops
These are all pretty trivial because we can just split the op into one
subgroup op per half of the value.  There's some question as to whether
these belong in lower_int64 or lower_subgroups but, on Intel, they key
decider of whether or not we need the lowering is based on whether or
not we have hardware int64 support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
2021-01-22 18:38:37 +00:00
Jason Ekstrand da331f814f nir/lower_int64: Fix lowering of f2[ui]64 for 16-bit float
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
2021-01-22 18:38:37 +00:00
Jason Ekstrand 70b4524de5 nir/lower_int64: Add a level of wrapper functions
We're about to start lowering a few intrinsics so we need support more
than just ALU.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>
2021-01-22 18:38:37 +00:00
Marek Olšák fb73058ad2 mesa: add upper bound to limit program state var iterations
State parameters are sometimes not perfectly sorted.
This optimizes the number of iterations we have to do for fetch_state.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8183>
2021-01-21 21:59:29 +00:00
Marek Olšák 0c77190b31 glsl: split gl_CurrentAttribFragMESA into elements
This reduces the constant buffer size by eliminating unused elements
because it's no longer a uniform array that the compiler can't split.

This looks silly, but there is no other way because all elements must be
globally declared, which means they can't be generated by a loop.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8183>
2021-01-21 21:59:29 +00:00
Marek Olšák e3a7acf958 glsl: remove unused internal builtin gl_CurrentAttribVertMESA
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8183>
2021-01-21 21:59:29 +00:00
Marek Olšák 0eccba1ac0 mesa: flatten STATE_MATERIAL and STATE_LIGHTPROD tokens
Flattening continue to get optimal code in fetch_state.

This merges the "face" field with the "attrib" field using the combined
MAT_ATTRIB_* enums. The outcome is that the inner switch statements can
be flatten because we can use MAT_ATTRIB_* to index into the attrib array
directly.

With LightSource attributes that don't have two sides, more math is
involved to get the correct index but it works out nicely too.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8183>
2021-01-21 21:59:29 +00:00
Marek Olšák b4f3497786 mesa: remove STATE_INTERNAL
Let's flatten the tokens to generate optimal code for fetch_state.

There was only one name conflict: STATE_NORMAL_SCALE was used both as
internal and non-internal.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8183>
2021-01-21 21:59:29 +00:00
Rhys Perry a6d92eaf4f nir/sink,nir/move: sink/move reorderable load_ssbo
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6490>
2021-01-21 18:07:03 +00:00
Rhys Perry e200ce0996 nir/lower_io: fix array_length lowering if buffer is smaller than offset
Matches SPIR-V -> NIR implementation of OpArrayLength.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8163>
2021-01-21 11:53:12 +00:00
Jesse Natalie 13b21156e4 nir: Work around MSVC x86 internal compiler error
Fixes: 1fd8b466 ("nir,spirv: add sparse image loads")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4108
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8581>
2021-01-20 20:42:48 +00:00
Ilia Mirkin a0f4affcf6 glsl: only expose int64 atomics when extension is enabled
This limits the exposure of these functions to when the extension is
available. Prevents crashes otherwise, as the rest of the infrastructure
doesn't necessarily expect these functions when the extension is not
available.

Fixes: 40c1f9883e ("mesa,glsl: add support for GL_NV_shader_atomic_int64")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8533>
2021-01-16 18:21:03 +00:00
Mike Blumenkrantz 652e51e1f3 nir/lower_uniforms_to_ubo: set explicit_binding on uniform_0
this variable is always bound to buffer index 0, so the binding info
here is actually useful

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7935>
2021-01-14 17:29:09 +00:00
Mike Blumenkrantz 491e7decad util/set: add the found param to search_or_add
this brings parity with the internal api

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8450>
2021-01-14 13:51:35 +00:00
Rhys Perry dfe429eb41 nir/loop_unroll: unroll more aggressively if it can improve load scheduling
Significantly improves performance of a Control compute shader. Also seems
to increase FPS at the very start of the game by ~5% (RX 580, 1080p,
medium settings, no MSAA).

fossil-db (Sienna):
Totals from 81 (0.06% of 139391) affected shaders:
SGPRs: 3848 -> 4362 (+13.36%); split: -0.99%, +14.35%
VGPRs: 4132 -> 4648 (+12.49%)
CodeSize: 275532 -> 659188 (+139.24%)
MaxWaves: 986 -> 906 (-8.11%)
Instrs: 54422 -> 126865 (+133.11%)
Cycles: 1057240 -> 750464 (-29.02%); split: -42.61%, +13.60%
VMEM: 26507 -> 61829 (+133.26%); split: +135.56%, -2.30%
SMEM: 4748 -> 5895 (+24.16%); split: +31.47%, -7.31%
VClause: 1933 -> 6802 (+251.89%); split: -0.72%, +252.61%
SClause: 1179 -> 1810 (+53.52%); split: -3.14%, +56.66%
Branches: 1174 -> 1157 (-1.45%); split: -23.94%, +22.49%
PreVGPRs: 3219 -> 3387 (+5.22%); split: -0.96%, +6.18%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6538>
2021-01-13 18:54:18 +00:00
Daniel Schürmann 08fbd5d454 nir/divergence_analysis: mark load_push_constant as uniform
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8439>
2021-01-12 14:46:13 +00:00
Mike Blumenkrantz f7527f7f65 glcpp: disable 'windows' tests
these timeout a lot

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8321>
2021-01-12 01:51:16 +00:00
Daniel Schürmann bd8e84eb8d nir: replace .lower_sub with .has_fsub and .has_isub
This allows a more fine-grained control about whether
a backend supports one of these instructions.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6597>
2021-01-11 19:13:51 +00:00
Daniel Schürmann b3ce55b445 nir,vc4: Lower fneg to fmul(x, -1.0)
This patch also replaces lower_negate with lower_ineg / lower_fneg.

The fneg semantics have been clarified as of Version 1.5, Revision 1
of the SPIR-V specification, which means that the previous lowering
to fsub is not a viable solution anymore, and is replaced with
lowering to fmul(x, -1.0).

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6597>
2021-01-11 19:13:51 +00:00
Erico Nunes faaba0d6af nir/lower_vec_to_movs: don't vectorize unsupports ops
If the instruction being coalesced would be vectorized but the target
doesn't support vectorizing that op, skip coalescing.
Reuse the callbacks from alu_to_scalar to describe which ops should not
be vectorized.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6506>
2021-01-11 13:13:30 +00:00
Rhys Perry b634d7f3e2 nir/opt_vectorize: fix srcs_equal() with two different non-const
To match hash_alu_src(), this should return false if both are different
non-const ssa defs.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8391>
2021-01-09 11:14:05 +00:00
Rhys Perry bdf316ae7b nir/opt_vectorize: fix typo in instr_can_rewrite()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8391>
2021-01-09 11:14:05 +00:00
Eric Anholt 670944ba04 nir/lower_locals_to_regs: Use the imul_imm helper instead of forcing it.
Cleaned up a bit of addressing math in the shader I just had to debug.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8373>
2021-01-08 21:04:31 +00:00
Rhys Perry f5adf27fb9 nir,radv: add and use nir_vectorize_tess_levels()
fossil-db (Sienna):
Totals from 1342 (0.97% of 138791) affected shaders:
CodeSize: 3287996 -> 3269572 (-0.56%); split: -0.56%, +0.00%
Instrs: 629896 -> 628191 (-0.27%); split: -0.31%, +0.04%
Cycles: 2619244 -> 2612424 (-0.26%); split: -0.30%, +0.04%
VMEM: 388807 -> 389273 (+0.12%); split: +0.14%, -0.02%
SMEM: 90655 -> 90700 (+0.05%); split: +0.06%, -0.01%
VClause: 21831 -> 21812 (-0.09%)
PreVGPRs: 44155 -> 44058 (-0.22%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4202>
2021-01-07 16:34:53 +00:00
Rhys Perry f199b7188b nir/load_store_vectorize: add data as callback args
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4202>
2021-01-07 16:34:53 +00:00
Rhys Perry 00c8bec47b nir: add nir_load_store_vectorize_options
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4202>
2021-01-07 16:34:53 +00:00
Rhys Perry f4eb833a12 nir/load_store_vectorize: don't ignore subgroup memory barriers
Not sure why I thought this was correct, but we should consider them for
optimization purposes.

Fixes: ce9205c03b ('nir: add a load/store vectorization pass')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4202>
2021-01-07 16:34:53 +00:00
Rhys Perry c73c246e05 nir: gather whether a compute shader uses non-quad subgroup intrinsics
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7918>
2021-01-07 15:01:02 +00:00
Rhys Perry f7a5b8ed35 vtn: support SpvCapabilitySparseResidency
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Rhys Perry 7d1d4acbd5 nir/lower_tex: fix lower_tg4_offsets with sparse fetches
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Rhys Perry 2d2decc905 nir: add sparse_residency_code_and
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Rhys Perry 4cbdf9ec4d nir,spirv: implement SpvOpImageSparseTexelsResident
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Rhys Perry 1fd8b46667 nir,spirv: add sparse image loads
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Rhys Perry 3a7972f72a nir,spirv: add sparse texture fetches
Like SPIR-V and GL_ARB_sparse_texture2, these return a residency code. It
is placed in the destination after the rest of the result. If it's zero,
then the texel is resident. Otherwise, it's not resident.

Besides the larger destination and the residency code, sparse fetches
work the same as normal fetches.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Rhys Perry 95819663b7 nir: allow 5 component vectors
These will be useful for sparse texture instructions and image load
intrinsics.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Rhys Perry ba4a73a502 nir/tests: fix callback for load/store vectorizer tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7774>
2021-01-06 20:36:38 +00:00
Daniel Schürmann 22b89d9a52 nir/opt_vectorize: fix call to filter function
Due to the typo, it could happen that instructions
got further vectorized than intended.

Fixes: 8eaf9c61d1 ('nir/opt_vectorize: don't hash filtered instructions')
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8352>
2021-01-06 19:03:07 +00:00
Christian Gmeiner c0fe111d64 nir: use intrinsic builders
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8295>
2021-01-06 14:34:41 +00:00
Mike Blumenkrantz b5fb66a5ed nir: preserve explicit_binding in lower_atomics_to_ssbo
it's important to be able to tell whether this is explicitly set by the
user

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7489>
2021-01-06 12:56:09 +00:00
Jesse Natalie 4d83306a9a nir: Update saturated float->int/uint conversion algorithm
The mantissa for a float doesn't contain enough data to accurately represent
the min/max values for some destination types. Instead of clamping before
converting, clamp after converting when coming from floats. This improves
conformance of CL conversions, specifically for float -> long/ulong with
int64 emulation enabled.

Refactors the limit determination from the clamp, so we can determine
limits for the dest type (int/uint) in both the source (float) and dest
type. The limit as a float is used for comparison, while the limit as a
dest type is used for bcsel.

Important note is that the comparison is inverted to fge instead of flt,
so the bcsel chooses the direct int/uint over the converted float in the
case where the comparison comes up equal, but the conversion can't produce
the exact min/max value.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8256>
2021-01-05 19:46:25 +00:00
Alexander von Gluck IV c7486c996e glsl/builtin_functions: Rename int64 function to int64_avail
* int64 is a core type on Haiku (and potentially other platforms)
* rename to int64_avail matching other similar calls

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2021-01-04 21:18:55 -06:00
Ian Romanick 539c25c2da nir/algebraic: Move the flrp -> bcsel rule earlier
If multiple rules could match, the rule that appears first in the file
is used.

Only Tiger Lake and Ice Lake are affected.  Other platforms either have
a LRP instruction or can't run any shaders from shader-db that would
benefit.

v2: Fix issues created when this commit was rebased on top of
3c8934a644 ("nir/algebraic: add flrp patterns for 16 and 64 bits").
Noticed by Caio.

Tiger Lake and Ice Lake had similar results.
total instructions in shared programs: 20908672 -> 20908661 (<.01%)
instructions in affected programs: 419 -> 408 (-2.63%)
helped: 5
HURT: 0
helped stats (abs) min: 1 max: 3 x̄: 2.20 x̃: 3
helped stats (rel) min: 1.85% max: 3.19% x̄: 2.49% x̃: 2.65%
95% mean confidence interval for instructions value: -3.56 -0.84
95% mean confidence interval for instructions %-change: -3.24% -1.73%
Instructions are helped.

total cycles in shared programs: 473513940 -> 473513793 (<.01%)
cycles in affected programs: 7176 -> 7029 (-2.05%)
helped: 12
HURT: 0
helped stats (abs) min: 5 max: 22 x̄: 12.25 x̃: 12
helped stats (rel) min: 0.84% max: 3.24% x̄: 2.09% x̃: 1.80%
95% mean confidence interval for cycles value: -15.43 -9.07
95% mean confidence interval for cycles %-change: -2.57% -1.61%
Cycles are helped.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick ec16f935fe nir/algebraic: Mark comparisons generated from lowered fsign precise
This prevents other transformations from converting them to 'a != 0'.
For example, both of these transformations can do this:

   (('~flt', 0.0, ('fabs', a)), ('fne', a, 0.0)),
   (('~flt', ('fneg', ('fabs', a)), 0.0), ('fne', a, 0.0)),

Both fsign(fabs(NaN)) and fsign(fneg(fabs(NaN))) should produce zero,
but, since 'NaN != 0.0' is true, cascading these transformations could
cause them to generate 1.0 or -1.0 respecively.

No shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick 9771af5dde nir/algebraic: Fix broken NaN and -0.0 behavior
No shader-db or fossil-db changes on any Intel platform.

v2: Add a coding line to fix SCons build problems caused by the ±
character.

Fixes: 25bfba3335 ("nir/algebraic: Recognize open-coded copysign(1.0, a)")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick 010e663cc3 spir-v: Mark floating point comparisons exact
OpenGL GLSL, OpenGL ARB assembly shaders, and DX9 are pretty loose about
the behavior in the presence of NaNs.  Many GPUs that implement these
specifications do not even have a representation of NaN.  However,
OpenCL and Vulkan SPIR-V are not so lax.  Both actually have some
required behavior in the presence of NaN, and, of the two, OpenCL is the
most strict.

For years we have implemented SPIR-V by using the same comparison
opcodes as we use for OpenGL GLSL and OpenGL assembly shaders.  This has
repeatedly caused problems where an optimization that is valid in the
NaN-relaxed world is not valid in Vulkan or OpenCL.  To fix this, set
the "exact" flag on comparisons instructions generated from SPIR-V.
This will block optimizations that may have different NaN behavior.

v2: Set the exact flag in the nir_builder, not in the vtn_builder.

v3: Add an assertion in vtn_handle_constant that the exact flag wasn't
set (because it's ignored).  Rebase on 80163bbec3 ("nir/vtn: Support
OpOrdered and OpUnordered opcodes").  Mark the NIR generated for those
opcodes as exact as well.

v4: s/unused_exact/exact/ in a couple places, and assert that exact has
the expected value (true in one place, false in the other).  Suggested
by Caio.

Closes: #3345
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Fixes: 8513b12590 ("nir/opt_if: split ALU from Phi more aggressively")

This commit doesn't really fix anything in 8513b12590.  However,
without 8513b12590, a regression is triggered in RADV on No Man's
Sky.  I want to ensure that this change is only applied on top of
8513b12590, and Fixes: seems the safest way to do that.

No shader-db changes on any Intel platform.  This only affects SPIR-V,
and we have no OpenGL SPIR-V shaders in shader-db.

124 shaders in Shadow of the Tomb Raider (Steam "native") were hurt by 1
spill and 1 fill each.

All Intel platforms had similar results. (Tiger Lake shown)
Instructions in all programs: 155668276 -> 155685764 (+0.0%)

SENDs in all programs: 6474570 -> 6474570 (+0.0%)

Loops in all programs: 35271 -> 35271 (+0.0%)

Cycles in all programs: 3198055373 -> 3198628031 (+0.0%)

Spills in all programs: 231522 -> 231646 (+0.1%)

Fills in all programs: 347571 -> 347695 (+0.0%)

Vega
Totals:
SGPRs: 20955712 -> 20956756 (+0.00%); split: -0.02%, +0.03%
VGPRs: 13476920 -> 13473132 (-0.03%); split: -0.07%, +0.04%
CodeSize: 613371940 -> 613339348 (-0.01%); split: -0.06%, +0.05%
MaxWaves: 3111886 -> 3112481 (+0.02%); split: +0.02%, -0.00%
Instrs: 120723785 -> 120746991 (+0.02%); split: -0.04%, +0.06%
Cycles: 626658992 -> 626862708 (+0.03%); split: -0.05%, +0.08%
VMEM: 216330854 -> 216343196 (+0.01%); split: +0.04%, -0.04%
SMEM: 32079391 -> 32081972 (+0.01%); split: +0.05%, -0.04%
VClause: 2688784 -> 2688789 (+0.00%); split: -0.03%, +0.03%
SClause: 6554669 -> 6556251 (+0.02%); split: -0.01%, +0.03%
Copies: 5356667 -> 5353283 (-0.06%); split: -0.36%, +0.29%
Branches: 954466 -> 954716 (+0.03%); split: -0.01%, +0.04%
PreSGPRs: 9078300 -> 9081626 (+0.04%); split: -0.01%, +0.05%
PreVGPRs: 10972090 -> 10966576 (-0.05%); split: -0.06%, +0.01%

Totals from 48239 (12.08% of 399432) affected shaders:
SGPRs: 2713984 -> 2715028 (+0.04%); split: -0.16%, +0.19%
VGPRs: 1997804 -> 1994016 (-0.19%); split: -0.46%, +0.27%
CodeSize: 172094092 -> 172061500 (-0.02%); split: -0.21%, +0.19%
MaxWaves: 337327 -> 337922 (+0.18%); split: +0.20%, -0.02%
Instrs: 33053657 -> 33076863 (+0.07%); split: -0.15%, +0.22%
Cycles: 254961228 -> 255164944 (+0.08%); split: -0.12%, +0.20%
VMEM: 15165226 -> 15177568 (+0.08%); split: +0.59%, -0.51%
SMEM: 3304938 -> 3307519 (+0.08%); split: +0.49%, -0.41%
VClause: 766225 -> 766230 (+0.00%); split: -0.12%, +0.12%
SClause: 1332645 -> 1334227 (+0.12%); split: -0.04%, +0.16%
Copies: 2040651 -> 2037267 (-0.17%); split: -0.94%, +0.77%
Branches: 743668 -> 743918 (+0.03%); split: -0.01%, +0.05%
PreSGPRs: 1697667 -> 1700993 (+0.20%); split: -0.07%, +0.27%
PreVGPRs: 1718424 -> 1712910 (-0.32%); split: -0.39%, +0.07%

Polaris
Totals:
SGPRs: 21349172 -> 21354376 (+0.02%); split: -0.02%, +0.04%
VGPRs: 13690680 -> 13686920 (-0.03%); split: -0.07%, +0.04%
CodeSize: 613745824 -> 613704988 (-0.01%); split: -0.06%, +0.05%
MaxWaves: 2775012 -> 2775189 (+0.01%); split: +0.01%, -0.00%
Instrs: 120735079 -> 120756209 (+0.02%); split: -0.04%, +0.06%
Cycles: 627906100 -> 628076156 (+0.03%); split: -0.05%, +0.08%
VMEM: 216623065 -> 216641838 (+0.01%); split: +0.04%, -0.04%
SMEM: 32295618 -> 32299338 (+0.01%); split: +0.05%, -0.04%
VClause: 2711025 -> 2711141 (+0.00%); split: -0.03%, +0.04%
SClause: 6545185 -> 6546769 (+0.02%); split: -0.01%, +0.03%
Copies: 5387723 -> 5383249 (-0.08%); split: -0.37%, +0.29%
Branches: 953775 -> 953954 (+0.02%); split: -0.01%, +0.03%
PreSGPRs: 9148814 -> 9153211 (+0.05%); split: -0.01%, +0.06%
PreVGPRs: 11029429 -> 11023915 (-0.05%); split: -0.06%, +0.01%

Totals from 48239 (12.00% of 402052) affected shaders:

SGPRs: 2682056 -> 2687260 (+0.19%); split: -0.16%, +0.35%
VGPRs: 1994436 -> 1990676 (-0.19%); split: -0.46%, +0.27%
CodeSize: 170857060 -> 170816224 (-0.02%); split: -0.21%, +0.19%
MaxWaves: 295429 -> 295606 (+0.06%); split: +0.07%, -0.01%
Instrs: 32808802 -> 32829932 (+0.06%); split: -0.16%, +0.22%
Cycles: 254633252 -> 254803308 (+0.07%); split: -0.13%, +0.20%
VMEM: 14897934 -> 14916707 (+0.13%); split: +0.65%, -0.52%
SMEM: 3289726 -> 3293446 (+0.11%); split: +0.53%, -0.42%
VClause: 775318 -> 775434 (+0.01%); split: -0.11%, +0.13%
SClause: 1304867 -> 1306451 (+0.12%); split: -0.04%, +0.16%
Copies: 2026334 -> 2021860 (-0.22%); split: -0.99%, +0.77%
Branches: 742554 -> 742733 (+0.02%); split: -0.02%, +0.04%
PreSGPRs: 1690887 -> 1695284 (+0.26%); split: -0.07%, +0.33%
PreVGPRs: 1717709 -> 1712195 (-0.32%); split: -0.40%, +0.07%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick 55621c6d1c nir/algebraic: Add some compare-with-zero optimizations that are exact
This prevents some fossil-db regressions in "spir-v: Mark floating point
comparisons exact".

v2: Note that the patterns and replacements produce the same value when
isnan(b).  Suggested by Caio.

v3: Use C99 isfinite() instead of (obsolete) BSD finite().  Fixes
various Windows builds.

No fossil-db changes on any Inetl platform, Vega, or Polaris10.

All Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 20908670 -> 20908672 (<.01%)
instructions in affected programs: 69 -> 71 (2.90%)
helped: 0
HURT: 1

total cycles in shared programs: 473515288 -> 473513940 (<.01%)
cycles in affected programs: 4942 -> 3594 (-27.28%)
helped: 2
HURT: 0

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick 9167324a86 nir/algebraic: Mark some logic-joined comparison reductions as exact
This also prevents some fossil-db regressions in "spir-v: Mark floating
point comparisons exact".

v2: Mark the fmin / fmax in the replacement exact to prevent other
optimizations from ruining the NaN-clensing property of the fmin / fmax.
Suggested by Rhys.  Don't assume that constants are not NaN because some
components of a vector might be NaN while others are numbers.  Noticed
by Rhys.  This causes ~8 more shaders in Age of Wonders III (dxvk) to
regress on cycles (not instructions) by less than 1% when "spir-v: Mark
floating point comparisons exact" is applied.  This difference is too
small to care.

All Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 20908668 -> 20908670 (<.01%)
instructions in affected programs: 9196 -> 9198 (0.02%)
helped: 10
HURT: 5
helped stats (abs) min: 1 max: 2 x̄: 1.40 x̃: 1
helped stats (rel) min: 0.02% max: 5.41% x̄: 2.20% x̃: 2.16%
HURT stats (abs)   min: 2 max: 6 x̄: 3.20 x̃: 3
HURT stats (rel)   min: 2.44% max: 16.67% x̄: 9.39% x̃: 12.50%
95% mean confidence interval for instructions value: -1.22 1.49
95% mean confidence interval for instructions %-change: -2.08% 5.41%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 473515330 -> 473515288 (<.01%)
cycles in affected programs: 67146 -> 67104 (-0.06%)
helped: 10
HURT: 7
helped stats (abs) min: 1 max: 36 x̄: 15.90 x̃: 17
helped stats (rel) min: 0.01% max: 1.29% x̄: 0.66% x̃: 0.89%
HURT stats (abs)   min: 1 max: 48 x̄: 16.71 x̃: 4
HURT stats (rel)   min: 0.08% max: 1.94% x̄: 0.87% x̃: 0.19%
95% mean confidence interval for cycles value: -13.88 8.94
95% mean confidence interval for cycles %-change: -0.56% 0.49%
Inconclusive result (value mean confidence interval includes 0).

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick 71961c73a9 nir: Correctly constant fold fsign(NaN) and fsign(-0)
GLSL and SPIR-V GLSL.std.450 don't have any requirements for fsign(NaN),
and both only require that FSign(-0.0) == 0.0.  OpenCL, on the other
hand, requires sign(-0.0) be exactly -0.0.  It also requires that
sign(NaN) be exactly 0.0.

In practice, this change is difficult to test.  Our GLSL frontend
already constant folds sign(NaN) to 0.0 before even getting to NIR.  As
far as I can tell, glslang does the same.  I don't have a good way to
run an OpenCL SPIR-V test.  Maybe SPIR-V GLSL.std.450 assembly?

No shader-db or fossil-db changes on any Intel platform.

Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick fe3c518277 nir/algebraic: Don't add reordered version of patterns for commutative instructions
The reordered are automatically considered by nir_algebraic rules for
commutative instructions.

No shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick 314a40c902 Revert "nir: Replace an odd comparison involving fmin of -b2f"
I originally noticed that 3b30814791 ("nir/algebraic: Optimize 1-bit
Booleans") caused this pattern no longer be matched by incorrectly
replacing b@32 with b@1.  Making that correct had no effect on
shader-db.  When this pattern originally was added, it only affected 4
shaders, so it's not worth the effort to debug further.

This reverts commit f50400cc80.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick aec0547838 nir/algebraic: Make some notes about comparison rearrangements versus infinity
The original comment was a little terse and a little incorrect.  The
rearrangements are fine w.r.t. NaN.  However, they produce incorrect
results if one operand is +Inf and the other is -Inf.

A later commit, "nir/algebraic: Add some compare-with-zero optimizations
that are exact", will add some more patterns here.  It may be reasonable
to squash this commit (forward) into that commit.

v2: Fix some incorrect comparisons operators in the comment (<= vs >=).
Add commentary that subtraction works like addition w.r.t. NaN.  Both
noticed / suggested by Caio.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Ian Romanick 363efc2823 nir: Make some notes about fsign versus NaN
This commit only documents the current behavior, even if that behavior
is not the behavior preferred by the relevant specs.

In SPIR-V, there are two flavors of the sign instruction, and each lives
in an extended instruction set.  The GLSL.std.450 FSign instruction is
defined as:

    Result is 1.0 if x > 0, 0.0 if x = 0, or -1.0 if x < 0.

This also matches the GLSL 4.60 definition.

However, the OpenCL.ExtendedInstructionSet.100 sign instruction is
defined as:

    Returns 1.0 if x > 0, -0.0 if x = -0.0, +0.0 if x = +0.0, or -1.0 if
    x < 0. Returns 0.0 if x is a NaN.

There are two differences.  Each treats -0.0 differently, and each also
treats NaN differently.  Specifically, GLSL.std.450 FSign does not
define any specific behavior for NaN.

There has been some discussion in Khronos about the NaN behavior of
GLSL.std.450 FSign.  As part of that discussion, I did some research
into how we treat NaN for nir_op_fsign, and this commit just captures
some of those notes.

v2: Document the expected behavior of nir_op_fsign more thoroughly.
Suggested by Rhys.  Note that the current implementation of constant
folding does not produce the expected result for NaN.  Suggested by
Caio.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> [v1]
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358>
2021-01-05 02:07:09 +00:00
Danylo Piliaiev 81132983cd nir: fix missing nir_lower_pntc_ytransform.c in the makefile
Fixes: 33fd9e5d "nir: account for point-coord origin when lowering it"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8308>
2021-01-04 15:37:20 +00:00
Danylo Piliaiev 33fd9e5d8a nir: account for point-coord origin when lowering it
The resulting point-coord origin not only depends on whether
the draw buffer is flipped but also on GL_POINT_SPRITE_COORD_ORIGIN
state. Which makes its transform differ from a transform of wpos.

On freedreno fixes:
 gl-3.2-pointsprite-origin
 gl-3.2-pointsprite-origin -fbo

Fixes: d934d320 "nir: Add flipping of gl_PointCoord.y in nir_lower_wpos_ytransform."
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8200>
2021-01-04 13:41:33 +00:00
Icecream95 1840404783 nir: Handle load_kernel_input in nir_get_io_offset_src
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Daniel Schürmann a3785e3481 nir/opt_vectorize: hash whether a swizzle accesses elements beyond the maximum vectorization factor
Swizzles that access components outside of the maximum
vector size cannot be vectorized with each other.
This patch creates different hash bins for this case.

For example accesses to .x and .y are considered different variables
compared to accesses to .z and .w for 16-bit vec2.

This prevents the vectorization of things like
   vec2 16 ssa_3 = iadd ssa_1.xz, ssa_2.xz

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann 46e7428031 nir/opt_vectorize: rehash users of vectorized instructions
This ensures that chains of ALU instructions are vectorized
in a single iteration.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann 8eaf9c61d1 nir/opt_vectorize: don't hash filtered instructions
This patch also changes nir_opt_vectorize_cb to
use only one instruction as parameter.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann 23b2885514 nir/opt_vectorize: don't hash instructions which are already vectorized
This guarantees that the hashset contains exactly the instructions
which can be vectorized.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann ad37e4df73 nir/opt_vectorize: use a single instruction per hash entry instead of a vector
This drastically simplifies vectorization but may potentially
lead to slightly worse vectorizations.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Samuel Pitoiset 0b503d8de9 nir: fix determining if an addition might overflow for phi sources
nir_addition_might_overflow() expects the parent instruction to be
an alu instr but it might be a phi instr. Fix it by assuming that
the addition might overflow.

This fixes compiler crashes with Horizon Zero Dawn.

No fossils-db changes.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8268>
2020-12-31 16:17:08 +00:00
Timothy Arceri 6c8cc9be12 glsl: default to compat shaders in compat profile
If the shader does not specify "core" or "compatibility" in shaders
above 1.40 we were defaulting these shaders to core shaders when
in a compat profile. Instead default to compat shaders.

This brings us inline with the behaviour of the binary drivers and
fixes a crash on start-up for the game Foundation.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3594

Fixes: c7e3d31b0b ("glsl: fix compat shaders in GLSL 1.40")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6993>
2020-12-30 11:47:49 +11:00
Danylo Piliaiev 9fe5859d5d nir/lower_fragcolor: handle dual source blending
With dual source blending only 1 draw buffer could be used.

For zink fixes tests:
 arb_blend_func_extended-fbo-extended-blend-pattern_gles2

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8247>
2020-12-29 19:19:16 +00:00
Jesse Natalie 3f77901342 nir: Add an algebraic optimization for float->double->float
As part of this series, it removes the need for float->double conversion,
just to be able to print a single float.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8254>
2020-12-29 09:07:24 +10:00
Jesse Natalie 24669a672f nir: Add a printf lowering pass (v5)
This pass creates a SSBO var for the printf buffer. It does an atomic increment
at the beginning of the buffer to determine where to write, then dumps
the args after that.

v2: [airlied]
Enhanced to use an index into a set of format info that is passed
back to the caller. The format info contains the number of args,
argument sizes and the format string.

v3: move format string lowering to vtn

v4: Jason reworked it.

v5: assume buffer has initial offset prebaked in and work from there.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8254>
2020-12-29 09:07:24 +10:00
Jesse Natalie 9524e9dbd0 nir/vtn: Implement printf opcode in terms of intrinsic (v9)
[airlied: rebase fixup types]

v2: add support for storing strings in a sideband storage,
just store the index in print buffer.

v3: move the format strings into the nir shader as well

v4: simplify the write constant string + explicit sizes
move printf cap definition.

v5: just parse the format string to find string specifiers
using util code.
add vtn_fail_if if we can't get the correct type.

v6: use ralloc + avoid instr handler for srcs > 5

v7: use a packed struct 4 bytes align all of it

v8: simplify constant copy

v9: rework to use a single string and common string
extract code, (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8254>
2020-12-29 09:07:23 +10:00
Jesse Natalie 2a3fe68c33 nir: Add intrinsic and string ptrs
This just adds the basic nir support for printf,
intrinsic, and support for storing the printf info.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8254>
2020-12-29 09:07:23 +10:00
Vinson Lee 671e1571d9 nir/tests: Initialize nir_serialize_test member dup.
Fix defect reported by Coverity Scan.

Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member dup is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8168>
2020-12-24 21:15:38 +00:00
Caio Marcelo de Oliveira Filho f41ae4d592 spirv2nir: Add --opengl (-g) argument for OpenGL SPIR-V
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8156>
2020-12-22 09:34:00 -08:00
cheyang ffe87c2689 glsl: remove unused state variable
Because compile_shader function state variable
not determine whether the compilation is successful.

Signed-off-by: cheyang <cheyang@bytedance.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8178>
2020-12-21 14:49:53 +00:00
Caio Marcelo de Oliveira Filho c4c9c780b1 spirv: Remove more dead variables
SPIR-V modules can have multiple shaders (including of the same
stage), but the global variables are all declared for the whole
module.  This can result in variables with same Binding but
incompatible types, so those need to be removed before we use.

Previously, a similar issue but with a narrower scope was fixed by
6775665e5e ("spirv: Eliminate dead input/output variables after
translation.").

This patch depends on the previous patch that prevents variables used
only in pointer initializers to be considered dead.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3686
Fixes: 3a266a18 ("nir/spirv: Add support for declaring variables")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8133>
2020-12-18 17:41:02 +00:00
Caio Marcelo de Oliveira Filho acce4ce04e nir: Consider pointer initializers in nir_remove_dead_variables
Between the creation of a shader (from GLSL or SPIRV frontends) and
nir_lower_variable_initializers is called, variables may refer to
other variables for initialization.  Those referred variables need to
be kept alive, so consider that in the pass.

Fixes: 7acc81056f ("compiler/nir: Add support for variable initialization from a pointer")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8133>
2020-12-18 17:41:02 +00:00
Caio Marcelo de Oliveira Filho 577bfba959 nir: Remove unused parameter in remove_dead_var_writes
And destroy the live set earlier in nir_remove_dead_variables.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8133>
2020-12-18 17:41:02 +00:00
Caio Marcelo de Oliveira Filho 617d8d3788 nir: Fix outdated name in comment
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8133>
2020-12-18 17:41:02 +00:00
Caio Marcelo de Oliveira Filho f65750d221 spirv: Implement OpArrayLength for OpenGL
Uses same NIR intrinsic as glsl_to_nir.  Make it an option so it is
easy later to move Vulkan drivers incrementally to use it.

Fixes piglit test spec/arb_gl_spirv/execution/ssbo/unsized-array-length.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3691
Fixes: 15e43907 ("iris: Enable ARB_gl_spirv and ARB_spirv_extensions")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8136>
2020-12-18 17:13:46 +00:00
Marek Olšák 884e84035e mesa: remove unused LastUniformIndex
This is now dead code.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8046>
2020-12-18 04:53:44 +00:00