nir: Add AMD-specific Geometry Shader related intrinsics.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
This commit is contained in:
Timur Kristóf 2021-02-22 20:16:32 +01:00 committed by Marge Bot
parent 38df949f98
commit 4c5c610f1d
2 changed files with 8 additions and 0 deletions

View File

@ -141,6 +141,8 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_load_ring_tess_offchip_amd:
case nir_intrinsic_load_ring_tess_factors_offset_amd:
case nir_intrinsic_load_ring_tess_offchip_offset_amd:
case nir_intrinsic_load_ring_esgs_amd:
case nir_intrinsic_load_ring_es2gs_offset_amd:
is_divergent = false;
break;
@ -479,6 +481,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_elect:
case nir_intrinsic_load_tlb_color_v3d:
case nir_intrinsic_load_tess_rel_patch_id_amd:
case nir_intrinsic_load_gs_vertex_offset_amd:
is_divergent = true;
break;

View File

@ -1147,11 +1147,16 @@ system_value("ring_tess_offchip_offset_amd", 1)
# Descriptor where TCS outputs are stored for the HW tessellator
system_value("ring_tess_factors_amd", 4)
system_value("ring_tess_factors_offset_amd", 1)
# Descriptor where ES outputs are stored for GS to read on GFX6-8
system_value("ring_esgs_amd", 4)
system_value("ring_es2gs_offset_amd", 1)
# Number of patches processed by each TCS workgroup
system_value("tcs_num_patches_amd", 1)
# Relative tessellation patch ID within the current workgroup
system_value("tess_rel_patch_id_amd", 1)
# Vertex offsets used for GS per-vertex inputs
system_value("gs_vertex_offset_amd", 1, [BASE])
# V3D-specific instrinc for tile buffer color reads.
#