Commit Graph

148741 Commits

Author SHA1 Message Date
Lionel Landwerlin 8ef9350ff0 intel/devinfo: drop num_eus_per_subslice field
This field is an average computation that is not actually useful for
any of our driver code.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Lionel Landwerlin 5d5a1b660b intel/devinfo: add a helper to check for slice availability
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Lionel Landwerlin 1c5b206366 intel/devinfo: printout devinfo struct size
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Lionel Landwerlin 574ba30fb4 intel/devinfo: printout pixel pipes in info printout
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14510>
2022-01-12 12:53:21 +00:00
Pierre-Eric Pelloux-Prayer d8ba48e447 radeonsi/tests: add expected results for vega20
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14454>
2022-01-12 11:39:53 +00:00
Pierre-Eric Pelloux-Prayer d299d81919 radeonsi/tests: update expected results
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14454>
2022-01-12 11:39:53 +00:00
Pierre-Eric Pelloux-Prayer 86262b6eac radeonsi,radv: fix usages of surf_pitch
For linear textures, pitch[level] should be used instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14454>
2022-01-12 11:39:53 +00:00
Pierre-Eric Pelloux-Prayer 2f8982df0e radeonsi/gfx10: fix si_texture_get_offset for mipmapped tex
Pitch can be different per-level so adjust stride and offset.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5792
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14454>
2022-01-12 11:39:53 +00:00
Samuel Pitoiset 9cd8908c03 radv: fix computing the fb size in presence of dynamic VRS attachment
This fixes
dEQP-VK.fragment_shading_rate.dynamic_rendering.attachment_rate.*.

Fixes: e914a6710f ("radv: Expose the VK_KHR_dynamic_rendering extension.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14421>
2022-01-12 11:16:31 +00:00
Samuel Pitoiset 9c746157ae radv: reset VRS if the current subpass doesn't have a VRS attachment
With a scenario like:
BeginRP(DS + VRS att)
Draw()
EndRP()
BeginRP(same DS)
Draw()
EndRP()

The second draw shouldn't use VRS but it did because the VRS bit
is always set during DS surface initialization if a surface can use VRS.
So, it would have been using the previous copied VRS rates.

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14443>
2022-01-12 10:22:29 +00:00
Samuel Pitoiset ec4dcd53db radv: stop checking if dynamic states changed
This is costly for the CPU and might hurt "good" applications that
already avoid that like DXVK/vkd3d-proton.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5009
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12441>
2022-01-12 09:48:29 +00:00
Lionel Landwerlin 567a9550d7 ci: disable vs2019 windows build
Failing with :

   error during connect: In the default daemon configuration on
   Windows, the docker client must be run with elevated privileges to
   connect.: Post http://%2F%2F.%2Fpipe%2Fdocker_engine/v1.24/auth:
   open //./pipe/docker_engine: The system cannot find the file
   specified.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14509>
2022-01-12 09:04:29 +00:00
Nanley Chery 912acbf963 anv,iris: Flush HDC before color fast clears
Needed for XeHP (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery f3c629733f anv,iris: PSS Stall Sync around color fast clears
Needed for XeHP (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery 8ec8298ce4 intel: Rename the PSD bit in PIPE_CONTROL for XeHP
The name of the field now starts with PSS Stall instead of PSD.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery de5f1cdd31 anv,iris: Depth stall around color fast clears
Needed for TGL (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery 34c8371e2a anv,iris: Flush tile cache after color fast clears
Needed for TGL (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Bas Nieuwenhuizen 38b3661b8f radv: 256 byte push constants.
This helps vkd3d-proton, especially when indirecting more stuff.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14485>
2022-01-12 01:08:39 +00:00
Bas Nieuwenhuizen 43f8e07765 radv: Use 16-bits to store push constant indices.
Otherwise things horrible go wrong when we get 256 bytes of push
constants.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14485>
2022-01-12 01:08:39 +00:00
Bas Nieuwenhuizen 3a36d0b787 radv: Use MAX_PUSH_CONSTANTS_SIZE for saved push constants.
So that it can never again get out of sync.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14485>
2022-01-12 01:08:39 +00:00
Mike Blumenkrantz b6499dff37 zink: use device-local heap for sparse backing allocations
backing allocations are real allocations, so they shouldn't be initialized
as sparse containers

Fixes: 40fdb3212c ("zink: add a suballocator")

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14394>
2022-01-12 00:03:00 +00:00
Marcin Ślusarz f286ecf906 nir: handle per-view clip/cull distances
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Marcin Ślusarz 70a9710eee spirv: mark [Clip|Cull]DistancePerViewNV variables as compact
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Marcin Ślusarz 0d6f83cbf1 nir: remove invalid assert affecting per-view variables
per-view variables can have arbitrary (but > 0) number of array levels

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Marcin Ślusarz ce5a8bff77 spirv: handle multiview bits of SPV_NV_mesh_shader
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Marcin Ślusarz 4fed440724 nir: add load_mesh_view_count and load_mesh_view_indices intrinsics
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Marcin Ślusarz e4ff7fd76a spirv: add MeshViewCountNV/MeshViewIndidcesNV builtins from SPV_NV_mesh_shader
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Marcin Ślusarz 561de760fd compiler: add new MESH_VIEW_COUNT/MESH_VIEW_INDICES system values
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Marcin Ślusarz 4cb7dcb097 spirv: handle ViewportMaskNV builtin/cap from SPV_NV_mesh_shader
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14263>
2022-01-11 22:45:23 +00:00
Nanley Chery 1619279219 intel/isl: Return false more in isl_surf_get_hiz_surf
Follow the CCS and MCS functions by returning false for unsupported
cases. This reduces the burden on the caller.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
2022-01-11 20:06:02 +00:00
Nanley Chery b77d694223 intel/isl: Allow HiZ with Tile4/64 surfaces
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
2022-01-11 20:06:02 +00:00
Nanley Chery 50967402cc intel/isl: Require Y-tiling for depth on gfx4-5
This enables isl_surf_get_hiz_surf to be simplified.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
2022-01-11 20:06:02 +00:00
Nanley Chery 267689a269 intel/isl: Use a new HiZ format on XeHP+
The new HiZ compresses twice as many rows of the depth surface compared
to TGL (Bspec 47009). Also, its tiling needs to be specified in
3DSTATE_HIER_DEPTH_BUFFER_BODY::TiledMode.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
2022-01-11 20:06:02 +00:00
Nanley Chery 7d0e847856 intel/isl: Update comment for the XeHP HiZ block
An 8x4 HiZ block doesn't fit in with the new formulas for sizing HiZ on
XeHP. Update a comment which assumed this block size on SKL+.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
2022-01-11 20:06:02 +00:00
Nanley Chery e0ddeec209 intel/isl: Rework HiZ image align calculations
* Check the format's compression type instead of the format directly to
  prepare for a new HiZ format on XeHP.
* Adjust the gfx12+ calculations so that XeHP will automatically be
  handled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
2022-01-11 20:06:02 +00:00
Nanley Chery 30615794e4 blorp: Drop multisampled code in blorp_can_hiz_clear_depth
Anv allows non-8x4-aligned depth buffer clears, but it has multisampled
HiZ disabled for BDW. iris allows multisampled HiZ on BDW, but disallows
non-8x4-aligned depth buffer clears.

Drop the unused optimization for non-8x4-aligned clears of multisampled
surfaces on BDW and use this opportunity to use some PRM text in the
code comment.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14091>
2022-01-11 20:06:02 +00:00
Felix DeGrood 0a01d2c04f anv: increase binding table pool size to 64KB
Binding table pool runs out of capacity quickly on modern games,
requiring new Surface Base Address instructions to be sent. That
is costly due to flushes and stalls.  Increasing BT pool capacity
to 64KB improves performance several workloads.

Fallout4 +4%
Shadow of the Tomb Raider +4%
Borderlands3 +3%

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14483>
2022-01-11 19:47:30 +00:00
Lionel Landwerlin d6c0d16791 intel/dev: fixup chv workaround
We're using the wrong helper to get the subslice total count.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c24ba6cecb ("intel/dev: Handle CHV CS thread weirdness in get_device_info_from_fd")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14492>
2022-01-11 19:02:57 +00:00
Jason Ekstrand c8d364cb9d turnip: Use vk_common_QueueSignalReleaseImageANDROID for DRM
It's identical to the one turnip copy+pasted from RADV.  For KGSL, we
still need to hand-roll because of all the emulated stuff.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14411>
2022-01-11 17:25:22 +00:00
Jason Ekstrand 5b8b6315e4 turnip: Use vk_common_AcquireImageANDROID
It's got some bug fixes that turnip never picked up.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14411>
2022-01-11 17:25:22 +00:00
Pavel Ondračka 66ea0f84c2 r300: use point sprite coordinates only when drawing points (v5)
Fixes piglit arb_point_sprite-interactions
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/364
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/370

Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14389>
2022-01-11 16:56:18 +00:00
Mike Blumenkrantz 3e5f4cebe8 zink: add extra synchronization for buffer descriptor binds
"most" times it isn't necessary to insert any pipeline barriers when binding
descriptors, as GL requires explicit barrier usage which comes through a different
codepath

the exception here is when the following scenario occurs:
* have buffer A
* buffer_subdata is called on A
* discard path is taken || A is not host-visible
* stream uploader is used for host write
* CmdCopyBuffer is used to copy the data back to A
buffer A now has a pending TRANSFER write that must complete before the buffer is
used in a shader, so synchronization is required any time TRANSFER usage is detected
in a bind

there's also going to be more exceptions going forward as more internal usage is added,
so just remove the whole fake-barrier mechanism since it'll become more problematic
going forward

Cc: 21.3 mesa-stable

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14496>
2022-01-11 16:18:56 +00:00
Jesse Natalie 5028630bd6 d3d12/ci: Skip flaky tex-miplevel-selection and timestamp tests
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14494>
2022-01-11 15:51:40 +00:00
Mike Blumenkrantz d15ff96da2 zink: always unset vertex shader variant key data when changing last vertex stage
ensure that vertex key data is always zeroed when changing last stage since it will
be updated before draw anyway and can only cause problems if left alone here

fixes the following caselist:
dEQP-GLES31.functional.shaders.builtin_constants.tessellation_shader.max_tess_evaluation_texture_image_units
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_quads_geometry_output_points
dEQP-GLES31.functional.ubo.random.all_per_block_buffers.25

cc: mesa-stable

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14482>
2022-01-11 15:21:08 +00:00
Mike Blumenkrantz a9545153a0 zink: add some wsi instance extensions
not used for now

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14426>
2022-01-11 14:54:24 +00:00
Mike Blumenkrantz 394c7f3f62 zink: add missing assert for 8bit vertex decompose
verify that this bit was set above

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14380>
2022-01-11 14:16:34 +00:00
Pierre-Eric Pelloux-Prayer 7650e6fc4c radv: implement wsi's private transfer queue using SDMA
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Pierre-Eric Pelloux-Prayer 7bd5aa111c vulkan/wsi: add a private transfer pool to exec the DRI_PRIME blit
The idea is to offer the driver a way to execute on a different queue
than the one the app is using for Present.

For instance, this could be used to make the DRI_PRIME blit asynchronous,
by using a transfer queue.

So instead of creating a command buffer to be executed on present using
the supplied queue, this commit uses an internal transfer queue to perform
the blit.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Pierre-Eric Pelloux-Prayer 0ad7ec56c9 vulkan/wsi: add use_prime_blit param to wsi_swapchain_init
Instead of initializing it to false and overriding it later if
needed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Pierre-Eric Pelloux-Prayer d6ea60d5a2 radv: allocate the prime buffer as uncached
This is a write only buffer so caches aren't needed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00