anv,iris: Flush HDC before color fast clears

Needed for XeHP (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
This commit is contained in:
Nanley Chery 2021-11-08 11:41:20 -05:00 committed by Marge Bot
parent f3c629733f
commit 912acbf963
2 changed files with 6 additions and 0 deletions

View File

@ -261,6 +261,8 @@ fast_clear_color(struct iris_context *ice,
PIPE_CONTROL_TILE_CACHE_FLUSH |
(devinfo->verx10 == 120 ?
PIPE_CONTROL_DEPTH_STALL : 0) |
(devinfo->verx10 == 125 ?
PIPE_CONTROL_FLUSH_HDC : 0) |
PIPE_CONTROL_PSS_STALL_SYNC);
iris_batch_sync_region_start(batch);

View File

@ -1880,6 +1880,8 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,
ANV_PIPE_TILE_CACHE_FLUSH_BIT |
(devinfo->verx10 == 120 ?
ANV_PIPE_DEPTH_STALL_BIT : 0) |
(devinfo->verx10 == 125 ?
ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0) |
ANV_PIPE_PSS_STALL_SYNC_BIT |
ANV_PIPE_END_OF_PIPE_SYNC_BIT,
"before fast clear mcs");
@ -1974,6 +1976,8 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
ANV_PIPE_TILE_CACHE_FLUSH_BIT |
(devinfo->verx10 == 120 ?
ANV_PIPE_DEPTH_STALL_BIT : 0) |
(devinfo->verx10 == 125 ?
ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0) |
ANV_PIPE_PSS_STALL_SYNC_BIT |
ANV_PIPE_END_OF_PIPE_SYNC_BIT,
"before fast clear ccs");