Commit Graph

95875 Commits

Author SHA1 Message Date
Marek Olšák 3824ca7610 radeonsi: implement pipe_context::fence_server_sync
This will be more useful once we have sync_file support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák 8843bf6dfd winsys/amdgpu: factor out some fence dependency code into separate functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák a6eb164eb2 winsys/amdgpu: rename fence_dependency functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák fc45495474 gallium/radeon: add a proper fail path for calloc in r600_flush_from_st
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák 7213293fe2 winsys/amdgpu: don't allow interprocess resource sharing for IBs
Now we should get IB submissions with bo_list == NULL when DRI buffers
aren't referenced.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák 46e7478986 radeonsi/gfx9: fix interprocess resource sharing on Raven
This kinda fragiile, but it at least unbreaks the driver.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Nicolai Hähnle 03203b7448 st/glsl_to_tgsi: only the first (inner-most) array reference can be a 2D index
Don't get distracted by record dereferences between array references.

Fixes dEQP-GLES31.functional.tessellation.user_defined_io.per_vertex_block.*

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-11 15:03:57 +02:00
Samuel Iglesias Gonsálvez 5b1b088f2a nir/spirv: fix chain access with different index bit sizes
Currently we support 32-bit indexes/offsets all over the driver, so we
convert them to that bit size.

Fixes dEQP-VK.spirv_assembly.instruction.*.indexing.*

v2: Use u2u32 instead (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-11 10:03:39 +02:00
Dave Airlie 8d6b97a815 r600: handle the non-TXF_LZ support path.
it appears that texcoord.z/w will be 0 in all cases already,
so just put them into the vbo always.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 02:10:24 +02:00
Marek Olšák c1d92f8222 gallium/u_blitter: use UTIL_BLITTER_ATTRIB_NONE (0) instead of 0 directly
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:24 +02:00
Marek Olšák 005fa89bfa gallium/u_blitter: don't pass GENERIC in VS if it's not needed
Now, depth-only clears and custom passes don't read memory in VS.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:24 +02:00
Marek Olšák 22ed1ba01a gallium/u_blitter: use draw_rectangle for all blits except cubemaps
Add ZW coordinates to the draw_rectangle callback and use it.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:24 +02:00
Marek Olšák 43247c440e gallium/u_blitter: use draw_rectangle callback for layered clears
They are done with instancing.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:23 +02:00
Marek Olšák 7aaf4c73de gallium/u_blitter: add new union blitter_attrib to replace pipe_color_union
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:23 +02:00
Marek Olšák e4c457f695 gallium/radeon: use rectangles for 1D and 2D texture blits
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 02:10:23 +02:00
Eric Engestrom ce7164252e i965/tex: add missing include
src/mesa/drivers/dri/i965/intel_tex.h:52:40: warning: ‘enum intel_miptree_create_flags’ declared inside parameter list will not be visible outside of this definition or declaration
                 enum intel_miptree_create_flags flags);
                      ^~~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: cadcd89278 "i965/tex: Change the flags type on
                             create_for_teximage"
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-10 13:14:06 +01:00
Bas Nieuwenhuizen e3c9425158 radv: Actually check for vm faults.
The code can check for vm faults having happened. If we only do it
on a hang we don't know when the faults happened. This changes the
behavior to when the first VM faults is found, even without a hang.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-09-09 11:50:30 +02:00
Roland Scheidegger 57a341b0a9 llvmpipe, draw: improve shader cache debugging
With GALLIVM_DEBUG=perf set, output the relevant stats for shader cache usage
whenever we have to evict shader variants.
Also add some output when shaders are deleted (but not with the perf setting
to keep this one less noisy).
While here, also don't delete that many shaders when we have to evict. For fs,
there's potentially some cost if we have to evict due to the required flush,
however certainly shader recompiles have a high cost too so I don't think
evicting one quarter of the cache size makes sense (and, if we're evicting
based on IR count, we probably typically evict only very few or just one
shader too). For vs, I'm not sure it even makes sense to evict more than
one shader at a time, but keep the logic the same for now.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-09-09 03:06:10 +02:00
Roland Scheidegger 772f475351 llvmpipe: enable PIPE_CAP_QUERY_PIPELINE_STATISTICS
This was implemented since forever, but not enabled.
It passes all piglit tests except one, arb_pipeline_statistics_query-frag.
The reason is that the test (for drawing a 10x10 rect) expects between
100 and 150 pixel shader invocations. But since llvmpipe counts this with
4x4 granularity (and due to the rect being 2 tris) we end up with 224
invocations. I believe however what llvmpipe is doing violates neither the
spirit nor the letter of the spec (our fragment shader granularity really
is 4x4 pixels, albeit we will bail out early on 2x2 or 4x2 (the latter
if AVX is available) granularity), the spec allows to count additional
invocations due to implementation reasons.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-09-09 03:06:10 +02:00
Roland Scheidegger dcf2feadc3 gallivm: fix gather implementation a bit
gather is defined in terms of bilinear filtering, just without the filtering
part. However, there's actually some subtle differences required in our
implementation, because we use some tricks to simplify coord wrapping for the
two coords per direction.
For bilinear filtering, we don't care if we end up with an incorrect
texel, as long as the filter weight is 0.0 for it. Likewise, the order of
the texels doesn't actually matter (as long as they still have the correct
filter weight).
But for gather, these tricks lead to incorrect results.
Fix this for CLAMP_TO_EDGE, and add some comments to the other wrap functions
which look broken (the 3 mirror_clamp plus mirror_repeat) (too complex to fix
right now, and noone really seems to care...).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-09-09 03:06:10 +02:00
Andres Gomez 30682fba77 docs: update calendar, add news item and link release notes for 17.1.9
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-09-09 02:15:41 +03:00
Andres Gomez 97dce9e278 docs: add sha256 checksums for 17.1.9
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-09-09 02:11:21 +03:00
Andres Gomez 1e1131782c docs: add release notes for 17.1.9
Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-09-09 02:11:19 +03:00
Brian Paul 832990c0ce mesa: whitespace, formatting fixes in teximage.c
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-09-08 13:58:51 -06:00
Brian Paul 33c55e8a9d mesa: provide more info in some texture image error messages
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-09-08 13:58:40 -06:00
Charmaine Lee 57d9222ef2 svga: abort shader translation upon indirect indexing of temporaries
This patch aborts shader translation upon indirect indexing of temporary
register on non-vgpu10 device. This prevents non-supported feature
sending to the device.

Tested wth MTT-piglit, glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-09-08 13:58:38 -06:00
Samuel Pitoiset 885d75760b radv: keep track of the disasm string in debug mode only
This will allow to dump the active shaders when a hang is
detected. Only the ASM will be dumped for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 17:18:17 +02:00
Samuel Pitoiset 92db23f3f9 radv: add shader_variant_create() helper function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 17:17:40 +02:00
Samuel Pitoiset 47efc5264a radv: drop 'dump' parameters from some shader related functions
The device object contains the debug flags.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 17:17:40 +02:00
Samuel Pitoiset d4d777317b radv: move shaders related code to radv_shader.c
Reduce size of radv_pipeline.c and improve code isolation. More
code can probably moved but it's a start.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 17:17:40 +02:00
Samuel Pitoiset 988d792375 radv: fix error code when initializing the push descriptors
malloc() failures are unrelated to the device memory.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 16:15:21 +02:00
Samuel Pitoiset 67ee31a086 radv: do not update vertex descriptors if the allocation failed
A return code error is stored in the command buffer and should
be returned to the user via EndCommandBuffer().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 16:04:51 +02:00
Samuel Pitoiset fefbcb090d radv: add radv_vertex_elements_info data structure
In my opinion, this improves code readability.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 16:04:51 +02:00
Eric Engestrom f77d06fb28 gallium/tests: use ARRAY_SIZE macro
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-08 10:29:40 +01:00
Eric Engestrom db8c5ae853 r300: use ARRAY_SIZE macro
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-08 10:29:40 +01:00
Eric Engestrom 440ab62341 glx: use ARRAY_SIZE macro
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Jon Turney <jon.turney@dronecode.org.uk>
2017-09-08 10:29:40 +01:00
Samuel Pitoiset b33b85cdd4 radv: add an assertion when pushing meta descriptor sets
Just to make sure we are using the set 0, because it's the
only one which is saved/restored when doing meta operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-08 09:42:23 +02:00
Thomas Hellstrom 6e2b87c7e9 mesa/st: Fix frontbuffer rendering regression
This fixes a regression introduced with commit
"mesa/st: Reduce the number of frontbuffer flush calls"
where we, after flushing the front buffer marked it as not-rendered-to,
the idea being that it should be marked as "rendered-to" again as soon as
any rendering was touching the front.

Now the latter part never happened, because it was part of a state
validation and we never marked that part of the state as dirty.

So mark the framebuffer state dirty after a frontbuffer flush.
(fdo bugzilla 102496)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102496
Fixes: eceb671002 (mesa/st: Reduce the number of frontbuffer flush calls)
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
2017-09-08 09:26:18 +02:00
Kenneth Graunke 44ac54a3fd i965: Don't special case the batchbuffer when reference counting.
We don't need to special case the batch - when we add the batch to the
validation list, we can simply increase the refcount to 2, and when we
make a new batch, we'll drop it back down to 1 (when unreferencing all
buffers in the validation list).  The final reference is still held by
brw->batch.bo, as it was before.

This removes the special case from a bunch of loops.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-09-08 00:21:09 -07:00
Connor Abbott b909d278d0 ac: remove bitcast_to_float()
ac_to_float() does a superset of what it does.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:24:56 +01:00
Connor Abbott 50967cd0b0 ac: move ac_to_integer() and ac_to_float() to ac_llvm_build.c
We'll need to use ac_to_integer() for other stuff in ac_llvm_build.c.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:24:02 +01:00
Connor Abbott fafa299511 ac: fix ac_get_type_size() for doubles
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:19:47 +01:00
Dave Airlie 4cab214e76 radv/ac: use ac_get_type_size.
Just moved to newly shared code.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:15:50 +01:00
Connor Abbott b8a51c8c4b radeonsi: move the guts of ARB_shader_group_vote emission to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:12:49 +01:00
Connor Abbott bd73b89792 radeonsi: move si_emit_ballot() to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:12:42 +01:00
Connor Abbott ac27fa7294 radeonsi: move emit_optimization_barrier() to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:06:47 +01:00
Connor Abbott c181d4f2b7 radeonsi: move llvm_get_type_size() to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:04:16 +01:00
Dave Airlie a5add6fb30 radv/winsys: fix flags vs va_flags thinko.
Fixes: e8d57802f (radv/gfx9: allocate events from uncached VA space)
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 12:30:23 +10:00
Dave Airlie 219d29e4d8 radv: use simpler indirect packet 3 if possible.
This fixes some observed hangs on CIK GPUs.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-07 21:05:16 +01:00
Dave Airlie e8d57802fe radv/gfx9: allocate events from uncached VA space
This copies what amdgpu-pro does, and allocates the memory
for an event with an uncached mtype.

This fixes hangs with:
dEQP-VK.api.command_buffers.record_simul_use_primary

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-07 21:04:54 +01:00