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radv: drop 'dump' parameters from some shader related functions 

The device object contains the debug flags.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset 2017-09-01 12:09:56 +02:00
parent d4d777317b
commit 47efc5264a
3 changed files with 19 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/amd/vulkan/radv_pipeline.c
View File

@ -166,7 +166,6 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
nir_shader *nir;
void *code = NULL;
unsigned code_size = 0;
bool dump = (pipeline->device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
if (module->nir)
_mesa_sha1_compute(module->nir->info.name,
@ -196,14 +195,14 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
nir = radv_shader_compile_to_nir(pipeline->device,
module, entrypoint, stage,
spec_info, dump);
spec_info);
if (nir == NULL)
return NULL;
if (!variant) {
variant = radv_shader_variant_create(pipeline->device, nir,
layout, key, &code,
&code_size, dump);
&code_size);
}
if (stage == MESA_SHADER_GEOMETRY && !pipeline->gs_copy_shader) {
@ -211,7 +210,7 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
unsigned gs_copy_code_size = 0;
pipeline->gs_copy_shader = radv_create_gs_copy_shader(
pipeline->device, nir, &gs_copy_code,
&gs_copy_code_size, dump, key->has_multiview_view_index);
&gs_copy_code_size, key->has_multiview_view_index);
if (pipeline->gs_copy_shader) {
pipeline->gs_copy_shader =
@ -278,7 +277,6 @@ radv_tess_pipeline_compile(struct radv_pipeline *pipeline,
unsigned tes_code_size = 0, tcs_code_size = 0;
struct ac_shader_variant_key tes_key;
struct ac_shader_variant_key tcs_key;
bool dump = (pipeline->device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
tes_key = radv_compute_tes_key(radv_pipeline_has_gs(pipeline),
pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input);
@ -316,13 +314,13 @@ radv_tess_pipeline_compile(struct radv_pipeline *pipeline,
tes_nir = radv_shader_compile_to_nir(pipeline->device,
tes_module, tes_entrypoint, MESA_SHADER_TESS_EVAL,
tes_spec_info, dump);
tes_spec_info);
if (tes_nir == NULL)
return;
tcs_nir = radv_shader_compile_to_nir(pipeline->device,
tcs_module, tcs_entrypoint, MESA_SHADER_TESS_CTRL,
tcs_spec_info, dump);
tcs_spec_info);
if (tcs_nir == NULL)
return;
@ -331,7 +329,7 @@ radv_tess_pipeline_compile(struct radv_pipeline *pipeline,
tes_variant = radv_shader_variant_create(pipeline->device, tes_nir,
layout, &tes_key, &tes_code,
&tes_code_size, dump);
&tes_code_size);
tcs_key = radv_compute_tcs_key(tes_nir->info.tess.primitive_mode, input_vertices);
if (tcs_module->nir)
@ -343,7 +341,7 @@ radv_tess_pipeline_compile(struct radv_pipeline *pipeline,
tcs_variant = radv_shader_variant_create(pipeline->device, tcs_nir,
layout, &tcs_key, &tcs_code,
&tcs_code_size, dump);
&tcs_code_size);
if (!tes_module->nir)
ralloc_free(tes_nir);

17
src/amd/vulkan/radv_shader.c
View File

@ -150,8 +150,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
struct radv_shader_module *module,
const char *entrypoint_name,
gl_shader_stage stage,
const VkSpecializationInfo *spec_info,
bool dump)
const VkSpecializationInfo *spec_info)
{
if (strcmp(entrypoint_name, "main") != 0) {
radv_finishme("Multiple shaders per module not really supported");
@ -263,7 +262,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
nir_remove_dead_variables(nir, nir_var_local);
radv_optimize_nir(nir);
if (dump)
if (device->debug_flags & RADV_DEBUG_DUMP_SHADERS)
nir_print_shader(nir, stderr);
return nir;
@ -381,8 +380,7 @@ radv_shader_variant_create(struct radv_device *device,
struct radv_pipeline_layout *layout,
const struct ac_shader_variant_key *key,
void **code_out,
unsigned *code_size_out,
bool dump)
unsigned *code_size_out)
{
struct radv_shader_variant *variant = calloc(1, sizeof(struct radv_shader_variant));
enum radeon_family chip_family = device->physical_device->rad_info.family;
@ -407,7 +405,8 @@ radv_shader_variant_create(struct radv_device *device,
tm_options |= AC_TM_SISCHED;
tm = ac_create_target_machine(chip_family, tm_options);
ac_compile_nir_shader(tm, &binary, &variant->config,
&variant->info, shader, &options, dump);
&variant->info, shader, &options,
device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
LLVMDisposeTargetMachine(tm);
radv_fill_shader_variant(device, variant, &binary, shader->stage);
@ -429,7 +428,7 @@ radv_shader_variant_create(struct radv_device *device,
struct radv_shader_variant *
radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir,
void **code_out, unsigned *code_size_out,
bool dump_shader, bool multiview)
bool multiview)
{
struct radv_shader_variant *variant = calloc(1, sizeof(struct radv_shader_variant));
enum radeon_family chip_family = device->physical_device->rad_info.family;
@ -448,7 +447,9 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir,
if (device->instance->perftest_flags & RADV_PERFTEST_SISCHED)
tm_options |= AC_TM_SISCHED;
tm = ac_create_target_machine(chip_family, tm_options);
ac_create_gs_copy_shader(tm, nir, &binary, &variant->config, &variant->info, &options, dump_shader);
ac_create_gs_copy_shader(tm, nir, &binary, &variant->config,
&variant->info, &options,
device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
LLVMDisposeTargetMachine(tm);
radv_fill_shader_variant(device, variant, &binary, MESA_SHADER_VERTEX);

8
src/amd/vulkan/radv_shader.h
View File

@ -66,8 +66,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
struct radv_shader_module *module,
const char *entrypoint_name,
gl_shader_stage stage,
const VkSpecializationInfo *spec_info,
bool dump);
const VkSpecializationInfo *spec_info);
void *
radv_alloc_shader_memory(struct radv_device *device,
@ -82,13 +81,12 @@ radv_shader_variant_create(struct radv_device *device,
struct radv_pipeline_layout *layout,
const struct ac_shader_variant_key *key,
void ** code_out,
unsigned *code_size_out,
bool dump);
unsigned *code_size_out);
struct radv_shader_variant *
radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir,
void **code_out, unsigned *code_size_out,
bool dump_shader, bool multiview);
bool multiview);
void
radv_shader_variant_destroy(struct radv_device *device,