Rather than a single stack for all threads to share -- that can't work! :-) We
use the same helper that the GLES driver does. Fixes anything using scratch or
spilling, including:
dEQP-VK.glsl.indexing.varying_array.vec3_static_write_dynamic_read
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16283>
Avoid leaking memory when the device file is closed, dropping bo
references and freeing the shim_fd.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16250>
We actually want to use util_vma to handle this. But fortunately core
drm-shim alredy does this for mem offset, we can just delete a bunch of
code and re-use that.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16250>
Don't assert, return an error. If we are fuzzing something using
drm-shim, we want to be more like the kernel and return an error
for OoM situation, rather than falling over.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16250>
Using the bo pointer address as the offset doesn't go over well when
someone is fuzzing you. But we already have the mem_addr, we can simply
use that instead.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16250>
Needed by drmOpenWithType(), which is used by virgl drm native context.
(We want to use drm-shim for fuzzing.)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16250>
If wsi_configure_native_image() fails, it will call
wsi_destroy_image_info() itself, so let's try to not call it again from
wsi_wl_swapchain_destroy().
Fixes the CTS tests:
dEQP-VK.wsi.wayland.swapchain.simulate_oom.*
Fixes: b626a5be43 ("vulkan/wsi/wayland: Split image creation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16257>
I'm running into crashes because cache->cache_object is uninitialized.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 591da98779 ("vulkan: Add a common VkPipelineCache implementation")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16275>
Ken performed some tests with shader-db to evaluate the effects
```
Across all 145,848 shaders generated, the results were:
Total bytes compacted before: 3,326,224
Total bytes compacted after: 60,963,280
```
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15399>
This prevents having unused copies of pipe_draw_info and
pipe_draw_start_count_bias on the stack, and makes it easier to do
things once for a multi-draw, which will matter in the next patch.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16182>
Some components use very large refcounts to bypass atomics in single-threaded
cases, and this produces near-infinite loops when these resources are created.
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16182>
If the last line of an ARB program has a comment, the program will
fail to parse, because the lexer only considers a comment valid if
it ends in a newline, not EOF. The parser then fails on the '#'.
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16230>
Apparently we were only keying off the presence of a real stipple pattern
being set, and completely ignoring when the app does glDisable().
Add in the actual enable bit as an additional discriminator to determine
if we should be doing polygon stippling.
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16254>
TODO: Make the secondary opcode field wider so that FATAN_ASSIST can
be split into two instructions
[Alyssa: Fixes to the hardware behaviour.]
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15588>
On Bifrost, this is very easy: there's an RSD bit to Y-flip gl_PointCoord. It
should map perfectly to the Gallium bit. With this change, we no longer use
lower_pntc_ytransform on Bifrost, saving a bit of ALU when reading point
coordinates.
On Valhall, this is quite hard: the bit is in the framebuffer descriptor now!
That means it can't be changed in a batch. This is expected to be ok: on GLES
and VK, the origin is controlled only by the framebuffer orientation. It's a
bigger problem on big GL, where GL_POINT_SPRITE_COORD_ORIGIN can be set freely.
To cope, a tri-state data structure is used for the state tracking. This has a
failure case on Valhall: every draw toggling the coord origin. However, the
intention of the ORIGIN state bit is smoothing over coordinate system
differences; it should never /actually/ change once set. Until we see an app
doing something so stupid, I don't think we should worry about.
We need all the Valhall tri-state infrastructure for handling provoking vertices
on big GL anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16173>
Since we don't export the relevant CAP, the state tracker calls
nir_lower_clip_vs for us. However, for some reason we're still responsible for
calling nir_lower_clip_fs. Now that we have sane shader key infrastructure,
let's do so.
Fixes the floor rendering wrong in the title screen of Neverball.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16173>
Extract the "compile a new variant" routine from the "select and bind a variant"
routine. This allows us to simplify the control flow, eliminating the `compiled`
boolean on the shader structure.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16173>
Rather than clever key compare/initialize code, let's make the shader keys plain
old data. This makes it easier both to extend and to optimize the shader keys.
Keys are compared with a simple memcmp(). I considered a hash table but I don't
think we have enough variants (or large enough keys) to justify the overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16173>
This ensures we always have NIR available in the shader state. It also saves a
(trivial) amount of recomputation if multiple TGSI variants are needed.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16173>
In Vulkan, it's possible to create a pipeline with no fragment shader that's
still expected to rasterize. This is useful for depth/stencil side effects, and
is closely related to the "fragment shader required" optimization we do in the
GLES driver. Refactor the RSD emit code to handle this case.
Fixes dEQP-VK.pipeline.stencil.nocolor.*
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16204>
The "fragment shader required?" computed state is about fragment shader side
effects. There may be no fragment shader required but depth/stencil side effects
meaning that rasterization is nonoptional. What actually gates rasterization is
the rasterizer discard bit. Use that instead.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16204>
Otherwise wide lines break. The alternative approach is to eliminate the points
writes when not drawing points since we do have topology information at compile
time. I'm admittedly stuck in my GL mindset. That's the approach we'll need for
Valhall anyway.
Fixes dEQP-VK.rasterization.interpolation.basic.lines_wide
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16204>
The VAR_TEX definition in ISA.xml only has a field for texture_index,
so trying to read sampler_index will return zero; read from
texture_index instead, and rename other fields for consistency.
The texture and sampler indices must be equal for VAR_TEX to be used,
so either name could be used for the field.
Fixes the wrong textures being used in Thief.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6219
Fixes: eb1479bda2 ("pan/bi: Support message preloading")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16255>
While using three component texture formats results in CTs failures,
three component vertex attributes are fine, and not allowing them
results in significant performance regressisons.
Fixes: e41958e344
r600: Disable eight bit three channel formats
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6399
v2: rename function to is_buffer_format_supported (Emma)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16267>
Discrete platforms don't have LLC, but on those, we mmap our buffers
with WC. So we shouldn't need to clflush there.
Anv already had a boolean field on the physical device to know whether
we need to use clflush(), based off the memory heaps available. So use
that instead.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15780>
981bd8cbe2 moved outputs removing handling to NIR, but instead of
applying it only to the last stage before the FS this now applies
it to both the GS and the VS.
This commit fixes this by clearing the kill_outputs field for
the VS when using a ES-GS shader.
Fixes: 981bd8cbe2 ("radeonsi: apply key.ge.opt.kill_{outputs,pointsize,clipdistance} in NIR")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16249>
Layout transitions are not relevant to us, we only care about barriers
that involve a sync point between read/write actions on the image across
GPU jobs.
Image transitions from undefined layout can only happen before the image
is ever used by the GPU, which means they are never relevant to our
implementation.
This improves performance in vkQuake.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16235>
The current DCE pass hits issue around phi nodes. These need to be
solved properly eventually, but for now workaround them by doing
something obviously correct (but suboptimal compile time).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
We need to insert parallel copies at the logical end of blocks, before branches.
Add a pseudo instruction signaling that. Cribbed from ACO.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
Lifted from ir3. Algorithm is the same; the data structures and interface are
lightly modified to decouple from ir3's IR.
Sequentializing parallel copies after RA is tricky. ir3's implementation works
well enough, so I use that one.
Original implementation by Connor Abbott.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
Rather than using builder magic (implicitly lowered on emit), add actual pseudo
operations (explicitly lowered before encoding). In theory this is slower, I
doubt it matters. This makes the instruction aliases first-class for IR prining
and machine inspection, which will make optimization passes easier to write.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
Lifted from Bifrost. Add some basic optimizer tests (they pass!) to show the
compiler is ready to be unit tested. Given we can't have hardware CI for Asahi
yet -- and dEQP is still pretty janky -- unit testing should prove quite useful.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
Instructions, bytes, and registers -- this should hold us over until we
can reverse the underlying uarch and get proper cycle estimations.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
We usually use pdevice for "physical device" and not "device pointer".
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16259>
This changes the intel_device_info calculation to call an additional
DRM query requesting the geometry topology from the kernel, which may
differ from the result of the current topology query on XeHP+
platforms with compute-only and 3D-only DSSes. This seems more
reliable than the current guesswork done in intel_device_info.c trying
to figure out which DSSes are available for the render CS.
Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143>
The glsl-to-tgsi code generation and GLSL IR linker is is going away
(!8044), so we need to make the call on whether to use nir-to-tgsi (See
!15932 and !15541), or switch over to the NIR code generator. The NIR
backend should reduce the compile time regression while providing more
direct control over the IR we receive than going through NTT, while still
providing the optimization that NIR-to-TGSI was bringing us.
nv92 shader-db:
total local in shared programs: 2048 -> 1988 (-2.93%)
local in affected programs: 2048 -> 1988 (-2.93%)
total gpr in shared programs: 688468 -> 724705 (5.26%)
gpr in affected programs: 437159 -> 473396 (8.29%)
total instructions in shared programs: 6115978 -> 5874401 (-3.95%)
instructions in affected programs: 5038041 -> 4796464 (-4.80%)
total loops in shared programs: 1361 -> 835 (-38.65%)
loops in affected programs: 538 -> 12 (-97.77%)
total bytes in shared programs: 42389752 -> 40480416 (-4.50%)
bytes in affected programs: 36311616 -> 34402280 (-5.26%)
LOST: 0
GAINED: 1 (pixmark-piano)
nv120 shader-db:
total local in shared programs: 4416 -> 1988 (-54.98%)
local in affected programs: 4416 -> 1988 (-54.98%)
total gpr in shared programs: 870534 -> 893490 (2.64%)
gpr in affected programs: 564210 -> 587166 (4.07%)
total instructions in shared programs: 6379402 -> 6243210 (-2.13%)
instructions in affected programs: 5430790 -> 5294598 (-2.51%)
total bytes in shared programs: 68184224 -> 66729672 (-2.13%)
bytes in affected programs: 58013544 -> 56558992 (-2.51%)
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
nvc0 aligns to 0x10 in setting up its rogram header, but nv50 TLS
allocation expects the incoming value to be aligned already (like TGSI
always did). Avoids regression in
KHR-GL33.shaders.arrays.declaration.dynamic_expression_array_access_* with
the nir backend.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
The nir_move/sink caused instructions to sink interleaved into the output
stores at the end of the shader. nouveau's RA doesn't track liveness of
FS outputs in registers after the export instruction, so they could end up
overwritten. To work around it, after normal NIR move/sink, move the
output stores back to the end of the shader.
Fixes: b1fa2068b8 ("nouveau/nir: Enable nir_opt_move/sink.")
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
The ARB_shader_objects spec says the following:
> The error INVALID_VALUE is generated by any command that takes one or
> more handles as input, and one or more of these handles are not an
> object handle generated by OpenGL.
And a long, long time ago, we used do to just that for
glDeleteObjectARB... Until 9ac9605de1, all the way back in February 2006,
where the error condition was removed without explanation.
Let's restore it, because it should really be there.
This was noticed by running the tests that are in the mesa-demos
repository, that actually tested this condition.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16211>
We haven't been doing what the comment says for about a decade, it's
about time to update the comment!
Fixes: 5f60a00743 ("st/glx: remove STENCIL_BITS, DEFAULT_SOFTWARE_DEPTH_BITS")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16213>
Otherwise, the code to actually run Release() might not be loaded or
callable anymore.
Fixes: 193cf76c ("microsoft/compiler: add common dxil-validator API")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16225>
I can't reproduce GPU hangs after 5 CTS runs and Timur also confirmed
that his Bonaire GPU didn't hang after one CTS run.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16244>
With NGG GS, the hardware can't know the number of generated primitives
and we have to increment it manually from the shader using a plain GDS
atomic operation.
Though this had a serious problem (see this old TODO) if the bound
pipeline was using legacy GS because the query implementation was
relying on NGG GS. Another situation is if we had one draw with NGG GS,
followed by one draw with legacy (or the opposite) the query result
would have been broken.
The solution is to allocate two 64-bit values for storing the begin/end
values if the query pool is supposed to need GDS and accumulate the
result with the number of generated primitives generated by the hw.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15892>
When HW binning is used tile loads/stores could be skipped
if there is no geometry in the tile.
Loads could be skipped when:
- The attachment won't be resolved, otherwise if load is skipped
there would be holes in the resolved attachment;
- There is no vkCmdClearAttachments afterwards since it is likely
a partial clear done via 2d blit (2d blit doesn't produce geometry).
Stores could be skipped when:
- The attachment was not cleared, which may happen by load_op or
vkCmdClearAttachments;
- When store is not a resolve.
I chose to predicate each load/store separately to allow them to be
skipped when only some attachments are cleared or resolved.
Gmem loads are moved into separate cs because whether to emit
CP_COND_REG_EXEC depends on HW binning being enabled and usage of
vkCmdClearAttachments.
CP_COND_REG_EXEC predicate could be changed during draw_cs only
by perf query, in such case the predicate should be re-emitted.
(At the moment it is always re-emitted before stores)
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15974>
The input is an array so moving it to a single temporary value doesn't
seem to make much sense. I also don't see any piglit regressions when
not moving the value to a temporary.
Fixes: bc912bace1
virgl: Add workarounds for virglrenderer input/sv signedness bugs.
v2: remove unused enum for SAMPLEMASK (Emma)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15997>
This way we can make allow_draw_out_of_order true by default for all
apps, iff the driver allows it.
And allow_draw_out_of_order=false can still be used in drirc, for
apps that need this optim to be turned off.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16139>
This changes the code so that it only looks at the passed in families
when concurrent, otherwise it always allocates one.
Fixes: 48b3ef625e ("vulkan/wsi: handle queue families properly for non-concurrent sharing mode.")
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15331>
Casts shouldn't change the bit pattern of the deref and you have to cast
again after you're done with the ALU anyway so we can ignore casts on
ALU sources. This means we can actually start constant folding NULL
checks even if there are annoying casts in the way.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15673>
This just is an initial wrapping of all calls into the driver
to check for codec support.
The idea is to add more to this function to support the meson
level disables.
Acked-by: Christian König <christian.koenig@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15258>
This controls the whole lowering of "make tex ops with implicit
derivatives on non-implicit-derivative stages be tex ops with an explicit
lod of 0 instead", but it's really hard to describe that in a git commit
summary.
All existing callers get it added except:
- nir_to_tgsi which didn't want it.
- nouveau, which didn't want it (fixes regressions in shadowcube and
shadow2darray with NIR, since the shading languages don't expose txl of
those sampler types and thus it's not supported in HW)
- optional lowering passes in mesa/st (lower_rect, YUV lowering, etc)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16156>
extended_dynamic_state.*_raster tests timeout because the new
VK_DYNAMIC_STATE_RASTERIZER_DISCARD_ENABLE is not handled in venus.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16222>
This patch adds Tile 4 modifier support to Mesa and allows Mesa to
use Tile 4 on gen12-hp with GBM.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: 22.1 <mesa-stable>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14521>
Although modifiers which use a clear color plane specify that the
plane's pitch should be ignored, some kernels have been found to require
64-byte alignment.
Cc: mesa-stable
Fixes: db475c81b7 ("iris: Return non-zero stride for clear color plane")
Reported-by: Dongwon Kim <dongwon.kim@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14521>
This will only work if all contexts have been destroyed. If the app
attempts to re-create one context, while another outstanding context
exists and is still in the removed state, then the screen is not
recovered and the new context will fail to create.
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15002>
This also breaks screen init/deinit into two parts. The first part of
creation cannot fail, and is not repeatable. The second part of creation
can fail, and is repeatable, to be used for reset recovery.
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15002>
We can at least correctly return whether the context was lost, but
at this point can't correctly tear down and create a new one, nor
do we support the callback for dynamic notification.
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15002>
is_pixmap is defined in kopper_allocate_textures() as being (!window && x11),
which is very different from this check, which determines whether the drawable
is a window
so rename it to keep things consistent
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16190>
On platforms where we're not using DXGI swapchains, there's no reason
to disallow DISPLAY for formats like B5G6R5. In fact, on Android,
we need to support this format as BIND_DISPLAY.
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16154>
Convert all SNORM formats to SINT.
This fixes SNORM blits for radeonsi.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16132>
I added this hack to my tree when testing another MR and ended up
squashing it into c2a3236d1a (etnaviv: clean up tiling setup in
etna_compile_rs_state) by accident when doing some changes to this
commit. Reinstate the assert.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16212>
Force default device if MESA_VK_DEVICE_SELECT_FORCE_DEFAULT_DEVICE
environment variable set. This will not give multiple device
options to app. There are apps that selects gpu to use based on its
own criteria, this patch can force default behaviour for these apps
by giving only one gpu device to select from.
v2: return 0 if no physical device present (Mihai Preda)
v3: document environment variables (Mihai Preda)(Marek Olšák)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15585>
Without this being atomically incremented and decremented, I observed
this assert triggering in debug builds:
src/vulkan/wsi/wsi_common_x11.c:x11_present_to_x11_dri3():
assert(chain->sent_image_count <= chain->base.image_count);
I think this was happening since,
src/vulkan/wsi/wsi_common_x11.c:x11_handle_dri3_present_event()
which decrements chain->sent_image_count may be run in a separate
thread.
Fixes: d0bc1ad377 ("vulkan/wsi/x11: add sent image counter")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15908>
With externaly imported resources, we can have situations where we can't
mmap and directly access linear buffers. So use the staging blit path
for this case.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16086>
This is needed for the VIRTGPU_WAIT ioctl to work.
TODO we could perhaps limit this, since it is not needed for residency,
but only fencing. Ie. we could omit cmdstream, and probably anything
that has FD_BO_NOMAP flag.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16086>
This syncs up with the protocol of what eventually landed in virglrender.
1) Move all static params to capset to avoid having to query host
(reduce synchronous round trips at startup)
2) Use res_id instead of host_handle.. costs extra hashtable lookups in
host during submit, but this lets us (with userspace allocated IOVA)
make bo alloc and import completely async.
3) Require userspace allocated IOVA to simplify the protocol and not
have to deal with GEM_NEW/GEM_INFO potentially being synchronous.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16086>
Alyssa Rosenzweig
Yiwei Zhang
Rob Clark
Iván Briano
Lionel Landwerlin
Caio Oliveira
Mike Blumenkrantz
Jesse Natalie
Icecream95
Gert Wollny
Pierre-Eric Pelloux-Prayer
Rhys Perry
Iago Toral Quiroga
Alyssa Rosenzweig
Konstantin Seurer
Francisco Jerez
Emma Anholt
Karol Herbst
Chia-I Wu
Erik Faye-Lund
Jordan Justen
Daniel Schürmann
Danylo Piliaiev
Juan A. Suarez Romero
Samuel Pitoiset
M Henning
Dave Airlie
Renato Pereyra
Jason Ekstrand
Nanley Chery
Anuj Phogat
Marek Olšák
Lucas Stach
prashanth
Tapani Pälli