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agx: Track write registers more accurately 

We may not write a full 32-bit vec4, don't be so pessimistic.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
This commit is contained in:
Alyssa Rosenzweig 2022-04-12 18:06:03 -04:00
parent 0c82b5c99c
commit ff660dd637
1 changed files with 6 additions and 1 deletions
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7
src/asahi/compiler/agx_register_allocate.c
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@ -38,10 +38,15 @@ agx_write_registers(agx_instr *I, unsigned d)
switch (I->op) {
case AGX_OPCODE_LD_VARY:
assert(1 <= I->channels && I->channels <= 4);
return I->channels * size;
case AGX_OPCODE_DEVICE_LOAD:
case AGX_OPCODE_TEXTURE_SAMPLE:
case AGX_OPCODE_LD_TILE:
return 8;
/* TODO: mask */
return 4 * size;
case AGX_OPCODE_LD_VARY_FLAT:
return 6;
case AGX_OPCODE_P_COMBINE: