Commit Graph

146558 Commits

Author SHA1 Message Date
Enrico Galli aac47c4b24 microsoft/compiler: Shadow tex instructions always use shadow samplers
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13321>
2021-10-16 00:12:04 +00:00
Mike Blumenkrantz fe2674dd52 aux/pb: more correctly check number of reclaims
the increment needs to happen before the comparison here

Fixes: 3d6c8829f5 ("aux/pb: add a tolerance for reclaim failure")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13388>
2021-10-15 23:36:48 +00:00
Jason Ekstrand 58f605e4d4 nir: Drop our attempt at typed-based image mode validation
This is broken for bindless images declared as local variables.  It
turns out nir_variable::data::bindless is only used for uniforms and we
already assume anything in nir_var_function_temp or similar is bindless.
We could try to make a tricky assert but now that we have everything
else passing but now that we've got everyone converted the extra
validation probably isn't necessary.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13384>
2021-10-15 22:35:59 +00:00
Marcin Ślusarz d05f7b4a2c intel: fix INTEL_DEBUG environment variable on 32-bit systems
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13334>
2021-10-15 19:55:14 +00:00
Mike Blumenkrantz 182237e1e8 virgl: remove unused pipebuffer include
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13385>
2021-10-15 19:03:46 +00:00
Mike Blumenkrantz 3d6c8829f5 aux/pb: add a tolerance for reclaim failure
originally, a slab attempts to reclaim a single bo. there are two outcomes
to this which can occur:
* the bo is reclaimed
* the bo is not reclaimed

if the bo is reclaimed, great.

if the bo is not reclaimed, it remains at the head of the list until it can
be reclaimed. this means that any bo with a "long" work queue which makes it
into a slab will effectively kill the entire slab. in a benchmarking scenario,
this can occur in rapid succession, and every slab will get 1-2 suballocations
before it reaches a bo that blocks long enough for a new slab to be needed.

the inevitable result of this scenario is that all memory is depleted almost instantly,
all because pb assumes that if the first bo in the reclaim list isn't ready, none of them
can be ready

for drivers like radeonsi, this happens to be a fine assumption

for drivers like zink, this is entirely not workable and explodes the gpu

Cc: mesa-stable

Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13345>
2021-10-15 17:46:51 +00:00
Caio Marcelo de Oliveira Filho 29177c7cee intel/compiler: Build all tests in a single binary
With gtest is possible to filter execution and run only a specific
test suite or individual test, so there's no particular reason here to
generate multiple binaries for the tests of a single module.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13303>
2021-10-15 10:06:51 -07:00
Caio Marcelo de Oliveira Filho 35b6990706 intel/compiler: Rename vec4 test fixtures
Include vec4 in their names to avoid same names as the fs
counterparts.  This will allow compiling all the tests together in the
future.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13303>
2021-10-15 10:06:51 -07:00
Rob Clark 0480595d03 freedreno/isa: Add immed reg accessors
This way we can assert that a src that we expect to be an immediate
actually is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark e08d152d68 isaspec: Add bitfield size assertions
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 4166635bd1 isaspec: Do not emit duplicate field encodes
If an <override> overrides the definition of a field, don't emit
encoding for both the override's definition and the fallback.  (See
"SAMP" in #cat5-src3).  It is harmless currently, because (in this
case) it will just re-encode the low bits of "SAMP".  But when we
start asserting on that the field being encoded fits in the allowed
number of bits, the re-encoding of the fallback field definition
will start triggering asserts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark e01759e6f3 isaspec: Fix derived field width
The low/high bit positions should be integers.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 5b6e5db5d0 freedreno/ir3: Don't lower s2en if samp/tex is too large
We only have four bits to encode an immediate samp/tex.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark bfd8b7c930 freedreno/ir3/tests: Add additional disasm test vectors
Add branch with negative offset, and a couple others to trigger issues I
found while adding pack_field() overflow asserts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark c0ecfeb023 freedreno/ir3/tests: Fix indentation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 8b0550f09f freedreno/isa: Fixes for validation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark 9516d8ce98 freedreno/ir3+isa: Cleanup bindless cat5 samp/tex encoding
Don't let the way they are encoded at the isa level leak thru to the
ir3 level.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Jason Ekstrand d43f89f17a ir3: Images are always nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jesse Natalie 9601556079 microsoft/clc: Images use nir_var_mem_image
The only big change is that lower_vars_to_explicit no longer assigns
a driver_location for images. That means that the storage for the
format/order loads is no longer implicitly "allocated" in the middle
of the kernel args. Instead, manually add the storage for that to the end
of the input args buffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 26d603da07 nir/gl_nir_lower_images: Require nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand e6cce80976 intel/fs: Stop emitting TGM fences for nir_var_mem_ssbo
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 8ab40f517f aco: Split var_mem_image barrier handling from global/ssbo
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 4c5a88d735 nir: Validate image variable modes
We can also significantly simplify the foreach_image_variable helper.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 97a7c0ab1b st/pbo: Use nir_var_mem_image for images
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Rhys Perry 458b4d2095 radv: Use nir_var_mem_image in meta shaders
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 9f51fda92c ttn: Use nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand b8ee37472d glsl: Use nir_var_mem_image for images
We don't use it for bindless images because the uniforms in that case
just contain a bindless handle and aren't an actual image.  Bound
images, on the other hand, go in the nir_var_mem_image class.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Caio Marcelo de Oliveira Filho cfdc7ee066 spirv: Use nir_var_mem_image
Use the new nir_var_mem_image mode for images that are not known to be
used with a sampler (i.e. storage images).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 219ac26ea3 spirv: Assert that OpTypeForwardPointer only points to structs
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand e87dbfd3e8 ir3: Check for nir_var_mem_image in shared_barrier handling
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand ae58894ee7 zink: Images can live in nir_var_mem_image now
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand d68bedbb45 clover: Use nir_foreach_image_variable for images
This splits image and sampler handling into two separate loops.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand aefa22ddb5 clover: Insert dummy uniform variables for images
Instead of making images have a well-defined size, insert a dummy
variable of the appropriate type which we can use for the parameter
block layout.  This will work much better when we switch over to
nir_var_mem_image.

Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 6818811fc4 nir/lower_readonly_images_to_tex: Also rewrite variable modes
Storage images will start using nir_var_mem_image but sampled images
still use nir_var_uniform.  If we're going to rewrite types, we need to
rewrite the modes as well.  Otherwise, nir_validate will get grumpy and
drivers might get confused.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 225caf537a llvmpipe: Support image variables living in nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand d84fd86af1 ntt: Separate image and sampler handling
Use nir_foreach_image_variable for images so we survive the coming
refactor where they get their own mode.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 12b3ffe400 st/nir: Assign uniform locations to nir_var_mem_image vars
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand b1385f3c87 nir/gl_nir_lower_images: Support nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 7bdae87b93 nir/gl_nir_lower_samplers_as_deref: Support nir_var_mem_image
Contrary to the name of the pass, it also handles storage images so we
need to support nir_var_mem_image.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand c0d8dc13e0 glsl/nir_linker: nir_var_mem_image is also a GL uniform
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand 94b9f25883 aco: Add support for nir_var_mem_image
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand cd49706cb1 amd/llvm/nir: Add support for nir_var_mem_image
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho 26582db077 anv: Use nir_foreach_image_variable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Jason Ekstrand ff39916ce7 i965/uniforms: Handle images as a separate pass
Instead of walking all uniforms and handling images as a special case,
walk "normal" uniforms first and images as a second pass.  This lets us
use nir_foreach_image_variable which will survive the upcoming refactor.
While we're at it, use nir_foreach_image_variable in
brw_nir_lower_gl_images too.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho 2d7065ef04 intel/fs: Consider nir_var_mem_image for TGM fences
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Jason Ekstrand 2a53c33fbe nir: Add a nir_foreach_image_variable() iterator
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho de3705edb0 nir: Add nir_var_mem_image
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho 872750bb96 nir/schedule: Handle nir_intrisic_scoped_barrier
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Rob Clark 73d6e153eb freedreno: Fix for large epilogues
Apparently Rocket League overflows the fixed size epilogue.  Switch it
to be growable.

Closes: #5493
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13365>
2021-10-15 14:30:51 +00:00
Ella-0 9ee060b614 v3dv: enable VK_KHR_swapchain_mutable_format
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13297>
2021-10-15 08:36:36 +00:00