Commit Graph

65351 Commits

Author SHA1 Message Date
Brian Paul 418da97905 mesa: move i, j var decls into SWIZZLE_CONVERT_LOOP() macro
Put macro code in do {} while loop and put semicolons on macro calls
so auto indentation works properly.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-15 09:52:44 -06:00
Brian Paul cfeb394224 mesa: break up _mesa_swizzle_and_convert() to reduce compile time
This reduces gcc -O3 compile time to 1/4 of what it was on my system.
Reduces MSVC release build time too.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-15 09:52:44 -06:00
Kalyan Kondapally dbc2d81d2b Generate a warning when not writing gl_Position with GLES.
With GLES we don't give any kind of warning in case we don't
write to gl_position. This patch makes changes so that we
generate a warning in case of GLES (VER < 300) and an error
in case of GL.

Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-09-15 08:14:33 +03:00
Tapani Pälli 9bd139e451 mesa: check that uniform exists in glUniform* functions
Remap table for uniforms may contain empty entries when using explicit
uniform locations. If no active/inactive variable exists with given
location, remap table contains NULL.

v2: move remap table bounds check before existence check (Ian Romanick)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Erik Faye-Lund <kusmabite@gmail.com> (v1)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83574
2014-09-15 07:33:12 +03:00
Chia-I Wu ce50a61d36 ilo: clean up 3D/media functions
Mostly style changes to set dw[0] directly.
2014-09-15 10:25:35 +08:00
Chia-I Wu c39377d3fc ilo: fix gen6_3DSTATE_MULTISAMPLE()
There was a typo introduced by 90f4b131fc.
2014-09-15 09:00:54 +08:00
Rob Clark ca29c4c3b0 freedreno/a3xx: 3d/array textures
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-13 15:31:58 -04:00
Rob Clark eea1cdf687 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-13 15:31:58 -04:00
Chia-I Wu a32f48361a ilo: trust vertex element count more
We might run into ve->count == 0 and last_velement_edgeflag == true in
gen6_3DSTATE_VERTEX_ELEMENTS() when the state tracker sets an invalid
combination of VS and VE (does not seem to happen with st/mesa).  Do not
assume ve->count is positive when last_velement_edgeflag is true.

Reported by Coverity.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-14 00:30:33 +08:00
Chia-I Wu 8fcf1b1f90 ilo: simplify src operand gathering in disassembler
Always initialize the operand array to point to src0, src1, and src2.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-14 00:30:33 +08:00
Chia-I Wu 5341001b94 ilo: derive 3-src instructions from the opcode table
One less switch statement to maintain.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-14 00:30:33 +08:00
Ilia Mirkin 1d7b0d832c nouveau: check for mesa context init failure
Reported by Coverity

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-09-13 11:29:23 -04:00
Ilia Mirkin 2e86432cc1 nouveau: avoid leaking screen on initialization fail
Reported by Coverity

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-09-13 11:17:26 -04:00
Ilia Mirkin b13a4ca3f7 nouveau: change internal variables to avoid conflicts with macro args
Reported by Coverity

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-13 10:55:16 -04:00
Chia-I Wu 9133784a46 ilo: clean up 3DPRIMITIVE functions
Add ILO_PRIM_RECTANGLES to replace the rectlist bool.
2014-09-13 09:33:20 +08:00
Chia-I Wu eca98153e9 ilo: clean up 3D/media common functions
Rename ilo_builder_batch_state_base_address() to gen6_state_base_address() for
consistency and remove unused gen6_STATE_BASE_ADDRESS().  Reorder the code in
gen6_PIPE_CONTROL() a bit.  Finally, some mostly cosmetic changes.
2014-09-13 09:31:08 +08:00
Chia-I Wu ea8e7a8d4a ilo: move 3D functions to ilo_builder_3d*.h
Move functions for the 3D pipeline to the new headers.  We artificially split
the functions into top (vertex processing) and bottom (pixel processing), to
keep the headers at reasonable sizes.
2014-09-13 09:31:08 +08:00
Chia-I Wu aec8521166 ilo: move media functions to ilo_builder_media.h
Move functions for the media pipeline to the new header.
2014-09-13 08:32:25 +08:00
Chia-I Wu 45023db7a9 ilo: move GPE common functions to ilo_builder_render.h
Move 3D/media common functions to the new header.
2014-09-13 08:30:32 +08:00
Kenneth Graunke 84a40ce86b glsl: Speed up constant folding for swizzles.
ir_rvalue::constant_expression_value() recursively walks down an IR
tree, attempting to reduce it to a single constant value.  This is
useful when you want to know whether a variable has a constant
expression value at all, and if so, what it is.

The constant folding optimization pass attempts to replace rvalues with
their constant expression value from the bottom up.  That way, we can
optimize subexpressions, and ideally stop as soon as we find a
non-constant subexpression.

In order to obtain the actual value of an expression, the optimization
pass calls constant_expression_value().  But it should only do so if it
knows the value can be combined into a constant.  Otherwise, at each
step of walking back up the tree, it will walk down the tree again, only
to discover what it already knew: it isn't constant.

We properly avoided this call for ir_expression nodes, but not for
ir_swizzle nodes.  This patch fixes that, drastically reducing compile
times on certain shaders where tree grafting has given us huge
expression trees.  It also fixes SuperTuxKart.

Thanks to Iago and Mike for help in tracking this down.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78468
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2014-09-12 16:35:39 -07:00
Kenneth Graunke 7865026c04 i965/vec4: Make type_size() return 0 for samplers.
The FS backend has always used 0, and the VS backend has always used 1.
I think 1 is just working around other problems, and is incorrect.
Samplers are baked in; nothing uses the UNIFORM register we would
create, and we shouldn't upload any constant values for them.

Fixes ES3-CTS.shaders.struct.uniform.sampler_array_vertex.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-12 16:35:39 -07:00
Kenneth Graunke 2408f166db i965: Skip allocating UNIFORM file storage for uniforms of size 0.
Samplers take up zero slots and therefore don't exist in the params
array, nor are they included in stage_prog_data->nr_params.  There's no
need to store their size in param_size, as it's only used for dealing
with arrays of "real" uniforms (ones uploaded as shader constants).

We run into all kinds of problems trying to refer to the uniform storage
for variables that don't have uniform storage.  For one, we may use some
other variable's index, or access out of bounds in arrays.  In the FS
backend, our extra 2 * MaxSamplerImageUnits params for texture rectangle
rescaling paper over a lot of problems.  In the VS backend, we claim
samplers take up a slot, which also papers over problems.

Instead, just skip allocating storage for variables that don't have any.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-12 16:35:39 -07:00
Kenneth Graunke 6b6145204d i965: Separate gl_InstanceID and gl_VertexID uploading.
We always uploaded them together, mostly out of laziness - both required
an additional vertex element.  However, gl_VertexID now also requires an
additional vertex buffer for storing gl_BaseVertex; for non-indirect
draws this also means uploading (a small amount of) data.  This is extra
overhead we don't need if the shader only uses gl_InstanceID.

In particular, our clear shaders currently use gl_InstanceID for doing
layered clears, but don't need gl_VertexID.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-12 16:35:35 -07:00
Kenneth Graunke e980fe6071 i965: Fix reference counting in new basevertex upload code.
In the non-indirect draw case, we call intel_upload_data to upload
gl_BaseVertex.  It makes brw->draw.draw_params_bo point to the upload
buffer, and increments the upload BO reference count.

So, we need to unreference it when making brw->draw.draw_params_bo point
at something else, or else we'll retain a reference to stale upload
buffers and hold on to them forever.

This also means that the indirect case should increment the reference
count on the indirect draw buffer when making brw->draw.draw_params_bo
point at it.  That way, both paths increment the reference count, so
we can safely unreference it every time.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-12 16:23:02 -07:00
Rob Clark 9b6281a7da freedreno: "fix" problems with excessive flushes
4f338c9b introduced logic to trigger a flush rather than overflowing
cmdstream buffer.  But the threshold was too low, triggering flushes
where they were not needed.  This caused problems with games like
xonotic.

Part of the problem is that we need to mark all state dirty between
cmdstream submit ioctls, because we cannot rely on state being
preserved across ioctls.  But even with that, there are still some
problems that are still being debugged.  For now:

1) correctly mark all state dirty
2) introduce FD_MESA_DEBUG flush flag to force rendering to be flushed
between each draw, to trigger problems (so that I can debug)
3) use a more reasonable threshold so for normal usecases we don't
trigger the problems

This at least corrects the regression, but there is still more debugging
to do.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 18:35:39 -04:00
Marek Olšák d13d2fd161 r600g,radeonsi: add debug option which forces DMA for copy_region and blit 2014-09-12 22:51:28 +02:00
Ilia Mirkin d7ec3db349 freedreno/ir3: implement UMUL correctly
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:26:21 -04:00
Ilia Mirkin 436dd1e2f8 freedreno/ir3: fix UCMP handling
UCMP does not require a compare, only a select.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:26:15 -04:00
Ilia Mirkin 9f5bd154d7 freedreno/ir3: add TXL support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:26:11 -04:00
Rob Clark 459f8f3d66 freedreno/ir3: add missing put_dst
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:26:09 -04:00
Rob Clark 59ff81663a freedreno/ir3: catch incorrect usage of tmp-dst
Each get_dst() should have a matching put_dst().  Add a bit of checking
to catch mistakes.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:26:09 -04:00
Ilia Mirkin db1a94b1cc freedreno/ir3: use unsigned comparison for UIF
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:26:05 -04:00
Ilia Mirkin 11d72553c5 freedreno/ir3: negate result of USLT/etc
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:26:01 -04:00
Ilia Mirkin 8edf83b377 freedreno/ir3: add UARL support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:25:57 -04:00
Ilia Mirkin 10273f84c2 freedreno/ir3: INEG operates on src0, not src1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:25:52 -04:00
Ilia Mirkin 572ffca050 freedreno/ir3: fix FSLT/etc handling to return 0/-1 instead of 0/1.0
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:25:47 -04:00
Rob Clark 80058c0f08 freedreno/a3xx: alpha render-target shenanigans
We need the .w component to end up in .x, since the hw appears to fetch
gl_FragColor starting with the .x coordinate regardless of MRT format.
As long as we are doing this, we might as well throw out the remaining
unneeded components.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:23:52 -04:00
Rob Clark 3e0a82b52e util/u_format: add _is_alpha()
Because of render-to-alpha (000x) shenanigans, freedreno needs to do
some special handling when rendering to alpha-only formats.  And I
noticed that while we had _is_luminance(), _is_intensity(), etc, an
_is_alpha() helper was missing.  So fix that.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:23:52 -04:00
Rob Clark 480fe244dd freedreno/a3xx: format fixes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:23:52 -04:00
Rob Clark 1fba490569 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:23:52 -04:00
Rob Clark 2ed7640eec freedreno/a3xx: handle rendering to layer != 0
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-12 16:23:52 -04:00
Brian Paul 0d73ac6b02 mesa: fix _mesa_free_pipeline_data() use-after-free bug
Unreference the ctx->_Shader object before we delete all the pipeline
objects in the hash table.  Before, ctx->_Shader could point to freed
memory when _mesa_reference_pipeline_object(ctx, &ctx->_Shader, NULL)
was called.

Fixes crash when exiting the piglit rendezvous_by_location test on
Windows.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-12 09:17:31 -06:00
Connor Abbott 2828680e39 ra: assert against unsigned underflow in q_total
q_total should never go below 0 (which is why it's defined as unsigned),
and if it does, then something is seriously wrong.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-09-12 16:07:47 +02:00
Connor Abbott ec046bc08e ra: note a restriction in the interfence graph API
As noted in the previous commit, this was introduced in
567e2769b8 ("ra: make the p, q test more
efficient"), but I forgot to mention it.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-09-12 16:07:47 +02:00
Connor Abbott afd82dcad1 r300g: set register classes before interferences
In commit 567e2769b8 ("ra: make the p, q
test more efficient") I unknowingly introduced a new requirement to the
register allocator API: the user must set the register class of all
nodes before setting up their interferences, because
ra_add_conflict_list() now uses the classes of the two interfering
nodes. i965 already did this, but r300g was setting up register classes
interleaved with setting up the interference graph. This led to us
calculating the wrong q total, and in certain cases
e78a01d5e6 (" ra: optimistically color
only one node at a time") made it so that this bug caused a segfault. In
particular, the error occurred if the q total was decremented to 1 below
0 for the last node to be pushed onto the stack.  Since q_total is an
unsigned integer, it overflowed to 0xffffffff, which is what
lowest_q_total happens to be initialzed to. This means that we would
fail the "new_q_total < lowest_q_total" check on line 476 of
register_allocate.c, and so the node would never be pushed onto the
stack, which led to segfaults in ra_select() when we failed to ever give
it a register.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82828
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Pavel Ondračka <pavel.ondracka@email.cz>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-09-12 16:07:07 +02:00
Andreas Boll 2a13ff954d gallium/util: add missing u_debug include
Needed for assert.
Fixes build on BE archs with -Werror=implicit-function-declaration.

In file included from
../../../../../src/gallium/auxiliary/draw/draw_fs.c:30:0:
../../../../../src/gallium/auxiliary/util/u_math.h: In function
'util_memcpy_cpu_to_le32':
../../../../../src/gallium/auxiliary/util/u_math.h:810:4: error:
implicit declaration of function 'assert'
[-Werror=implicit-function-declaration]
    assert(n % 4 == 0);
        ^

Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-12 15:55:12 +02:00
Chia-I Wu 802018df5f ilo: fix builder size checks for BLT buffer clear/copy
In buf_clear_region() and buf_copy_region(), max_cmd_size was set to 0.  If
either of the functions is called and there is not enough space in the
builder, the next ilo_cp_flush() will fail silently in a release build.

Replace magic numbers by size defines in tex_clear_region()/tex_copy_region()
for consistency and readability.
2014-09-12 16:58:31 +08:00
Chia-I Wu 07e0923203 ilo: reduce BLT function parameters
Intruduce gen6_blt_bo and gen6_blt_xy_bo to describe BOs.  In the extreme case
of gen6_XY_SRC_COPY_BLT(), the number of parameters goes down from 18 to 8.
2014-09-12 16:58:30 +08:00
Chia-I Wu 8fa62a9982 ilo: clean up BLT functions
Follow the changes for MI functions, but for BLT this time.
2014-09-12 16:58:30 +08:00
Chia-I Wu a77aaf4363 ilo: clean up MI functions
With ilo_builder in place, some conventions we had to build commands are no
longer needed.
2014-09-12 16:58:30 +08:00