Commit Graph

81381 Commits

Author SHA1 Message Date
Kenneth Graunke 1c41cb58de i965: Support instanced GS inputs in the scalar backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-12 01:01:36 -07:00
Kenneth Graunke 5fc3772650 i965: Use an early return for the push case in emit_gs_input_load().
Just trying to keep things from getting too ugly in the next commit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-12 00:59:08 -07:00
Kenneth Graunke e9ca952581 i965: Drop BRW_NEW_BLORP from stipple and line parameter packets.
BLORP never touches these, and they're all non-pipelined.  Some
are fairly large packets as well.

I haven't tried to benchmark this; the effect is likely to be small.
However, we may as well stop the pointless papercuts; maybe they'll
add up someday.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-12 00:54:37 -07:00
Jakob Sinclair 18f7c88dd6 glsl: fixed uninitialized pointer
Class "ir_constant" had a bunch of constructors where the pointer member
"array_elements" had not been initialized. This could have lead to unsafe
code if something had tried to write anything to it. This patch fixes
this issue by initializing the pointer to NULL in all the constructors.
This issue was discovered by Coverity.

CID: 401603, 401604, 401605, 401610

Signed-off-by: Jakob Sinclair <sinclair.jakob@openmailbox.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2016-05-12 09:46:36 +02:00
Ilia Mirkin ba3f0b6d59 nvc0: fix gl_SampleMaskIn computation
The SAMPLEMASK semantic should only return the bits set covered by the
current invocation. However we were always retrieving the covmask, which
returns the covered samples of the whole pixel.

When not doing per-sample invocation, this is precisely what we want.
However when doing per-sample invocation, we have to select the
sampleid'th bit and only return that. Furthermore, this means that we
have to have a 1:1 correlation for invocations and samples.

This fixes most

dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.*

tests. A few failures remain due to disagreements about nr_samples==1
logic as well as what happens with MSAA x2 RTs when the shading fraction
is 0.5.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-05-11 20:39:27 -04:00
Ilia Mirkin f5fe903002 nv50/ir: generalize interp fixups to be able to fixup anything
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-05-11 20:39:26 -04:00
Jason Ekstrand 66a442687f .mailmap: Update the e-mail addresses for Kristian Høgsberg
This changes it to use his personal e-mail and adds his @intel.com address

Acked-by: Kristian Høgsberg <krh@bitplanet.net>
2016-05-11 12:32:14 -07:00
Jason Ekstrand 7e759fbd60 .mailmap: Use Connor Abbott's personal e-mail 2016-05-11 12:27:15 -07:00
Giuseppe Bilotta 9c3392cb3a Add .mailmap
This adds a first tentative .mailmap file, to canonicize contributor
name/emails in shortlogs and other statistical endeavours.

Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-11 12:21:46 -07:00
Jason Ekstrand f1dcc7976a i965: Stop splitting fma() prior to optimization
According to the GLSL spec, if the user uses the fma() intrinsic to
generate a precise-consumed value, and you have it in your hardware, you
shouldn't split it.  For a while now, we've been splitting all ffma's
up-front and then planned to fuse them later which isn't valid.  Correctly
handling the GLSL behaviour fixes rendering corruptions in Tomb Raider.
The only reason why doing this possibly helped before was for ARB programs
which is handled by the previous commit.

Shader-db results on Haswell:

   total instructions in shared programs: 7560300 -> 7561510 (0.02%)
   instructions in affected programs: 56265 -> 57475 (2.15%)
   helped: 86
   HURT: 291

The only shaders in the database that are affected are from "Shadow of
Mordor" which is the first app in our database to use fma().  We could, at
some point in the future, split inexact ffma opcodes which would fix the
shader-db regressions since Shadow of Mordor doesn't ues precise.  However,
this fixes a bug now and and the shader-db impact is fairly small.

Reported-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-11 11:44:35 -07:00
Jason Ekstrand 47f01e538a ptn: Emit mul+add for MAD
Unlike fma() in GLSL, MAD in ARB programs is 100% splittable.  Just emit
the split version and let the optimizer fuse them later.

Shader-db results on Haswell:

   total instructions in shared programs: 7560379 -> 7560300 (-0.00%)
   instructions in affected programs: 143928 -> 143849 (-0.05%)
   helped: 443
   HURT: 250

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-11 11:44:35 -07:00
Jason Ekstrand 1b72c31e1f nir/algebraic: Separate ffma lowering from fusing
The i965 driver has its own pass for fusing mul+add combinations that's
much smarter than what nir_opt_algebraic can do so we don't want to get the
nir_opt_algebraic one just because we didn't set lower_ffma.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-11 11:44:35 -07:00
Rob Clark 5886d1bad1 anv: fix build break
Previous rename of lower-output-to-temps pass predated merging of anv,
and apparently vulkan wasn't enabled in my local builds so overlooked
this when rebasing.

Reported-by: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-05-11 14:03:24 -04:00
Rob Clark 697382eb61 mesa/st: split the type_size calculation into it's own file
We'll want to re-use this for NIR.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-11 12:20:12 -04:00
Rob Clark 0e5a369879 glsl: export accessor for builtin-uniform descriptors
We'll need this for a nir pass to lower builtin-uniform access.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-11 12:20:12 -04:00
Rob Clark dfbabc6bad nir/lower-io: add support for lowering inputs
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-11 12:20:11 -04:00
Rob Clark 595f9d5476 nir/lower-io: split out some helper fxns
Prep work to reduce the noise in the next patch.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-11 12:20:11 -04:00
Rob Clark b085016f94 nir: rename lower_outputs_to_temporaries -> lower_io_to_temporaries
Since it will gain support to lower inputs, give it a more generic name.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-05-11 12:20:11 -04:00
Rob Clark 47fcef9a20 nir: move callsite of lower_outputs_to_temporaries
Going to convert this pass to parameterized lower_io_to_temporaries, and
we want the user to be able to specify whether to lower outputs or
inputs or both.  The restriction of running this pass before validate
to avoid output reads no longer applies.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-11 12:20:11 -04:00
Rob Clark 5261947260 nir: lower-io-types pass
A pass to lower complex (struct/array/mat) inputs/outputs to primitive
types.  This allows, for example, linking that removes unused components
of a larger type which is not indirectly accessed.

In the near term, it is needed for gallium (mesa/st) support for NIR,
since only used components of a type are assigned VBO slots, and we
otherwise have no way to represent that to the driver backend.  But it
should be useful for doing shader linking in NIR.

v2: use glsl_count_attribute_slots() rather than passing a type_size
    fxn pointer

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-11 12:20:11 -04:00
Rob Clark b10cc24519 nir: passthrough-edgeflags support
Handled by tgsi_emulate for glsl->tgsi case.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-05-11 12:20:11 -04:00
Rob Clark 3a939d034e nir: add lowering pass for glBitmap
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-05-11 12:20:11 -04:00
Rob Clark 12c18ce476 nir: add lowering pass for glDrawPixels
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-05-11 12:20:11 -04:00
Rob Clark b26645a00f nir: add lowering pass for y-transform
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-05-11 12:20:11 -04:00
Rob Clark e1d80f8603 gallium: add NIR as a possible IR
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-11 12:20:11 -04:00
Rob Clark 425dc4c4b3 gallium: refactor pipe_shader_state to support multiple IR's
The goal is to allow the pipe driver to request something other than
TGSI, but detect whether what is getting is TGSI vs what it requested.
The pipe drivers will always have to support TGSI (and convert that into
whatever it is that they prefer), but in some cases we should be able to
skip the TGSI intermediate step (such as glsl->nir vs glsl->tgsi->nir).

I think pipe_compute_state should get similar treatment.  Currently,
afaict, it has one user and one consumer, which has allowed it to be
sloppy wrt. supporting alternative IR's.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-11 12:20:11 -04:00
Rob Clark 4500d17245 freedreno: fix multi-layer transfer_map's
The use of transfer_inline_write() in TexSubImage path (see fb9fe352ea)
exposed a bug for "layer_first" resources (ie. a4xx) not setting correct
layer_stride.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-05-11 12:03:21 -04:00
Juan A. Suarez Romero 9bea018994 glsl: use var with initializer on global var validation
Currently, when cross validating global variables, all global variables
seen in the shaders that are part of a program are saved in a table.

When checking a variable this already exist in the table, we check both
are initialized to the same value. If the already saved variable does
not have an initializer, we copy it from the new variable.

Unfortunately this is wrong, as we are modifying something it is
constant. Also, if this modified variable is used in
another program, it will keep the initializer, when it should have none.

Instead of copying the initializer, this commit replaces the old
variable with the new one. So if we see again the same variable with an
initializer, we can compare if both are the same or not.

v2: convert tabs in whitespaces (Kenenth Graunke)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-11 13:50:04 +02:00
Jordan Justen 2c1c060b03 util/ralloc: Remove double zero'ing of rzalloc buffers
Juha-Pekka found this back in May 2015:
<1430915727-28677-1-git-send-email-juhapekka.heikkila@gmail.com>

From the discussion, obviously it would be preferable to make
ralloc_size no longer return zeroed memory, but Juha-Pekka found that
it would break Mesa.

In <56AF1C57.2030904@gmail.com>, Juha-Pekka mentioned that patches
exist to fix i965 when ralloc_size is fixed to not zero memory, but
the patches have not made their way to mesa-dev yet.

For now, let's stop doing the double zeroing of rzalloc buffers.

v2:
 * Move ralloc_size code to rzalloc_size, and add a comment as
   suggested by Ken.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-10 22:54:46 -07:00
Jonathan Gray e3d43dc5ea genxml: avoid using a GNU make pattern rule
% pattern rules are a GNU extension.  Convert the use of one to a
inference rule to allow this to build on OpenBSD.

v2: inference rules can't have additional prerequisites so add a target
rule to still depend on gen_pack_header.py

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-10 20:54:33 -07:00
Roland Scheidegger 430797843a gallivm: improve dumping of bitcode
Use GALLIVM_DEBUG=dumpbc for dumping of modules as bitcode.
Instead of a fixed llvmpipe.bc name, use ir_<modulename>.bc so multiple
modules can be dumped (albeit it might still overwrite previous modules,
particularly the modules from draw tend to always have the same name).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-05-11 04:43:35 +02:00
Vinson Lee 8d639138c7 swr: [rasterizer] Include cmath for std::isnan and std::isinf.
This patch fixes this build error.

  CXX      rasterizer/memory/libswrAVX_la-ClearTile.lo
In file included from rasterizer/memory/ClearTile.cpp:34:0:
./rasterizer/memory/Convert.h: In function ‘uint16_t Convert32To16Float(float)’:
./rasterizer/memory/Convert.h:170:9: error: ‘__builtin_isnan’ is not a member of ‘std’
     if (std::isnan(val))
         ^
./rasterizer/memory/Convert.h:170:9: note: suggested alternative:
<built-in>: note:   ‘__builtin_isnan’
./rasterizer/memory/Convert.h:176:14: error: ‘__builtin_isinf_sign’ is not a member of ‘std’
     else if (std::isinf(val))
              ^
./rasterizer/memory/Convert.h:176:14: note: suggested alternative:
<built-in>: note:   ‘__builtin_isinf_sign’

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95180
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-05-10 17:11:05 -07:00
Jason Ekstrand a5660bf1f8 i965/blorp: Don't blend integer values during MSAA resolves
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-05-10 15:32:00 -07:00
Jason Ekstrand 4f4f393bf3 meta/blit: Don't blend integer values during MSAA resolves
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-05-10 15:31:50 -07:00
Jason Ekstrand 203c786a73 i965/fs: Default all constants to a location of -1
Otherwise constants which aren't live get an undefined constant location.
When we go to set up param and pull_param we end up assigning all unused
uniforms to slot 0.  This cases the Vulkan driver to segfault because it
doesn't have pull_param.

This fixes bugs in the Vulkan driver introduced in c3fab3d000.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2016-05-10 15:25:30 -07:00
Dave Airlie d36d11ad90 st/glsl_to_tgsi: attach image to correct instruction for samples
This fixes a crash (but not the test):
GL45-CTS.shader_texture_image_samples_tests.functional_test

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-11 06:55:09 +10:00
Dave Airlie 07df3b81ff mesa: move MESA_MAP_NOWAIT_BIT up away from GL_MAP_PERSISTENT_BIT
This was colliding badly and making
GL45-CTS.buffer_storage.map_persistent_texture
fail on radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-11 06:54:56 +10:00
Dave Airlie b230d51a18 mesa/meta: check for signed/unsigned int conversion for pbo getteximage
When doing GetTexSubImage using a PBO, we should check if it involves
a signed/unsigned conversion and bail if it does, just like in the
other cases.

This fixes:
GL33-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pbo
on Haswell at least.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95324
Reviewed-by: Matt Turer <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-11 06:52:20 +10:00
Matt Turner 8bb156a261 i965: Handle BRW_OPCODE_DO on Gen6+ in brw_instruction_name().
This became a problem after the recent disassembler changes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-10 12:12:46 -07:00
Bas Nieuwenhuizen 3d21720d31 radeonsi: Set declared tessellation LDS size to hardware size.
The calculated limit gave problems on SI as it was > 32 KiB
and the hardware LDS size on SI is only 32 KiB. It isn't
correct anyway when processing multiple patches in a threadgroup.

As we potentially have any number of patches such that the
used LDS is at most the hardware LDS size, and exact size
per patch is not known at compile time, this seems like
the only valid bound.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-10 20:14:55 +02:00
Rob Clark 8623e599fc freedreno/ir3: size input/output arrays properly
We index into these based on var->data.driver_location, which might have
gaps (ie. two inputs, one w/ drvloc 0 and other 2).  This shows up in
(for example) 'bin/copyteximage 1D', but was only noticed recently due
to additional asserts.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-05-10 13:17:27 -04:00
Ian Romanick 2483a9a08c ir_to_mesa: Emit smarter ir_binop_logic_or for vertex programs
Continue using ADD in the other case because a fragment shader backend
could fuse the ADD with a MUL to generate a MAD for ((x && y) || z).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-05-10 09:22:18 -07:00
Ian Romanick f7328f9afd prog: Delete all remains of OPCODE_SNE, OPCODE_SEQ, OPCODE_SGT, and OPCODE_SLE
There is nothing left that can generate them.  These used to be
generated by ir_to_mesa or by the assembler for various NV extensions
that have been removed.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-05-10 09:22:18 -07:00
Ian Romanick fd63e77998 ir_to_mesa: Do not emit OPCODE_SEQ or OPCODE_SNE
Nothing that consumes the output of this backend consumes them
navtively.  This is *not* the way i915 has implemented these
instructions, but, as far as I am able to tell, this is the way both the
Cg compiler and the HLSL compiler implement these operations.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-05-10 09:22:18 -07:00
Ian Romanick 15e6a1a3be ir_to_mesa: Do not emit OPCODE_SLE or OPCODE_SGT
Nothing that consumes the output of this backend consumes them
navtively.  This is the way i915 has implemented these instructions
since it began consuming GLSL.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-05-10 09:22:18 -07:00
Samuel Pitoiset e46ac18ebe nvc0: enable compute support by default on GK110+
Compute support seems to be pretty stable now, and according to piglit
it doesn't seem to break 3D state.

As a side effect, this will expose ARB_compute_shader on GK110/GK208.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-05-10 17:47:01 +02:00
Marek Olšák 2b58bc4461 gallium/radeon: don't flush the GFX IB if DMA doesn't depend on it
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-05-10 17:20:09 +02:00
Marek Olšák fb89f06698 radeonsi: consolidate radeon_add_to_buffer_list calls for DMA
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-05-10 17:20:09 +02:00
Marek Olšák 60946c0d60 gallium/radeon: add a heuristic for better (S)DMA performance
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-05-10 17:20:09 +02:00
Marek Olšák bb74152597 gallium/radeon: flush if DMA IB memory usage is too high
This prevents IB rejections due to insane memory usage from
many concecutive texture uploads.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-05-10 17:20:09 +02:00