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prog: Delete all remains of OPCODE_SNE, OPCODE_SEQ, OPCODE_SGT, and OPCODE_SLE 

There is nothing left that can generate them.  These used to be
generated by ir_to_mesa or by the assembler for various NV extensions
that have been removed.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Ian Romanick 2016-04-12 17:38:23 -07:00
parent fd63e77998
commit f7328f9afd
8 changed files with 0 additions and 428 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

148
src/mesa/drivers/dri/i915/i915_fragprog.c
View File

@ -789,68 +789,6 @@ upload_program(struct i915_fragment_program *p)
}
break;
case OPCODE_SEQ:
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
dst = get_result_vector(p, inst);
/* If both operands are uniforms or constants, we get 5 instructions
* like:
*
* U[1] = MOV CONST[1]
* U[0].xyz = SGE CONST[0].xxxx, U[1]
* U[1] = MOV CONST[1].-x-y-z-w
* R[0].xyz = SGE CONST[0].-x-x-x-x, U[1]
* R[0].xyz = MUL R[0], U[0]
*
* This code is stupid. Instead of having the individual calls to
* i915_emit_arith generate the moves to utemps, do it in the caller.
* This results in code like:
*
* U[1] = MOV CONST[1]
* U[0].xyz = SGE CONST[0].xxxx, U[1]
* R[0].xyz = SGE CONST[0].-x-x-x-x, U[1].-x-y-z-w
* R[0].xyz = MUL R[0], U[0]
*/
src0 = src_vector(p, &inst->SrcReg[0], program);
src1 = src_vector(p, &inst->SrcReg[1], program);
if (GET_UREG_TYPE(src0) == REG_TYPE_CONST
&& GET_UREG_TYPE(src1) == REG_TYPE_CONST) {
unsigned tmp = i915_get_utemp(p);
i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
src1, 0, 0);
src1 = tmp;
}
/* tmp = src1 >= src2 */
i915_emit_arith(p,
A0_SGE,
tmp,
flags, 0,
src0,
src1,
0);
/* dst = src1 <= src2 */
i915_emit_arith(p,
A0_SGE,
dst,
flags, 0,
negate(src0, 1, 1, 1, 1),
negate(src1, 1, 1, 1, 1),
0);
/* dst = tmp && dst */
i915_emit_arith(p,
A0_MUL,
dst,
flags, 0,
dst,
tmp,
0);
break;
case OPCODE_SIN:
src0 = src_vector(p, &inst->SrcReg[0], program);
tmp = i915_get_utemp(p);
@ -939,96 +877,10 @@ upload_program(struct i915_fragment_program *p)
EMIT_2ARG_ARITH(A0_SGE);
break;
case OPCODE_SGT:
i915_emit_arith(p,
A0_SLT,
get_result_vector( p, inst ),
get_result_flags( inst ), 0,
negate(src_vector( p, &inst->SrcReg[0], program),
1, 1, 1, 1),
negate(src_vector( p, &inst->SrcReg[1], program),
1, 1, 1, 1),
0);
break;
case OPCODE_SLE:
i915_emit_arith(p,
A0_SGE,
get_result_vector( p, inst ),
get_result_flags( inst ), 0,
negate(src_vector( p, &inst->SrcReg[0], program),
1, 1, 1, 1),
negate(src_vector( p, &inst->SrcReg[1], program),
1, 1, 1, 1),
0);
break;
case OPCODE_SLT:
EMIT_2ARG_ARITH(A0_SLT);
break;
case OPCODE_SNE:
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
dst = get_result_vector(p, inst);
/* If both operands are uniforms or constants, we get 5 instructions
* like:
*
* U[1] = MOV CONST[1]
* U[0].xyz = SLT CONST[0].xxxx, U[1]
* U[1] = MOV CONST[1].-x-y-z-w
* R[0].xyz = SLT CONST[0].-x-x-x-x, U[1]
* R[0].xyz = MUL R[0], U[0]
*
* This code is stupid. Instead of having the individual calls to
* i915_emit_arith generate the moves to utemps, do it in the caller.
* This results in code like:
*
* U[1] = MOV CONST[1]
* U[0].xyz = SLT CONST[0].xxxx, U[1]
* R[0].xyz = SLT CONST[0].-x-x-x-x, U[1].-x-y-z-w
* R[0].xyz = MUL R[0], U[0]
*/
src0 = src_vector(p, &inst->SrcReg[0], program);
src1 = src_vector(p, &inst->SrcReg[1], program);
if (GET_UREG_TYPE(src0) == REG_TYPE_CONST
&& GET_UREG_TYPE(src1) == REG_TYPE_CONST) {
unsigned tmp = i915_get_utemp(p);
i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
src1, 0, 0);
src1 = tmp;
}
/* tmp = src1 < src2 */
i915_emit_arith(p,
A0_SLT,
tmp,
flags, 0,
src0,
src1,
0);
/* dst = src1 > src2 */
i915_emit_arith(p,
A0_SLT,
dst,
flags, 0,
negate(src0, 1, 1, 1, 1),
negate(src1, 1, 1, 1, 1),
0);
/* dst = tmp || dst */
i915_emit_arith(p,
A0_ADD,
dst,
flags | A0_DEST_SATURATE, 0,
dst,
tmp,
0);
break;
case OPCODE_SSG:
dst = get_result_vector(p, inst);
flags = get_result_flags(inst);

72
src/mesa/program/prog_execute.c
View File

@ -967,24 +967,6 @@ _mesa_execute_program(struct gl_context * ctx,
store_vector4(inst, machine, result);
}
break;
case OPCODE_SEQ: /* set on equal */
{
GLfloat a[4], b[4], result[4];
fetch_vector4(&inst->SrcReg[0], machine, a);
fetch_vector4(&inst->SrcReg[1], machine, b);
result[0] = (a[0] == b[0]) ? 1.0F : 0.0F;
result[1] = (a[1] == b[1]) ? 1.0F : 0.0F;
result[2] = (a[2] == b[2]) ? 1.0F : 0.0F;
result[3] = (a[3] == b[3]) ? 1.0F : 0.0F;
store_vector4(inst, machine, result);
if (DEBUG_PROG) {
printf("SEQ (%g %g %g %g) = (%g %g %g %g) == (%g %g %g %g)\n",
result[0], result[1], result[2], result[3],
a[0], a[1], a[2], a[3],
b[0], b[1], b[2], b[3]);
}
}
break;
case OPCODE_SGE: /* set on greater or equal */
{
GLfloat a[4], b[4], result[4];
@ -1003,24 +985,6 @@ _mesa_execute_program(struct gl_context * ctx,
}
}
break;
case OPCODE_SGT: /* set on greater */
{
GLfloat a[4], b[4], result[4];
fetch_vector4(&inst->SrcReg[0], machine, a);
fetch_vector4(&inst->SrcReg[1], machine, b);
result[0] = (a[0] > b[0]) ? 1.0F : 0.0F;
result[1] = (a[1] > b[1]) ? 1.0F : 0.0F;
result[2] = (a[2] > b[2]) ? 1.0F : 0.0F;
result[3] = (a[3] > b[3]) ? 1.0F : 0.0F;
store_vector4(inst, machine, result);
if (DEBUG_PROG) {
printf("SGT (%g %g %g %g) = (%g %g %g %g) > (%g %g %g %g)\n",
result[0], result[1], result[2], result[3],
a[0], a[1], a[2], a[3],
b[0], b[1], b[2], b[3]);
}
}
break;
case OPCODE_SIN:
{
GLfloat a[4], result[4];
@ -1030,24 +994,6 @@ _mesa_execute_program(struct gl_context * ctx,
store_vector4(inst, machine, result);
}
break;
case OPCODE_SLE: /* set on less or equal */
{
GLfloat a[4], b[4], result[4];
fetch_vector4(&inst->SrcReg[0], machine, a);
fetch_vector4(&inst->SrcReg[1], machine, b);
result[0] = (a[0] <= b[0]) ? 1.0F : 0.0F;
result[1] = (a[1] <= b[1]) ? 1.0F : 0.0F;
result[2] = (a[2] <= b[2]) ? 1.0F : 0.0F;
result[3] = (a[3] <= b[3]) ? 1.0F : 0.0F;
store_vector4(inst, machine, result);
if (DEBUG_PROG) {
printf("SLE (%g %g %g %g) = (%g %g %g %g) <= (%g %g %g %g)\n",
result[0], result[1], result[2], result[3],
a[0], a[1], a[2], a[3],
b[0], b[1], b[2], b[3]);
}
}
break;
case OPCODE_SLT: /* set on less */
{
GLfloat a[4], b[4], result[4];
@ -1066,24 +1012,6 @@ _mesa_execute_program(struct gl_context * ctx,
}
}
break;
case OPCODE_SNE: /* set on not equal */
{
GLfloat a[4], b[4], result[4];
fetch_vector4(&inst->SrcReg[0], machine, a);
fetch_vector4(&inst->SrcReg[1], machine, b);
result[0] = (a[0] != b[0]) ? 1.0F : 0.0F;
result[1] = (a[1] != b[1]) ? 1.0F : 0.0F;
result[2] = (a[2] != b[2]) ? 1.0F : 0.0F;
result[3] = (a[3] != b[3]) ? 1.0F : 0.0F;
store_vector4(inst, machine, result);
if (DEBUG_PROG) {
printf("SNE (%g %g %g %g) = (%g %g %g %g) != (%g %g %g %g)\n",
result[0], result[1], result[2], result[3],
a[0], a[1], a[2], a[3],
b[0], b[1], b[2], b[3]);
}
}
break;
case OPCODE_SSG: /* set sign (-1, 0 or +1) */
{
GLfloat a[4], result[4];

4
src/mesa/program/prog_instruction.c
View File

@ -169,13 +169,9 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_RET, "RET", 0, 0 },
{ OPCODE_RSQ, "RSQ", 1, 1 },
{ OPCODE_SCS, "SCS", 1, 1 },
{ OPCODE_SEQ, "SEQ", 2, 1 },
{ OPCODE_SGE, "SGE", 2, 1 },
{ OPCODE_SGT, "SGT", 2, 1 },
{ OPCODE_SIN, "SIN", 1, 1 },
{ OPCODE_SLE, "SLE", 2, 1 },
{ OPCODE_SLT, "SLT", 2, 1 },
{ OPCODE_SNE, "SNE", 2, 1 },
{ OPCODE_SSG, "SSG", 1, 1 },
{ OPCODE_SUB, "SUB", 2, 1 },
{ OPCODE_SWZ, "SWZ", 1, 1 },

4
src/mesa/program/prog_instruction.h
View File

@ -158,13 +158,9 @@ enum prog_opcode {
OPCODE_RET, /* 2 2 opt */
OPCODE_RSQ, /* X X X X X */
OPCODE_SCS, /* X X */
OPCODE_SEQ, /* 2 X X */
OPCODE_SGE, /* X X X X X */
OPCODE_SGT, /* 2 X X */
OPCODE_SIN, /* X 2 X X */
OPCODE_SLE, /* 2 X X */
OPCODE_SLT, /* X X X X X */
OPCODE_SNE, /* 2 X X */
OPCODE_SSG, /* 2 X */
OPCODE_SUB, /* X X 1.1 X X */
OPCODE_SWZ, /* X X X */

128
src/mesa/program/prog_opt_constant_fold.c
View File

@ -240,38 +240,6 @@ _mesa_constant_fold(struct gl_program *prog)
}
break;
case OPCODE_SEQ:
if (src_regs_are_constant(inst, 2)) {
float a[4];
float b[4];
float result[4];
get_value(prog, &inst->SrcReg[0], a);
get_value(prog, &inst->SrcReg[1], b);
result[0] = (a[0] == b[0]) ? 1.0f : 0.0f;
result[1] = (a[1] == b[1]) ? 1.0f : 0.0f;
result[2] = (a[2] == b[2]) ? 1.0f : 0.0f;
result[3] = (a[3] == b[3]) ? 1.0f : 0.0f;
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_vec4(prog, result);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
} else if (src_regs_are_same(&inst->SrcReg[0], &inst->SrcReg[1])) {
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_float(prog, 1.0f);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
}
break;
case OPCODE_SGE:
if (src_regs_are_constant(inst, 2)) {
float a[4];
@ -304,70 +272,6 @@ _mesa_constant_fold(struct gl_program *prog)
}
break;
case OPCODE_SGT:
if (src_regs_are_constant(inst, 2)) {
float a[4];
float b[4];
float result[4];
get_value(prog, &inst->SrcReg[0], a);
get_value(prog, &inst->SrcReg[1], b);
result[0] = (a[0] > b[0]) ? 1.0f : 0.0f;
result[1] = (a[1] > b[1]) ? 1.0f : 0.0f;
result[2] = (a[2] > b[2]) ? 1.0f : 0.0f;
result[3] = (a[3] > b[3]) ? 1.0f : 0.0f;
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_vec4(prog, result);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
} else if (src_regs_are_same(&inst->SrcReg[0], &inst->SrcReg[1])) {
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_float(prog, 0.0f);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
}
break;
case OPCODE_SLE:
if (src_regs_are_constant(inst, 2)) {
float a[4];
float b[4];
float result[4];
get_value(prog, &inst->SrcReg[0], a);
get_value(prog, &inst->SrcReg[1], b);
result[0] = (a[0] <= b[0]) ? 1.0f : 0.0f;
result[1] = (a[1] <= b[1]) ? 1.0f : 0.0f;
result[2] = (a[2] <= b[2]) ? 1.0f : 0.0f;
result[3] = (a[3] <= b[3]) ? 1.0f : 0.0f;
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_vec4(prog, result);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
} else if (src_regs_are_same(&inst->SrcReg[0], &inst->SrcReg[1])) {
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_float(prog, 1.0f);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
}
break;
case OPCODE_SLT:
if (src_regs_are_constant(inst, 2)) {
float a[4];
@ -400,38 +304,6 @@ _mesa_constant_fold(struct gl_program *prog)
}
break;
case OPCODE_SNE:
if (src_regs_are_constant(inst, 2)) {
float a[4];
float b[4];
float result[4];
get_value(prog, &inst->SrcReg[0], a);
get_value(prog, &inst->SrcReg[1], b);
result[0] = (a[0] != b[0]) ? 1.0f : 0.0f;
result[1] = (a[1] != b[1]) ? 1.0f : 0.0f;
result[2] = (a[2] != b[2]) ? 1.0f : 0.0f;
result[3] = (a[3] != b[3]) ? 1.0f : 0.0f;
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_vec4(prog, result);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
} else if (src_regs_are_same(&inst->SrcReg[0], &inst->SrcReg[1])) {
inst->Opcode = OPCODE_MOV;
inst->SrcReg[0] = src_reg_for_float(prog, 0.0f);
inst->SrcReg[1].File = PROGRAM_UNDEFINED;
inst->SrcReg[1].Swizzle = SWIZZLE_NOOP;
progress = true;
}
break;
default:
break;
}

4
src/mesa/program/prog_optimize.c
View File

@ -73,12 +73,8 @@ get_src_arg_mask(const struct prog_instruction *inst,
case OPCODE_FLR:
case OPCODE_FRC:
case OPCODE_LRP:
case OPCODE_SEQ:
case OPCODE_SGE:
case OPCODE_SGT:
case OPCODE_SLE:
case OPCODE_SLT:
case OPCODE_SNE:
case OPCODE_SSG:
channel_mask = inst->DstReg.WriteMask & dst_mask;
break;

60
src/mesa/program/prog_to_nir.c
View File

@ -444,46 +444,6 @@ ptn_sge(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
}
}
static void
ptn_sle(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
{
nir_ssa_def *commuted[] = { src[1], src[0] };
ptn_sge(b, dest, commuted);
}
static void
ptn_sgt(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
{
nir_ssa_def *commuted[] = { src[1], src[0] };
ptn_slt(b, dest, commuted);
}
/**
* Emit SEQ. For platforms with integers, prefer b2f(feq(...)).
*/
static void
ptn_seq(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
{
if (b->shader->options->native_integers) {
ptn_move_dest(b, dest, nir_b2f(b, nir_feq(b, src[0], src[1])));
} else {
ptn_move_dest(b, dest, nir_seq(b, src[0], src[1]));
}
}
/**
* Emit SNE. For platforms with integers, prefer b2f(fne(...)).
*/
static void
ptn_sne(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
{
if (b->shader->options->native_integers) {
ptn_move_dest(b, dest, nir_b2f(b, nir_fne(b, src[0], src[1])));
} else {
ptn_move_dest(b, dest, nir_sne(b, src[0], src[1]));
}
}
static void
ptn_xpd(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
{
@ -716,13 +676,9 @@ static const nir_op op_trans[MAX_OPCODE] = {
[OPCODE_RSQ] = 0,
[OPCODE_SCS] = 0,
[OPCODE_SEQ] = 0,
[OPCODE_SGE] = 0,
[OPCODE_SGT] = 0,
[OPCODE_SIN] = 0,
[OPCODE_SLE] = 0,
[OPCODE_SLT] = 0,
[OPCODE_SNE] = 0,
[OPCODE_SSG] = nir_op_fsign,
[OPCODE_SUB] = nir_op_fsub,
[OPCODE_SWZ] = 0,
@ -845,26 +801,10 @@ ptn_emit_instruction(struct ptn_compile *c, struct prog_instruction *prog_inst)
ptn_slt(b, dest, src);
break;
case OPCODE_SGT:
ptn_sgt(b, dest, src);
break;
case OPCODE_SLE:
ptn_sle(b, dest, src);
break;
case OPCODE_SGE:
ptn_sge(b, dest, src);
break;
case OPCODE_SEQ:
ptn_seq(b, dest, src);
break;
case OPCODE_SNE:
ptn_sne(b, dest, src);
break;
case OPCODE_TEX:
case OPCODE_TXB:
case OPCODE_TXD:

8
src/mesa/state_tracker/st_mesa_to_tgsi.c
View File

@ -583,20 +583,12 @@ translate_opcode( unsigned op )
return TGSI_OPCODE_RET;
case OPCODE_SCS:
return TGSI_OPCODE_SCS;
case OPCODE_SEQ:
return TGSI_OPCODE_SEQ;
case OPCODE_SGE:
return TGSI_OPCODE_SGE;
case OPCODE_SGT:
return TGSI_OPCODE_SGT;
case OPCODE_SIN:
return TGSI_OPCODE_SIN;
case OPCODE_SLE:
return TGSI_OPCODE_SLE;
case OPCODE_SLT:
return TGSI_OPCODE_SLT;
case OPCODE_SNE:
return TGSI_OPCODE_SNE;
case OPCODE_SSG:
return TGSI_OPCODE_SSG;
case OPCODE_SUB: