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freedreno/ir3: size input/output arrays properly 

We index into these based on var->data.driver_location, which might have
gaps (ie. two inputs, one w/ drvloc 0 and other 2).  This shows up in
(for example) 'bin/copyteximage 1D', but was only noticed recently due
to additional asserts.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Rob Clark 2016-05-10 11:46:11 -04:00
parent 2483a9a08c
commit 8623e599fc
1 changed files with 14 additions and 3 deletions
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17
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
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@ -2148,11 +2148,21 @@ setup_output(struct ir3_compile *ctx, nir_variable *out)
for (int i = 0; i < ncomp; i++) {
unsigned idx = (n * 4) + i;
compile_assert(ctx, idx < ctx->ir->noutputs);
ctx->ir->outputs[idx] = create_immed(ctx->block, fui(0.0));
}
}
static int
max_drvloc(struct exec_list *vars)
{
int drvloc = -1;
nir_foreach_variable(var, vars) {
drvloc = MAX2(drvloc, (int)var->data.driver_location);
}
return drvloc;
}
static void
emit_instructions(struct ir3_compile *ctx)
{
@ -2167,8 +2177,9 @@ emit_instructions(struct ir3_compile *ctx)
break;
}
ninputs = exec_list_length(&ctx->s->inputs) * 4;
noutputs = exec_list_length(&ctx->s->outputs) * 4;
ninputs = (max_drvloc(&ctx->s->inputs) + 1) * 4;
noutputs = (max_drvloc(&ctx->s->outputs) + 1) * 4;
/* or vtx shaders, we need to leave room for sysvals:
*/