Commit Graph

117319 Commits

Author SHA1 Message Date
Eric Engestrom 2c4395e61c meson: add variable to control the symbols checks
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviwed-by: Dylan Baker <dylan@pnwbakers>
2019-11-05 20:12:32 +00:00
Pierre-Eric Pelloux-Prayer 67718ca352 mesa: fix call to _mesa_lookup_vao_err
Fixes: 3e842a0b0e ("mesa: rework _mesa_lookup_vao_err to allow usage from EXT_dsa")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2055
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-11-05 12:05:33 -08:00
Dylan Baker 5d085ad052 meson: Add dep_glvnd to egl deps when building with glvnd
Otherwise if glvnd is not installed systemwide, but only in a prefix,
it's headers wont be found. This happens because if it's headers are in
/usr/include/ then another dependence will provide the necessary -I
arguments and compilation will work.

Fixes: 035ec7a2bb
       ("meson: Add support for EGL glvnd")
Acked-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:44:41 +00:00
Dylan Baker 9020f519d2 util/u_endian: Add error checks
As suggested by Eric Engestrom and Michel Dänzer.
2019-11-05 16:39:55 +00:00
Dylan Baker ee4f1bc187 util: rename PIPE_ARCH_*_ENDIAN to UTIL_ARCH_*_ENDIAN
As requested by Tim.

This was generated with:
grep 'PIPE_ARCH_.*_ENDIAN' -rIl | xargs sed -ie 's@PIPE_ARCH_\(.*\)_ENDIAN@UTIL_ARCH_\1_ENDIAN@'g

v2: - add this patch

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker 6b6897a9f9 gallium/osmesa: Use PIPE_ARCH_*_ENDIAN instead of little_endian function
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker 39b9fe03a9 mesa/main: delete now unused _mesa_little_endian
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker f73a9c6586 mesa/swrast: replace instances of _mesa_little_endian with preprocessor
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker 453d52acd8 mesa/main: replace uses of _mesa_little_endian with preprocessor
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker f9f60da813 util/u_endian: set PIPE_ARCH_*_ENDIAN to 1
This will allow it to be used as a drop in replacement for
_mesa_little_endian in a number of cases.

v2: - Always define PIPE_ARCH_LITTLE_ENDIAN and PIPE_ARCH_BIG_ENDIAN,
      define the one that reflects the host system to 1 and the other to 0
    - replace all uses of #ifdef, #ifndef, and #if defined() with #if
      and #if ! with PIPE_ARCH_*_ENDIAN

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker 37e54736a7 util/u_endian: Use _WIN32 instead of _MSC_VER
_WIN32 is defined by basically all windows compilers (MSVC, ICL, MinGW),
wereas _MSC_VER is not defined by MinGW. Without this change MinGW falls
through and doesn't define PIPE_ARCH at all, and is caught by some extra
code in gallium.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker cb0dbdd369 dri/osmesa: use preprocessor for selecting endian code paths
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker 68d8c1f971 r100: Use preprocessor to select big vs little endian paths
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Dylan Baker a550b6b7f8 r200: use preprocessor for big vs little endian checks
Instead of using a function at runtime we can just build the right code
for the right platform.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-11-05 16:39:55 +00:00
Philipp Sieweck 38e706656d svga: check return value of define_query_vgpu{9,10}
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2019-11-05 16:23:39 +00:00
Tomeu Vizoso 427d0c4b6a gitlab-ci: Run only LAVA jobs in special-named branches
Run only jobs needed for testing on LAVA devices if a branch starts with
lava-ci-.

This allows developers to have faster test cycles as these pipelines
take only a bit above 8 minutes. Also has the advantage of conserving
resources.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-05 16:09:47 +01:00
Pierre-Eric Pelloux-Prayer febedee4f6 mesa: add EXT_dsa glGetVertexArray* 4 functions
The implementation doesn't share much with get.c because:
  * the refactoring needed for get.c to not depend on ctx->Array.VAO would
    be quite large
  * glGetVertexArray* would still need to filter pname to only accept the one
    specified by the spec
  * these functions are getter, the implementation is trivial (the complexity
    is in the correct filtering of pname input)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer 2b44ca779b mesa: extract helper function from _mesa_GetPointerv
Will be used by EXT_dsa gllGetVertexArrayPointervEXT implementation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer 5adeff8033 mesa: add EXT_dsa EnableVertexArrayAttribEXT / DisableVertexArrayAttribEXT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer f793a8663d mesa: add EXT_dsa glEnableVertexArrayEXT / glDisableVertexArrayEXT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer a053361793 mesa: add gl_vertex_array_object parameter to client state helpers
This will allow to use the same helper for the EXT_direct_state_access
implementation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer aef5d99671 mesa: add EXT_dsa glVertexArray* functions implementation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer a78d4e7e75 mesa: add vao/vbo lookup helper for EXT_dsa
Add a single helper dealing with the lookup of both the vao
and the vbo to avoid duplicating this code in all the
glVertexArray* functions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer 3e842a0b0e mesa: rework _mesa_lookup_vao_err to allow usage from EXT_dsa
ARB_dsa and EXT_dsa slightly differs when an uninitialized VAO
is requested.
In this case ARB_dsa fails while EXT_dsa requires to initialize
the object.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer a26bb93943 mesa: add EXT_dsa glVertexArray* functions declarations
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Pierre-Eric Pelloux-Prayer bfc1e4c112 mesa: pass vao as a function paramter
This change will allow reusing the same function for the
EXT_direct_state_access implementation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-05 13:58:28 +01:00
Michel Dänzer d80dece065 gitlab-ci: Set arm job CCACHE_DIR properly
$PWD doesn't work for variables:, it ended up as "/ccache", always
starting with an empty cache.

v2:
* Use relative path and realpath
v3:
* Use $CI_PROJECT_DIR (Eric Anholt)
* Clear ccache stats in before_script if the cache is in $CI_PROJECT_DIR

Fixes: c9df92bf79 "ci: Switch over to an autoscaling GKE cluster for
                     builds."
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-05 09:27:32 +01:00
Kenneth Graunke 337f58438e nir: Handle image arrays when setting variable data
Fixes a ton of regressions in image load store tests.

Fixes: 4319cc8c0f ("nir: pack nir_variable::data::xfb_*")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 18:16:06 -08:00
Paulo Zanoni b57383a944 intel/compiler: remove the operand restriction for src1 on GLK
Commit 5847de6e9a implemented a restriction that applies to ICL, but
wrongly marked it as also applying to GLK. Reviewers or MR !1125
pointed this, and the commit history shows removal of GLK to parts of
the patch, but it turns there was still a left-over GLK check in the
code.

This code was breaking some of the i8vec2 tests on GLK, for example:
  dEQP-VK.subgroups.arithmetic.compute.subgroupadd_i8vec2

Removing the GLK check solves the issue for GLK. I don't see a reason
on why implementing this restriction would actually break GLK, so
there's still more to investigate here since this bug may be affecting
ICL+, but let's apply the real GLK fix while we analyze and discuss
the other possible issues.

Fixes: 5847de6e9a ("intel/compiler: don't use byte operands for src1
on ICL")
BSpec: 3017
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2019-11-05 00:08:34 +00:00
Marek Olšák 4319cc8c0f nir: pack nir_variable::data::xfb_*
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 18:17:34 -05:00
Marek Olšák 08dc541b66 nir: pack nir_variable::data::stream
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 18:17:34 -05:00
Ian Romanick 9be4a422a0 nir/algebraic: Mark other comparison exact when removing a == a
This prevents some additional optimizations that would change the
original result.  This includes things like (b < a && b < c) => b <
min(a, c) and !(a < b) => b >= a.  Both of these optimizations were
specifically observed in the piglit tests added in piglit!160.

This was discovered while investigating
https://gitlab.freedesktop.org/mesa/mesa/issues/1958.  However, the
problem in that issue was Chrome or Angle is replacing calls to isnan()
with some stuff that we (correctly) optimize to false.  If they had left
the calls to isnan() alone, everything would have just worked.

No shader-db changes on any Intel platform.

I also tried marking the comparison generated by the isnan() function
precise.  The precise marker "infects" every computation involved in
calculating the parameter to the isnan() function, and this severely
hurt all of the (few) shaders in shader-db that use isnan().

I also considered adding a new ir_unop_isnan opcode that would implement
the functionality.  During GLSL IR-to-NIR translation, the resulting
comparison operation would be marked exact (and the samething would need
to happen in SPIR-V translation).

This approach taken by this patch seemed easier, but we may want to do
the ir_unop_isnan thing anyway.

Fixes: d55835b8bd ("nir/algebraic: Add optimizations for "a == a && a CMP b"")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 14:05:49 -08:00
Ian Romanick ea19f2fb68 nir/algebraic: Add the ability to mark a replacement as exact
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 14:05:49 -08:00
Marek Olšák af94600484 compiler: make variable::data::binding unsigned
Nothing seems to set a negative value.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 16:49:46 -05:00
Marek Olšák 4b4b383f38 st/mesa: call nir_lower_flrp only once per shader
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 16:49:44 -05:00
Marek Olšák 7d00218aed st/mesa: call nir_opt_access only once
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-11-04 16:49:42 -05:00
Leo Liu 352b57d709 ac: add missing Arcturus to the info of pc lines
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: Marek Olšák <marek.olsak@amd.com>
2019-11-04 16:27:35 -05:00
Alyssa Rosenzweig 4da648a170 panfrost/ci: Update T760 expectations
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig 12d071024b pan/midgard: Extend default_phys_reg to !32-bit
We can pass through a size.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig 762623381d pan/midgard: Extend swizzle packing for vec4/16-bit
We would like to pack not just xyzw swizzles but also efgh swizzles.
This should work for vec4/16-bit. More work will be needed to pack
swizzles for vec8/16-bit and even more work for 8-bit, of course.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig bf5508f7b9 pan/midgard: Extend offset_swizzle to non-32-bit
We take a size parameter; use it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig f538981384 pan/midgard: offset_swizzle doesn't need dstsize
This argument should be omitted.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig 9eac9389fb pan/midgard: Add bizarre corner case
Someone really needs to look into this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig 4ae4d82e21 pan/midgard: Compute bundle interference
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig 45ac8ea8bd pan/midgard: Fix quadword_count handling
Spilling can mess with this considerably.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Alyssa Rosenzweig 0a77dd3203 pan/midgard: Validate tags when branching
Midgard prefetches instructions based on tag (ALU, LD/ST, texture *
size). To do so, the shader descriptor specifies the tag of the first
instruction, all instructions specify the tag of the next linear
instruction is, and all branches explicitly specify the tag of the
branch target.

If you mess this up, you get an INSTR_TYPE_MISMATCH, which unambiguously
refers to this problem, but it's still annoying to try to work out all
the branch targets in your head to debug.

Instead, let's track the tags of various blocks over time, so we can
automatically validate tags of branch targets, to make
INSTR_TYPE_MISMATCH issues immediately obvious in a disassembly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-04 15:36:08 -05:00
Daniel Schürmann efe737fc4f aco: fix accidential reordering of instructions when scheduling
Fixes: 8678699918 "aco: implement VGPR spilling"

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
2019-11-04 20:14:14 +01:00
Daniel Schürmann 5c7dcb15e0 aco: only use single-dword loads/stores for spilling
Fixes: 8678699918 "aco: implement VGPR spilling"

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
2019-11-04 20:14:14 +01:00
Daniel Schürmann d97c0bdd55 aco: fix immediate offset for spills if scratch is used
Fixes: 8678699918 "aco: implement VGPR spilling"

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
2019-11-04 20:14:14 +01:00
Lionel Landwerlin ee6fbb95a7 anv: Properly handle host query reset of performance queries
The host query reset entry point didn't use the availability offset
for performance queries.

To fix this, reorder the availability of performance queries to match
other queries.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2b5f30b1d9 ("anv: implement VK_INTEL_performance_query")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-11-04 19:04:38 +00:00