Mike Blumenkrantz
269083d94b
zink: delete nir_lower_dynamic_bo_access
...
no longer used
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906 >
2022-05-10 05:55:55 +00:00
Mike Blumenkrantz
a7327c7cac
zink: implement indirect buffer indexing
...
this compacts all buffers in the shader into an array that can be
used in a single descriptor, thus handling the case of indirect indexing
while also turning constant indexing into indirect (with const offsets)
since there's no sane way to distinguish
a "proper" implementation of this would be to skip gl_nir_lower_buffers
and nir_lower_explicit_io altogether and retain the derefs, but that would
require a ton of legwork of other nir passes which only operate on the
explicit io intrinsics
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906 >
2022-05-10 05:55:55 +00:00
Mike Blumenkrantz
1f8cd768d6
zink: flatten push descriptor template into normal template array
...
this simplifies some code
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906 >
2022-05-10 05:55:55 +00:00
Mike Blumenkrantz
b0324d2479
zink: decouple descriptor templates from layouts
...
the same layout will in the future have multiple templates
depending on which resources are being updated
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906 >
2022-05-10 05:55:55 +00:00
Mike Blumenkrantz
c0c69b1be1
zink: semi-handle 1D sparse texture rewrites for drivers that don't support them
...
nvidia can't do this, but also nothing uses it, so I've gone ahead and
done the bare minimum here to make cts pass
I think the work to do the shader rewrites should be easy, but without a test
case, I see no point in spending the time for it
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100 >
2022-05-10 05:44:56 +00:00
Mike Blumenkrantz
c637c5a894
zink: bump number of image binds that can be batched to 50
...
this is big enough to batch all the cts binds into a single submit
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100 >
2022-05-10 05:44:56 +00:00
Mike Blumenkrantz
0e49ef5c9f
zink: fix multisample conditional in sparse image query
...
you stare at the code for so long without truly seeing it
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100 >
2022-05-10 05:44:56 +00:00
Mike Blumenkrantz
9a412c10b7
zink: set all usage flags when querying sparse features
...
they're allocated through TexStorage, so they can do everything
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100 >
2022-05-10 05:44:56 +00:00
Mike Blumenkrantz
5ff3fa5912
zink: pass sparse bind bo offset through for texture binds
...
should fix partial binding with textures
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100 >
2022-05-10 05:44:56 +00:00
Mike Blumenkrantz
6317f88b04
zink: pass sparse backing page offset to binding function
...
this is the offset of the memory block being bound
cc: mesa-stable
fixes:
KHR-GL46.sparse_buffer_tests.BufferStorageTest
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100 >
2022-05-10 05:44:56 +00:00
Mike Blumenkrantz
d0f15304a3
zink: scale depth bias by factor of 2
...
this is enough to fix CTS
affects/fixes:
dEQP-GLES3.functional.polygon_offset.default_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed24_render_with_units
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16195 >
2022-05-10 05:32:42 +00:00
Emma Anholt
f3df3d4c80
glsl: Make all drivers take the GLSLOptimizeConservatively path.
...
Now that all consumers of GLSL use NIR, make the remaining drivers take
the path that relies on NIR to really do optimization.
nouveau steam shader-db runtime -6.69631% +/- 1.29235% (n=12).
No change on shader-db there.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16364 >
2022-05-10 05:03:34 +00:00
Marek Olšák
d100c07c48
radeonsi: remove tautologies when setting CU_EN
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Ruijing Dong
74bd5bbf28
radeonsi/vcn: update av1 decoding to support vcn4
...
Apply changes of vcn4 on av1 decoding.
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Ruijing Dong
62bb11a5a5
radeonsi/vcn: Add support of array_mode for gfx11
...
Update array_mode for gfx11 in vcn decoder.
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
James Zhu
88075b7ea1
radeonsi/vcn: add jpeg decode support for gfx11
...
Add jpeg decode support for gfx11.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
caa09f66ae
amd: add chip identification for gfx1100-1103
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Boyuan Zhang
b00ab763a9
radeonsi/vcn: enable vcn 4.0 encode for gfx11 asic
...
Enable VCN 4.0 encode for supported Asics.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Boyuan Zhang
efde05c631
radeonsi/vcn: add session init ib for vcn 4.0
...
Implement session init ib based on new interface for VCN 4.0.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Boyuan Zhang
dbd75e0d48
radeonsi/vcn: add encode context ib for vcn 4.0
...
Implement encode context ib based on new reconstructed picture and
interface for VCN 4.0, and modify dpb setup accordingly.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Boyuan Zhang
38a95f2109
radeonsi/vcn: add vcn 4.0 encode fw interface version
...
Add major and minor encode FW interface version for VCN 4.0.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Boyuan Zhang
ff2b2584fc
radeonsi/vcn: add vcn 4.0 encode support
...
Add new file "radeon_vcn_enc_4_0.c" for VCN 4.0 encode.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
James Zhu
f9de35a731
radeonsi/vcn: add decode software ring support for gfx11
...
Add decode software ring support for gfx11.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
James Zhu
b8a3bafe94
radeonsi/gfx11: update codec support for gfx11
...
Update codec support for gfx11.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
James Zhu
69f02164b3
amd: update headers to support decode software ring
...
Update headers to support decode software ring.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
2e4e39837a
radeonsi/gfx11: add a workaround for CB perf counters
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
e3b4e1fe85
radeonsi: inline si_cp_dma_prefetch in si_draw_vbo for lower overhead
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
1bc6d6c933
radeonsi/gfx11: limit CP DMA to max 32KB sizes
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
3bc754a9a6
radeonsi/gfx11: mark streamout as unimplemented for now
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
66d4bafd5b
radeonsi/gfx11: resolve MSAA using u_blitter
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
8bfb4657c8
radeonsi/gfx11: don't count the non-existent scratch_byte_offset SGPR
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
c65a303f53
radeonsi/gfx11: change LDS allocation granularity for PS
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
c749b6f6ae
radeonsi/gfx11: update the initialization of SGPR0/1 registers for HS and GS
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
54d85700a1
radeonsi/gfx11: limit MSAA color buffers to the RGBA channel order
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Yogesh mohan marimuthu
6531ec8922
ac,radeonsi/gfx11: swizzle MRT0/1 for dual source blending
...
If dual source blending is enabled, use export targets 21 and 22.
Also we have to swap odd/even lanes between export target 21 and 22.
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Yogesh Mohan Marimuthu
12a606c1bd
radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there
...
If both mrtz and alpha-to-coverage are enabled, the alpha channel must
be exported through mrtz.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Indrajit Kumar Das
167b378377
radeonsi/gfx11: VRS changes
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
6d0e50f226
radeonsi/gfx11: TF_RING_SIZE changed to a per-SE size
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
ce950f1d96
radeonsi/gfx11: don't use FLUSH_AND_INV_DB_META
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
c33a930cea
radeonsi/gfx11: emit SQ_NON_EVENT for tessellation at the end of IBs
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
b27b9b0c31
radeonsi/gfx11: don't set non-existent CP_COHER_START_DELAY
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Yogesh mohan marimuthu
19a59f05a4
radeonsi/gfx11: program db render control register
...
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
9fecac091f
radeonsi/gfx11: scattered register deltas
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
afc110a1f6
radeonsi/gfx11: implement attributes through memory
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
91a7f43f0b
radeonsi/gfx11: don't set COMPR for exports, use 0x3 channel mask instead
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Yogesh Mohanmarimuthu
6e537680c4
radeonsi/gfx11: use PIXEL_PIPE_STATE_DUMP event instead of ZPASS_DONE
...
Use PIXEL_PIPE_STATE_CONTROL/DUMP event instead of ZPASS_DONE for gfx11.
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:55 +00:00
Marek Olšák
2a1c22e0cd
radeonsi/gfx11: don't set non-existent SPI_SHADER_USER_DATA_VS_x
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:54 +00:00
Marek Olšák
61291aff1f
ac,radeonsi/gfx11: set SWIZZLE_ENABLE correctly
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:54 +00:00
Marek Olšák
a90ff631a5
ac,radeonsi/gfx11: remove FMASK loads
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:54 +00:00
Marek Olšák
529eb739fc
radeonsi/gfx11: add CB deltas
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328 >
2022-05-10 04:29:54 +00:00