Commit Graph

69975 Commits

Author SHA1 Message Date
Iago Toral Quiroga 96142a3e87 swrast: Fix rgba_draw_pixels with GL_COLOR_INDEX
When we implemented the format conversion rewrite we forgot to handle
GL_COLOR_INDEX here, which needs special handling.

Fixes the following piglit test:
bin/gl-1.0-drawpixels-color-index -auto -fbo

Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90213

Tested-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-04 16:08:41 +02:00
Francisco Jerez f1d1d17db6 i965: Add memory fence opcode.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-04 15:05:21 +03:00
Francisco Jerez f118e5d15f i965: Add typed surface access opcodes.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-04 15:05:21 +03:00
Francisco Jerez 0775d8835a i965: Add untyped surface write opcode.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:21 +03:00
Francisco Jerez c97a7705ea i965: Reorder sources of the untyped atomic opcode.
This is consistent with the untyped surface read opcode.  From now on
all typed and untyped surface access opcodes will follow the same
pattern: src[0] will be the message payload, src[1] will be the
surface index and src[2] will be a control immediate (atomic operation
for atomic opcodes and number of vector components for surface read
and write opcodes).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez ac747ca5f7 i965: Pass the number of components as a source of the untyped surface read opcode.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez 20915130ac i965/vec4: Add support for untyped surface message sends from GRF.
This doesn't actually enable untyped surface message sends from GRF
yet, the upcoming atomic counter and image intrinsic lowering code
will.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez 8865fe309d i965: Don't request untyped atomic writeback message if the destination is null.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez 0519a6259b i965: Simplify generator code for untyped surface messages.
The generate_untyped_*() methods do nothing useful other than calling
the corresponding function from brw_eu_emit.c.  The calls to
brw_mark_surface_used() will go away too in a future commit.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-04 15:05:20 +03:00
Francisco Jerez 2f1c16df3e i965: Fix the untyped surface opcodes to deal with indirect surface access.
Change brw_untyped_atomic() and brw_untyped_surface_read() to take the
surface index as a register instead of a constant and to use
brw_send_indirect_message() to emit the indirect variant of send with
a dynamically calculated message descriptor.  This will be required to
support variable indexing of image arrays for
ARB_shader_image_load_store.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-04 15:05:20 +03:00
Chia-I Wu 4348046a2f ilo: use ilo_image exclusively in core
Initialize ilo_view_surface and ilo_zs_surface from ilo_image instead of
ilo_texture.
2015-05-02 22:28:31 +08:00
Chia-I Wu 9b705ec32d ilo: add ilo_image_can_enable_aux()
It replaces ilo_texture_can_enable_hiz().
2015-05-02 22:14:07 +08:00
Chia-I Wu 430594c34f ilo: make ilo_image more self-contained
Add depth0, sample_count, and scanout to ilo_image.
2015-05-02 22:14:06 +08:00
Chia-I Wu f6ca4084c7 ilo: add ilo_image_init_for_imported()
It replaces ilo_image_update_for_imported_bo() and enables more error
checkings for imported textures.
2015-05-02 22:14:06 +08:00
Chia-I Wu 938c9b8cea ilo: prepare for image init for imported bo
Refactoring in prepraration for ilo_image_init_for_imported().
2015-05-02 22:14:06 +08:00
Chia-I Wu 3f9415077b ilo: constify ilo_image_params
Make ilo_image_params const in functions that do not modify it.
2015-05-02 22:14:06 +08:00
Chia-I Wu c209aa7a8f ilo: improve readability of ilo_image
Improve docs, rename struct fields, and reorder walk types.  No real changes.
2015-05-02 22:14:06 +08:00
Chia-I Wu 9b72bf5bd2 ilo: move command builder to core 2015-05-02 22:14:06 +08:00
Chia-I Wu 9e24c49e64 ilo: move ilo_state_3d* to core
ilo state structs (struct ilo_xxx_state) are moved as well.
2015-05-02 22:14:06 +08:00
Chia-I Wu 8ab18262c5 ilo: add ilo_buffer.h to core
Rename the original ilo_buffer to ilo_buffer_resource to avoid name conflict.
2015-05-02 22:14:06 +08:00
Chia-I Wu 3afbeb115a ilo: move BOs from ilo_texture to ilo_image
We want to work with ilo_image instead of ilo_texture in core.
2015-05-02 22:14:06 +08:00
Chia-I Wu ac47563cb4 ilo: move ilo_layout.[ch] to core as ilo_image.[ch]
Move files and s/layout/image/.
2015-05-02 22:14:06 +08:00
Chia-I Wu 8252765532 ilo: add ilo_format.[ch] to core
The original ilo_format.[ch] are removed.
2015-05-02 22:14:06 +08:00
Chia-I Wu 9b7080c8b3 ilo: add ilo_fence.h to core
Implement pipe_fence_handle on top of ilo_fence.
2015-05-02 22:14:06 +08:00
Chia-I Wu 2182beb431 ilo: add ilo_dev_init() to core
Move init_dev() from ilo_screen.c to core.
2015-05-02 22:14:06 +08:00
Chia-I Wu 7562f9e907 ilo: rename ilo_dev_info to ilo_dev
With intel_winsys being embedded in it, drop the "_info" suffix.
2015-05-02 22:14:06 +08:00
Chia-I Wu 19351af53d ilo: move intel_winsys to ilo_dev_info
We want to use ilo_dev_info instead of ilo_screen in core.
2015-05-02 22:14:06 +08:00
Chia-I Wu b3197fe5f4 ilo: add ilo_dev.h to core
Move what are remaining in ilo_common.h (that is, ilo_dev_*) to ilo_dev.h.
2015-05-02 22:14:06 +08:00
Chia-I Wu 7bb4fa72c0 ilo: add ilo_debug.[ch] to core
They consist of the debug helpers that used to live in ilo_common.h and
ilo_screen.c.
2015-05-02 22:14:06 +08:00
Chia-I Wu a5797873d0 ilo: add ilo_core.h to core
ilo_core.h includes the common gallium headers that were included in
ilo_common.h.
2015-05-02 22:14:05 +08:00
Chia-I Wu bbe91576b7 ilo: move intel_winsys.h to core
Add a new subdirectory and start moving files that do not depend on
ilo_screen/ilo_context to it.
2015-05-02 22:14:05 +08:00
Jordan Justen eeee212e53 i965: Upload atomic buffer state for compute shaders
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen 5328ffbe79 i965/cs: Emit MEDIA_STATE_FLUSH after WALKER
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen 8d87070af2 i965/cs: Implement brw_emit_gpgpu_walker
Tested on Ivybridge, Haswell and Broadwell.

v2:
 * Use SET_FIELD. (Ken)
 * Use simd_size / 16 to support SIMD8/16/32. Ken suggested
   that we might be able to do it arithmetically rather than just
   supporting SIMD8 and SIMD16 with a conditional.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen 0e0e23ef53 i965/state: Emit pipeline select when changing pipelines
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Paul Berry 013031b229 i965: Implement DispatchCompute() back-end
brw_emit_gpgpu_walker will be implemented in a subsequent patch.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Paul Berry 8f1423b2c4 main/cs: Implement front end code for glDispatchCompute().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Paul Berry 4d0f3d2319 mesa/cs: Add DispatchCompute() to driver function table.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:50:00 -07:00
Jordan Justen 5f70b49d4b i965/cs: Emit state base address
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen b750e14fbb i965/fs: Add CS shader time support
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen 6b1b484b60 i965/cs: Upload brw_cs_state
v3:
 * Add defines. Misc cleanup suggestions. (Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen 6ec6c1581c i965/cs: Support CS program precompile
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen 17233f9bbc i965: Add brw_setup_tex_for_precompile. Use in VS, GS & FS.
Suggested-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen 932045061b i965/cs: Emit compute shader code and upload programs
v2:
 * Don't bother checking for 'gen > 5' (krh)
 * Populate sampler data in key (krh)

v3:
 * Drop no8 support, and simplify code in several places (Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen cb18f3f021 i965/cs: Set invocation counts based on max_cs_threads
For ES, we set the max counts based on SIMD8, which is currently
accurate.

For desktop GL, we set the max counts based on SIMD16, which can fail
in some cases where a SIMD16 program is not currently supported.
Therefore, this value is not currently accurate, but will work fine in
many cases, and lets us run more test cases. Eventually we want to
always be able to generate a SIMD16 program.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen 73cb2d3a73 i965/cs: Add max_cs_threads
Add values for gen7 & gen8. These are the number threads in a
subslice.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:49:59 -07:00
Jordan Justen ea888c771c i965: Remove comment about chv device numbers being preliminary
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:29 -07:00
Jordan Justen c380973a95 i965/fs: Support compute programs in fs_visitor
v2:
 * Clean out some unneeded code copied from run_fs (krh)
 * Always use NIR
 * Split shader time out into a separate commit

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Jordan Justen ae6308a41e i965/cache: Add support for CS in program state cache
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00
Paul Berry 92a57e7207 i965/cs: Add brw_cs_prog_data, brw_cs_prog_key and brw_context::cs.
jordan.l.justen@intel.com:
 * Added brw_cs_prog_key structure
 * Added brw_cs_prog_data::dispatch_grf_start_reg_16
 * Added brw_cs_prog_data::local_size
 * Added brw_cs_prog_data::simd_size

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-02 00:34:28 -07:00