Commit Graph

23876 Commits

Author SHA1 Message Date
Rob Clark 01b5f13363 freedreno/ir3: fix constlen in case of load_uniform_indirect
We can't rely on what we get from the assembler if we have indirect
addressing of constant file, since the assembler doesn't know the array
index.  This got lost in the transition to NIR.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-06-30 12:13:44 -04:00
Ilia Mirkin d5f1253b0c nv50/ir: fix emission of address reg in 3rd source
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91056
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-30 02:51:14 -04:00
Ilia Mirkin 089e7c3788 nv30: align transfer stride to 64, required by blit, sifm transfer impls
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin dacf9efd63 nv30: allow vertex state creation with 0 elements
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin bad107f2ec nv30: reset fragprog bufctx at bind time
A clear will do a partial validate, which will in turn reference all the
buffers in the bufctx again. However the fragprog last validated might
have already been deleted. So reset the bufctx when updating state.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin b875198f1f nv30: modernize fp upload logic
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Ilia Mirkin 54afb10f0e nv30: provide a minimum map buffer alignment
Otherwise we return 0, which is out of spec. Return 64 like all the
other nouveau drivers.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 23:03:27 -04:00
Grigori Goronzy d15b32ebde clover: implement CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE
Work-group size should always be aligned to subgroup size; this is a
basic requirement, otherwise some work-items will be no-operation.

It might make sense to refine the value according to a kernel's
resource usage, but that's a possible optimization for the future.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-06-29 13:24:37 +02:00
Grigori Goronzy 249a9df7fc gallium: add PIPE_COMPUTE_CAP_SUBGROUP_SIZE
We need this to implement OpenCL's
CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-06-29 13:24:22 +02:00
Ilia Mirkin 61912036d1 nv30: avoid leaking blit fp/vp
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 00:46:53 -04:00
Ilia Mirkin b5622313ea nv40: enable base vertex
Still appears to have issues with negative indices less than -1M, but
that's a corner case of a corner case.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-29 00:46:45 -04:00
Samuel Pitoiset b4b4406e1e gallium/hud: prevent NULL pointer dereference with pipe_query functions
The HUD doesn't check if query_create() fails and it calls other
pipe_query functions with NULL pointer instead of a valid query object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-28 09:49:03 +02:00
Mario Kleiner a98600b0eb nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.
The dup'ed fd owned by the nouveau_screen for a device node
must also be used as key for the winsys hash table, instead
of using the original fd passed in for a screen, to make
multi-x-screen ZaphodHeads configurations work on nouveau.

The original fd's lifetime differs from that of the nouveau_screen stored
in the hash. The hash key is the fd, and in order to compare hash entries
we fstat them, so the fd must be around for as long as the screen is.

This is an extension of the fix in commit a59f2bb1 (nouveau: dup fd
before passing it to device).

Cc: "10.3 10.4 10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-28 01:11:38 -04:00
Dave Airlie 556dd4af76 radeonsi: add support for geometry shader invocations.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-27 00:24:30 +01:00
Dave Airlie 7e5064360c radeonsi: add support for viewport array (v3)
This isn't pretty and I'd suggest it the pm4 interface builder
could be tweaked to do this more efficently, but I'd need
guidance on how that would look.

This seems to pass the few piglit tests I threw at it.

v2: handle passing layer/viewport index to fragment shader.
fix crash in blit changes,
add support to io_get_unique_index for layer/viewport index
update docs.
v3: avoid looking up viewport index and layer in es (Marek).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-27 00:24:07 +01:00
Ilia Mirkin ad62ec8316 nv50/ir: propagate modifier to right arg when const-folding mad
An immediate has to be the second arg of an ADD operation. However we
were mistakenly propagating the modifier of the non-folded value to the
folded immediate argument.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91117
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-26 18:42:29 -04:00
Matt Turner 404a90b827 mesa: Enable subdir-objects globally.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-26 12:55:25 +01:00
Chia-I Wu 7de85694fa ilo: define ILO_IMAGE_MAX_LEVEL_COUNT
Define ILO_IMAGE_MAX_LEVEL_COUNT for ilo_image and remove unnecessary header
includes.
2015-06-26 13:45:28 +08:00
Chia-I Wu cbdc26aa3f ilo: replace pipe_format by gen_surface_format
Replace pipe_format by gen_surface_format in ilo_image.  Change how depth
format is specified in ilo_state_zs.
2015-06-26 13:45:28 +08:00
Chia-I Wu 2ee95f6d64 ilo: always use the specified image format
Move silent promotion of PIPE_FORMAT_ETC1_RGB8 or combined depth/stencil out
of core.
2015-06-26 13:45:28 +08:00
Chia-I Wu dc2e92b2d3 ilo: replace pipe_texture_target by gen_surface_type
Replace pipe_texture_target by gen_surface_type in ilo_image.  Change how
GEN6_SURFTYPE_CUBE is specified in ilo_state_surface and ilo_state_zs.
2015-06-26 13:45:28 +08:00
Chia-I Wu 934e4a469f ilo: initialize ilo_image from ilo_image_info
Convert pipe_resource to ilo_image_info for image initialization.
2015-06-26 13:45:28 +08:00
Chia-I Wu f825fe8e13 ilo: remove ilo_image_disable_aux()
Fail resource creation when aux bo allocation fails.
2015-06-26 13:45:28 +08:00
Chia-I Wu 07acf9cb16 ilo: improve SURFTYPE_BUFFER validations
Reorganize the validations to make them more systematic.
2015-06-26 13:45:27 +08:00
Chia-I Wu 9871646c13 ilo: remove ilo_buffer
Since the addition of ilo_vma, it was used only to pad a bo for sampling
engine surfaces.  Replace it entirely with these functions

  ilo_state_surface_buffer_size()
  ilo_state_vertex_buffer_size()
  ilo_state_index_buffer_size()
  ilo_state_sol_buffer_size()
2015-06-26 13:45:27 +08:00
Chia-I Wu 36d107e92c ilo: introduce ilo_vma
This cleans up the code a bit and makes ilo_state_vector_resource_renamed()
simpler and more robust.  It also allows a single bo to back mulitple VMAs.
2015-06-26 13:45:27 +08:00
Marek Olšák 101a73846b radeonsi: don't fail in si_shader_io_get_unique_index
Trivial. Picked from my tessellation branch.
2015-06-25 15:05:56 +02:00
Marek Olšák 77a78c65f8 softpipe,llvmpipe: fix PIPE_SHADER_CAP_MAX_INPUTS value
PIPE_MAX_SHADER_INPUTS was recently bumped to 80 because of tessellation.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91099
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91101

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-25 09:00:23 +02:00
Brian Paul e31bce4041 svga: silence warnings about unexpected shader type
Trivial.
2015-06-24 10:42:19 -06:00
Emil Velikov a552c897ca st/wgl: add stw_nopfuncs.h to the sources lists
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-24 13:43:44 +01:00
Grigori Goronzy 390f94e358 winsys/radeon: reduce BO cache timeout
1000 ms is an extreme value for typical interactive loads. A large
cache has some disadvantages. Search for reusable BOs can take a long
time and memory might get exhausted.

Let's be rather conservative and use half of the old value,
500ms. This is beneficial to some loads on my test system and there
are no regressions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-24 14:33:40 +02:00
Grigori Goronzy 29aaab2b5f winsys/radeon: align BO size to page size
This is the basic granularity for BO allocations. The alignment also
helps with BO reuse by the cached bufmgr.

This results in a huge 45% speedup in Metro 2033 Redux on my test
system. The game relies on buffer orphaning with very small buffers
(hundreds of bytes in size) and that did not work efficiently
before. This change may also affect other applications and games.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-24 14:33:14 +02:00
Michel Dänzer 7796e8889a winsys/radeon: Unmap GPU VM address range when destroying BO
But only when doing so is safe according to the
RADEON_INFO_VA_UNMAP_WORKING kernel query.

This avoids kernel GPU VM address range conflicts when the BO has other
references than the GEM handle being closed, e.g. when the BO is shared.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90537
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90873

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-24 15:11:55 +09:00
Eric Anholt 3fd4c80b32 vc4: Also dump VC4_PACKET_LOAD_TILE_BUFFER_GENERAL. 2015-06-23 18:40:50 -07:00
Eric Anholt 5458ac01ae vc4: Add dumping for VC4_PACKET_LOAD/STORE_FULL_RES_TILE_BUFFER. 2015-06-23 18:40:50 -07:00
Eric Anholt 997f677841 vc4: Don't try to CSE color reads.
It returns a new value for each sample in the TLB.  We've already avoided
trying to get the same index's color multiple times at the vc4_program.c
level, so we're not losing anything by doing this.
2015-06-23 18:40:50 -07:00
Eric Anholt 0f69d59b1c vc4: Make a helper for TLB color writes, too.
We've done so for all the other QIR instruction generation in this file.
2015-06-23 18:40:50 -07:00
Eric Anholt af83eb2581 vc4: Pull the blending operation out to a separate function.
It's fairly separate from the rest of the TLB operations at frag end time,
and we'll need to run it multiple times to support MSAA blending.
2015-06-23 18:40:50 -07:00
Eric Anholt 76851f49a5 vc4: Clarify size calculation for Z/S writes.
It's the same value for loads and stores, because they're basically the
same packet.
2015-06-23 18:40:50 -07:00
Eric Anholt 8fbcabc41a vc4: Add an "args" temporary for RCL setup. 2015-06-23 18:40:50 -07:00
Eric Anholt 19056d0429 vc4: Reuse (and extend) the packet.h sizes for dumping. 2015-06-23 18:40:50 -07:00
Eric Anholt fc0da629b5 vc4: Fix printfs for blit fallbacks. 2015-06-23 18:40:50 -07:00
Eric Anholt e70f5617f1 tgsi_to_nir: Fix translation of TXF on MSAA targets.
Noticed while trying to add GL_ARB_texture_multisample support to vc4.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-23 18:40:50 -07:00
Ilia Mirkin 78d58e6425 nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data
Without first running the bo through pushbuf_refn, the nouveau drm
library will have uninitialized structures regarding this bo, and will
insert incorrect data.

This fixes supertuxkart 0.9 crash on start (where it ends up doing a lot
of indirect draws).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-23 12:08:34 -04:00
Ilia Mirkin 9fcbf515b4 nvc0: always put all tfb bufs into bufctx
Since we clear the TFB bufctx binding point above, we need to put all of
the active tfb's back in, even if they haven't changed since last time.
Otherwise the tfb may get moved into sysmem and the underlying mapping
will generate write errors.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-23 12:08:34 -04:00
Emil Velikov 5c37ababae targets/libgl-xlib: fix the build against shared_glapi
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2015-06-23 17:04:29 +01:00
Jose Fonseca be5f71d4a5 draw,tgsi: Assume TGSI_PROPERTY_GS_INVOCATIONS default of 1.
If the shader doesn't specify number of invocations, assume one.

This fixes geometry shaders on state trackers other than Mesa (and
probably graw tests too.)

Trivial.
2015-06-23 12:19:52 +01:00
Dave Airlie 1a71fbe28c draw/gallivm: add invocation ID support for llvmpipe.
This extends the draw code to add support for invocations.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-23 15:54:07 +10:00
Dave Airlie 40d225803e draw/tgsi: implement geom shader invocation support.
This is just for softpipe, llvmpipe won't work without
some changes.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-23 15:53:49 +10:00
Dave Airlie 24e77cb09f tgsi: handle indirect sampler arrays. (v2)
This is required for ARB_gpu_shader5 support in softpipe.

v2: add support to txd/txf/txq paths.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-23 15:52:48 +10:00