ilo: replace pipe_format by gen_surface_format

Replace pipe_format by gen_surface_format in ilo_image.  Change how depth
format is specified in ilo_state_zs.
This commit is contained in:
Chia-I Wu 2015-06-25 22:27:04 +08:00
parent 2ee95f6d64
commit cbdc26aa3f
13 changed files with 174 additions and 142 deletions

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@ -30,11 +30,9 @@
#include "pipe/p_compiler.h"
#include "pipe/p_defines.h"
#include "pipe/p_format.h"
#include "util/u_debug.h"
#include "util/list.h"
#include "util/u_format.h"
#include "util/u_inlines.h"
#include "util/u_math.h"
#include "util/u_memory.h"

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@ -45,8 +45,6 @@ struct ilo_image_params {
const struct ilo_image_info *info;
unsigned valid_tilings;
bool compressed;
unsigned h0, h1;
unsigned max_x, max_y;
};
@ -261,7 +259,7 @@ img_init_lods(struct ilo_image *img,
/* every LOD begins at tile boundaries */
if (info->level_count > 1) {
assert(img->format == PIPE_FORMAT_S8_UINT);
assert(img->format == GEN6_FORMAT_R8_UINT);
cur_x = align(cur_x, 64);
cur_y = align(cur_y, 64);
}
@ -334,7 +332,7 @@ img_init_alignments(struct ilo_image *img,
*
* align_i align_j
* compressed formats block width block height
* PIPE_FORMAT_S8_UINT 4 2
* GEN6_FORMAT_R8_UINT 4 2
* other depth/stencil formats 4 4
* 4x multisampled 4 4
* bpp 96 4 2
@ -382,27 +380,27 @@ img_init_alignments(struct ilo_image *img,
*
* align_i align_j
* compressed formats block width block height
* PIPE_FORMAT_Z16_UNORM 8 4
* PIPE_FORMAT_S8_UINT 8 8
* GEN6_FORMAT_R16_UNORM 8 4
* GEN6_FORMAT_R8_UINT 8 8
* other depth/stencil formats 4 4
* 2x or 4x multisampled 4 or 8 4
* tiled Y 4 or 8 4 (if rt)
* PIPE_FORMAT_R32G32B32_FLOAT 4 or 8 2
* GEN6_FORMAT_R32G32B32_FLOAT 4 or 8 2
* others 4 or 8 2 or 4
*/
if (params->compressed) {
if (info->compressed) {
/* this happens to be the case */
img->align_i = img->block_width;
img->align_j = img->block_height;
} else if (info->bind_zs) {
if (ilo_dev_gen(params->dev) >= ILO_GEN(7)) {
switch (img->format) {
case PIPE_FORMAT_Z16_UNORM:
case GEN6_FORMAT_R16_UNORM:
img->align_i = 8;
img->align_j = 4;
break;
case PIPE_FORMAT_S8_UINT:
case GEN6_FORMAT_R8_UINT:
img->align_i = 8;
img->align_j = 8;
break;
@ -413,7 +411,7 @@ img_init_alignments(struct ilo_image *img,
}
} else {
switch (img->format) {
case PIPE_FORMAT_S8_UINT:
case GEN6_FORMAT_R8_UINT:
img->align_i = 4;
img->align_j = 2;
break;
@ -433,7 +431,7 @@ img_init_alignments(struct ilo_image *img,
if (ilo_dev_gen(params->dev) >= ILO_GEN(7) &&
ilo_dev_gen(params->dev) <= ILO_GEN(7.5) && valign_4)
assert(img->format != PIPE_FORMAT_R32G32B32_FLOAT);
assert(img->format != GEN6_FORMAT_R32G32B32_FLOAT);
img->align_i = 4;
img->align_j = (valign_4) ? 4 : 2;
@ -558,7 +556,7 @@ img_init_walk_gen6(struct ilo_image *img,
*/
img->walk =
(params->info->type == GEN6_SURFTYPE_3D) ? ILO_IMAGE_WALK_3D :
(img->format == PIPE_FORMAT_S8_UINT) ? ILO_IMAGE_WALK_LOD :
(img->format == GEN6_FORMAT_R8_UINT) ? ILO_IMAGE_WALK_LOD :
ILO_IMAGE_WALK_LAYER;
/* GEN6 supports only interleaved samples */
@ -580,7 +578,6 @@ img_get_valid_tilings(const struct ilo_image *img,
const struct ilo_image_params *params)
{
const struct ilo_image_info *info = params->info;
const enum pipe_format format = img->format;
unsigned valid_tilings = params->valid_tilings;
/*
@ -614,8 +611,8 @@ img_get_valid_tilings(const struct ilo_image *img,
* "W-Major Tile Format is used for separate stencil."
*/
if (info->bind_zs) {
switch (format) {
case PIPE_FORMAT_S8_UINT:
switch (info->format) {
case GEN6_FORMAT_R8_UINT:
valid_tilings &= IMAGE_TILING_W;
break;
default:
@ -649,7 +646,7 @@ img_get_valid_tilings(const struct ilo_image *img,
*/
if (ilo_dev_gen(params->dev) >= ILO_GEN(7) &&
ilo_dev_gen(params->dev) <= ILO_GEN(7.5) &&
img->format == PIPE_FORMAT_R32G32B32_FLOAT)
img->format == GEN6_FORMAT_R32G32B32_FLOAT)
valid_tilings &= ~IMAGE_TILING_Y;
valid_tilings &= ~IMAGE_TILING_W;
@ -682,18 +679,13 @@ img_init_size_and_format(struct ilo_image *img,
* buffer has been removed Surface formats with interleaved depth and
* stencil are no longer supported"
*/
if (ilo_dev_gen(params->dev) >= ILO_GEN(7) && info->bind_zs) {
const struct util_format_description *desc =
util_format_description(info->format);
assert(info->format == PIPE_FORMAT_S8_UINT ||
!util_format_has_stencil(desc));
}
if (ilo_dev_gen(params->dev) >= ILO_GEN(7) && info->bind_zs)
assert(!info->interleaved_stencil);
img->format = info->format;
img->block_width = util_format_get_blockwidth(info->format);
img->block_height = util_format_get_blockheight(info->format);
img->block_size = util_format_get_blocksize(info->format);
img->block_width = info->block_width;
img->block_height = info->block_height;
img->block_size = info->block_size;
img->width0 = info->width;
img->height0 = info->height;
@ -703,7 +695,6 @@ img_init_size_and_format(struct ilo_image *img,
img->sample_count = info->sample_count;
params->valid_tilings = img_get_valid_tilings(img, params);
params->compressed = util_format_is_compressed(img->format);
}
static bool
@ -730,7 +721,7 @@ img_want_mcs(const struct ilo_image *img,
* "This field must be set to 0 for all SINT MSRTs when all RT channels
* are not written"
*/
if (info->sample_count > 1 && !util_format_is_pure_sint(info->format)) {
if (info->sample_count > 1 && !info->is_integer) {
want_mcs = true;
} else if (info->sample_count == 1 && !info->aux_disable) {
/*
@ -769,8 +760,6 @@ img_want_hiz(const struct ilo_image *img,
const struct ilo_image_params *params)
{
const struct ilo_image_info *info = params->info;
const struct util_format_description *desc =
util_format_description(info->format);
if (ilo_debug & ILO_DEBUG_NOHIZ)
return false;
@ -785,10 +774,17 @@ img_want_hiz(const struct ilo_image *img,
if (!info->bind_zs)
return false;
if (!util_format_has_depth(desc) || util_format_has_stencil(desc))
if (info->interleaved_stencil)
return false;
return true;
switch (info->format) {
case GEN6_FORMAT_R32_FLOAT:
case GEN6_FORMAT_R24_UNORM_X8_TYPELESS:
case GEN6_FORMAT_R16_UNORM:
return true;
default:
return false;
}
}
static void
@ -836,7 +832,7 @@ img_align(struct ilo_image *img, struct ilo_image_params *params)
if (info->type == GEN6_SURFTYPE_CUBE)
pad_h += 2;
if (params->compressed)
if (info->compressed)
align_h = MAX2(align_h, img->align_j * 2);
}
@ -1325,9 +1321,9 @@ img_init_for_transfer(struct ilo_image *img,
img->sample_count = 1;
img->format = info->format;
img->block_width = util_format_get_blockwidth(info->format);
img->block_height = util_format_get_blockheight(info->format);
img->block_size = util_format_get_blocksize(info->format);
img->block_width = info->block_width;
img->block_height = info->block_height;
img->block_size = info->block_size;
img->walk = ILO_IMAGE_WALK_LOD;

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@ -70,7 +70,14 @@ enum ilo_image_walk_type {
struct ilo_image_info {
enum gen_surface_type type;
enum pipe_format format;
enum gen_surface_format format;
bool interleaved_stencil;
bool is_integer;
/* width, height and size of pixel blocks */
bool compressed;
unsigned block_width;
unsigned block_height;
unsigned block_size;
/* image size */
uint16_t width;
@ -119,7 +126,8 @@ struct ilo_image_lod {
struct ilo_image {
enum gen_surface_type type;
enum pipe_format format;
enum gen_surface_format format;
bool interleaved_stencil;
/* size, format, etc for programming hardware states */
unsigned width0;

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@ -55,47 +55,9 @@ zs_set_gen6_null_3DSTATE_DEPTH_BUFFER(struct ilo_state_zs *zs,
zs->depth[3] = 0;
zs->depth[4] = 0;
zs->depth_format = format;
return true;
}
static enum gen_depth_format
get_gen6_depth_format(const struct ilo_dev *dev, const struct ilo_image *img)
{
ILO_DEV_ASSERT(dev, 6, 8);
if (ilo_dev_gen(dev) >= ILO_GEN(7)) {
switch (img->format) {
case PIPE_FORMAT_Z32_FLOAT:
return GEN6_ZFORMAT_D32_FLOAT;
case PIPE_FORMAT_Z24X8_UNORM:
return GEN6_ZFORMAT_D24_UNORM_X8_UINT;
case PIPE_FORMAT_Z16_UNORM:
return GEN6_ZFORMAT_D16_UNORM;
default:
assert(!"unknown depth format");
return GEN6_ZFORMAT_D32_FLOAT;
}
} else {
switch (img->format) {
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
return GEN6_ZFORMAT_D32_FLOAT_S8X24_UINT;
case PIPE_FORMAT_Z32_FLOAT:
return GEN6_ZFORMAT_D32_FLOAT;
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
return GEN6_ZFORMAT_D24_UNORM_S8_UINT;
case PIPE_FORMAT_Z24X8_UNORM:
return GEN6_ZFORMAT_D24_UNORM_X8_UINT;
case PIPE_FORMAT_Z16_UNORM:
return GEN6_ZFORMAT_D16_UNORM;
default:
assert(!"unknown depth format");
return GEN6_ZFORMAT_D32_FLOAT;
}
}
}
static bool
zs_validate_gen6(const struct ilo_dev *dev,
const struct ilo_state_zs_info *info)
@ -141,6 +103,35 @@ zs_validate_gen6(const struct ilo_dev *dev,
img->type == GEN6_SURFTYPE_CUBE);
}
if (ilo_dev_gen(dev) >= ILO_GEN(7)) {
switch (info->format) {
case GEN6_ZFORMAT_D32_FLOAT:
case GEN6_ZFORMAT_D24_UNORM_X8_UINT:
case GEN6_ZFORMAT_D16_UNORM:
break;
default:
assert(!"unknown depth format");
break;
}
} else {
/*
* From the Ironlake PRM, volume 2 part 1, page 330:
*
* "If this field (Separate Stencil Buffer Enable) is disabled, the
* Surface Format of the depth buffer cannot be D24_UNORM_X8_UINT."
*
* From the Sandy Bridge PRM, volume 2 part 1, page 321:
*
* "[DevSNB]: This field (Separate Stencil Buffer Enable) must be
* set to the same value (enabled or disabled) as Hierarchical
* Depth Buffer Enable."
*/
if (info->hiz_vma)
assert(info->format != GEN6_ZFORMAT_D24_UNORM_S8_UINT);
else
assert(info->format != GEN6_ZFORMAT_D24_UNORM_X8_UINT);
}
assert(info->level < img->level_count);
assert(img->bo_stride);
@ -395,7 +386,6 @@ zs_set_gen6_3DSTATE_DEPTH_BUFFER(struct ilo_state_zs *zs,
const struct ilo_state_zs_info *info)
{
uint16_t width, height, depth, array_base, view_extent;
enum gen_depth_format format;
uint32_t dw1, dw2, dw3, dw4;
ILO_DEV_ASSERT(dev, 6, 6);
@ -406,28 +396,10 @@ zs_set_gen6_3DSTATE_DEPTH_BUFFER(struct ilo_state_zs *zs,
&view_extent))
return false;
format = (info->z_img) ? get_gen6_depth_format(dev, info->z_img) :
GEN6_ZFORMAT_D32_FLOAT;
/*
* From the Ironlake PRM, volume 2 part 1, page 330:
*
* "If this field (Separate Stencil Buffer Enable) is disabled, the
* Surface Format of the depth buffer cannot be D24_UNORM_X8_UINT."
*
* From the Sandy Bridge PRM, volume 2 part 1, page 321:
*
* "[DevSNB]: This field (Separate Stencil Buffer Enable) must be set
* to the same value (enabled or disabled) as Hierarchical Depth
* Buffer Enable."
*/
if (!info->hiz_vma && format == GEN6_ZFORMAT_D24_UNORM_X8_UINT)
format = GEN6_ZFORMAT_D24_UNORM_S8_UINT;
/* info->z_readonly and info->s_readonly are ignored on Gen6 */
dw1 = info->type << GEN6_DEPTH_DW1_TYPE__SHIFT |
GEN6_TILING_Y << GEN6_DEPTH_DW1_TILING__SHIFT |
format << GEN6_DEPTH_DW1_FORMAT__SHIFT;
info->format << GEN6_DEPTH_DW1_FORMAT__SHIFT;
if (info->z_img)
dw1 |= (info->z_img->bo_stride - 1) << GEN6_DEPTH_DW1_PITCH__SHIFT;
@ -453,8 +425,6 @@ zs_set_gen6_3DSTATE_DEPTH_BUFFER(struct ilo_state_zs *zs,
zs->depth[3] = dw4;
zs->depth[4] = 0;
zs->depth_format = format;
return true;
}
@ -463,7 +433,6 @@ zs_set_gen7_3DSTATE_DEPTH_BUFFER(struct ilo_state_zs *zs,
const struct ilo_dev *dev,
const struct ilo_state_zs_info *info)
{
enum gen_depth_format format;
uint16_t width, height, depth;
uint16_t array_base, view_extent;
uint32_t dw1, dw2, dw3, dw4, dw6;
@ -476,11 +445,8 @@ zs_set_gen7_3DSTATE_DEPTH_BUFFER(struct ilo_state_zs *zs,
&view_extent))
return false;
format = (info->z_img) ? get_gen6_depth_format(dev, info->z_img) :
GEN6_ZFORMAT_D32_FLOAT;
dw1 = info->type << GEN7_DEPTH_DW1_TYPE__SHIFT |
format << GEN7_DEPTH_DW1_FORMAT__SHIFT;
info->format << GEN7_DEPTH_DW1_FORMAT__SHIFT;
if (info->z_img) {
if (!info->z_readonly)
@ -516,8 +482,6 @@ zs_set_gen7_3DSTATE_DEPTH_BUFFER(struct ilo_state_zs *zs,
zs->depth[3] = dw4;
zs->depth[4] = dw6;
zs->depth_format = format;
return true;
}
@ -685,6 +649,7 @@ ilo_state_zs_init_for_null(struct ilo_state_zs *zs,
memset(&info, 0, sizeof(info));
info.type = GEN6_SURFTYPE_NULL;
info.format = GEN6_ZFORMAT_D32_FLOAT;
return ilo_state_zs_init(zs, dev, &info);
}

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@ -49,6 +49,7 @@ struct ilo_state_zs_info {
const struct ilo_vma *hiz_vma;
enum gen_surface_type type;
enum gen_depth_format format;
/* ignored prior to Gen7 */
bool z_readonly;
@ -64,9 +65,6 @@ struct ilo_state_zs {
const struct ilo_vma *s_vma;
const struct ilo_vma *hiz_vma;
/* TODO move this to ilo_image */
enum gen_depth_format depth_format;
bool z_readonly;
bool s_readonly;
};
@ -84,11 +82,4 @@ bool
ilo_state_zs_disable_hiz(struct ilo_state_zs *zs,
const struct ilo_dev *dev);
static inline enum gen_depth_format
ilo_state_zs_get_depth_format(const struct ilo_state_zs *zs,
const struct ilo_dev *dev)
{
return zs->depth_format;
}
#endif /* ILO_STATE_ZS_H */

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@ -300,7 +300,7 @@ tex_copy_region(struct ilo_blitter *blitter,
const struct pipe_box *src_box)
{
const struct util_format_description *desc =
util_format_description(dst_tex->image.format);
util_format_description(dst_tex->image_format);
const unsigned max_extent = 32767; /* INT16_MAX */
const uint8_t rop = 0xcc; /* SRCCOPY */
struct ilo_builder *builder = &blitter->ilo->cp->builder;

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@ -318,7 +318,7 @@ hiz_can_clear_zs(const struct ilo_blitter *blitter,
* The truth is when HiZ is enabled, separate stencil is also enabled on
* all GENs. The depth buffer format cannot be combined depth/stencil.
*/
switch (tex->image.format) {
switch (tex->image_format) {
case PIPE_FORMAT_Z16_UNORM:
if (ilo_dev_gen(blitter->ilo->dev) == ILO_GEN(6) &&
tex->base.width0 % 16)
@ -355,7 +355,7 @@ ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
if (ilo_dev_gen(blitter->ilo->dev) >= ILO_GEN(8))
clear_value = fui(depth);
else
clear_value = util_pack_z(tex->image.format, depth);
clear_value = util_pack_z(tex->image_format, depth);
ilo_blit_resolve_surface(blitter->ilo, zs,
ILO_TEXTURE_RENDER_WRITE | ILO_TEXTURE_CLEAR);

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@ -28,6 +28,9 @@
#ifndef ILO_COMMON_H
#define ILO_COMMON_H
#include "pipe/p_format.h"
#include "util/u_format.h"
#include "core/ilo_core.h"
#include "core/ilo_debug.h"
#include "core/ilo_dev.h"

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@ -165,4 +165,39 @@ ilo_format_translate_vertex(const struct ilo_dev *dev,
return ilo_format_translate(dev, format, PIPE_BIND_VERTEX_BUFFER);
}
static inline enum gen_depth_format
ilo_format_translate_depth(const struct ilo_dev *dev,
enum pipe_format format)
{
if (ilo_dev_gen(dev) >= ILO_GEN(7)) {
switch (format) {
case PIPE_FORMAT_Z32_FLOAT:
return GEN6_ZFORMAT_D32_FLOAT;
case PIPE_FORMAT_Z24X8_UNORM:
return GEN6_ZFORMAT_D24_UNORM_X8_UINT;
case PIPE_FORMAT_Z16_UNORM:
return GEN6_ZFORMAT_D16_UNORM;
default:
assert(!"unknown depth format");
return GEN6_ZFORMAT_D32_FLOAT;
}
} else {
switch (format) {
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
return GEN6_ZFORMAT_D32_FLOAT_S8X24_UINT;
case PIPE_FORMAT_Z32_FLOAT:
return GEN6_ZFORMAT_D32_FLOAT;
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
return GEN6_ZFORMAT_D24_UNORM_S8_UINT;
case PIPE_FORMAT_Z24X8_UNORM:
return GEN6_ZFORMAT_D24_UNORM_X8_UINT;
case PIPE_FORMAT_Z16_UNORM:
return GEN6_ZFORMAT_D16_UNORM;
default:
assert(!"unknown depth format");
return GEN6_ZFORMAT_D32_FLOAT;
}
}
}
#endif /* ILO_FORMAT_H */

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@ -30,6 +30,7 @@
#include "core/ilo_state_surface.h"
#include "ilo_screen.h"
#include "ilo_format.h"
#include "ilo_resource.h"
/*
@ -148,6 +149,26 @@ resource_get_image_format(const struct pipe_resource *templ,
return format;
}
static inline enum gen_surface_format
pipe_to_surface_format(const struct ilo_dev *dev, enum pipe_format format)
{
switch (format) {
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
return GEN6_FORMAT_R32_FLOAT_X8X24_TYPELESS;
case PIPE_FORMAT_Z32_FLOAT:
return GEN6_FORMAT_R32_FLOAT;
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
case PIPE_FORMAT_Z24X8_UNORM:
return GEN6_FORMAT_R24_UNORM_X8_TYPELESS;
case PIPE_FORMAT_Z16_UNORM:
return GEN6_FORMAT_R16_UNORM;
case PIPE_FORMAT_S8_UINT:
return GEN6_FORMAT_R8_UINT;
default:
return ilo_format_translate_color(dev, format);
}
}
static void
resource_get_image_info(const struct pipe_resource *templ,
const struct ilo_dev *dev,
@ -157,7 +178,14 @@ resource_get_image_info(const struct pipe_resource *templ,
memset(info, 0, sizeof(*info));
info->type = get_surface_type(templ->target);
info->format = image_format;
info->format = pipe_to_surface_format(dev, image_format);
info->interleaved_stencil = util_format_is_depth_and_stencil(image_format);
info->is_integer = util_format_is_pure_integer(image_format);
info->compressed = util_format_is_compressed(image_format);
info->block_width = util_format_get_blockwidth(image_format);
info->block_height = util_format_get_blockheight(image_format);
info->block_size = util_format_get_blocksize(image_format);
info->width = templ->width0;
info->height = templ->height0;
@ -303,7 +331,7 @@ tex_create_separate_stencil(struct ilo_texture *tex)
tex->separate_s8 = ilo_texture(s8);
assert(tex->separate_s8->image.format == PIPE_FORMAT_S8_UINT);
assert(tex->separate_s8->image_format == PIPE_FORMAT_S8_UINT);
return true;
}
@ -438,12 +466,11 @@ tex_init_image(struct ilo_texture *tex,
const struct pipe_resource *templ = &tex->base;
struct ilo_image *img = &tex->image;
struct intel_bo *imported_bo = NULL;;
enum pipe_format image_format;
struct ilo_image_info info;
image_format = resource_get_image_format(templ,
tex->image_format = resource_get_image_format(templ,
&is->dev, separate_stencil);
resource_get_image_info(templ, &is->dev, image_format, &info);
resource_get_image_info(templ, &is->dev, tex->image_format, &info);
if (handle) {
imported_bo = tex_import_handle(tex, handle, &info);
@ -469,10 +496,11 @@ tex_init_image(struct ilo_texture *tex,
*/
if (ilo_dev_gen(&is->dev) == ILO_GEN(6) &&
templ->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT &&
image_format == PIPE_FORMAT_Z32_FLOAT &&
tex->image_format == PIPE_FORMAT_Z32_FLOAT &&
img->aux.enables != (1 << templ->last_level)) {
image_format = templ->format;
info.format = image_format;
tex->image_format = templ->format;
info.format = pipe_to_surface_format(&is->dev, tex->image_format);
info.interleaved_stencil = true;
memset(img, 0, sizeof(*img));
if (!ilo_image_init(img, &is->dev, &info)) {
@ -496,7 +524,7 @@ tex_init_image(struct ilo_texture *tex,
if (templ->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) {
/* require on-the-fly tiling/untiling or format conversion */
if (img->tiling == GEN8_TILING_W || *separate_stencil ||
image_format != templ->format)
tex->image_format != templ->format)
return false;
}
@ -656,7 +684,8 @@ ilo_can_create_resource(struct pipe_screen *screen,
templ->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT &&
image_format == PIPE_FORMAT_Z32_FLOAT &&
img.aux.enables != (1 << templ->last_level)) {
info.format = templ->format;
info.format = pipe_to_surface_format(&is->dev, templ->format);
info.interleaved_stencil = true;
memset(&img, 0, sizeof(img));
ilo_image_init(&img, &ilo_screen(screen)->dev, &info);
}

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@ -92,6 +92,7 @@ struct ilo_texture {
bool imported;
enum pipe_format image_format;
struct ilo_image image;
struct ilo_vma vma;
struct ilo_vma aux_vma;

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@ -1699,10 +1699,11 @@ ilo_set_framebuffer_state(struct pipe_context *pipe,
if (state->zsbuf) {
const struct ilo_surface_cso *cso =
(const struct ilo_surface_cso *) state->zsbuf;
const struct ilo_texture *tex = ilo_texture(cso->base.texture);
fb->has_hiz = cso->u.zs.hiz_vma;
fb->depth_offset_format =
ilo_state_zs_get_depth_format(&cso->u.zs, dev);
ilo_format_translate_depth(dev, tex->image_format);
} else {
fb->has_hiz = false;
fb->depth_offset_format = GEN6_ZFORMAT_D32_FLOAT;
@ -2154,6 +2155,11 @@ ilo_create_surface(struct pipe_context *pipe,
info.type = (tex->image.type == GEN6_SURFTYPE_CUBE) ?
GEN6_SURFTYPE_2D : tex->image.type;
info.format = ilo_format_translate_depth(dev, tex->image_format);
if (ilo_dev_gen(dev) == ILO_GEN(6) && !info.hiz_vma &&
tex->image_format == PIPE_FORMAT_Z24X8_UNORM)
info.format = GEN6_ZFORMAT_D24_UNORM_S8_UINT;
ilo_state_zs_init(&surf->u.zs, dev, &info);
}

View File

@ -100,7 +100,7 @@ resource_get_transfer_method(struct pipe_resource *res,
m = ILO_TRANSFER_MAP_SW_ZS;
need_convert = true;
}
} else if (tex->image.format != tex->base.format) {
} else if (tex->image_format != tex->base.format) {
m = ILO_TRANSFER_MAP_SW_CONVERT;
need_convert = true;
}
@ -601,7 +601,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
s8_tile_offset = tex_tile_choose_offset_func(s8_tex, &s8_tiles_per_row);
if (tex->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
assert(tex->image.format == PIPE_FORMAT_Z24X8_UNORM);
assert(tex->image_format == PIPE_FORMAT_Z24X8_UNORM);
dst_cpp = 4;
dst_s8_pos = 3;
@ -609,7 +609,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
}
else {
assert(tex->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
assert(tex->image.format == PIPE_FORMAT_Z32_FLOAT);
assert(tex->image_format == PIPE_FORMAT_Z32_FLOAT);
dst_cpp = 8;
dst_s8_pos = 4;
@ -655,7 +655,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
tex_staging_sys_unmap_bo(s8_tex);
}
else {
assert(tex->image.format == PIPE_FORMAT_S8_UINT);
assert(tex->image_format == PIPE_FORMAT_S8_UINT);
for (slice = 0; slice < box->depth; slice++) {
unsigned mem_x, mem_y;
@ -728,7 +728,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
s8_tile_offset = tex_tile_choose_offset_func(s8_tex, &s8_tiles_per_row);
if (tex->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
assert(tex->image.format == PIPE_FORMAT_Z24X8_UNORM);
assert(tex->image_format == PIPE_FORMAT_Z24X8_UNORM);
src_cpp = 4;
src_s8_pos = 3;
@ -736,7 +736,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
}
else {
assert(tex->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
assert(tex->image.format == PIPE_FORMAT_Z32_FLOAT);
assert(tex->image_format == PIPE_FORMAT_Z32_FLOAT);
src_cpp = 8;
src_s8_pos = 4;
@ -782,7 +782,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
tex_staging_sys_unmap_bo(s8_tex);
}
else {
assert(tex->image.format == PIPE_FORMAT_S8_UINT);
assert(tex->image_format == PIPE_FORMAT_S8_UINT);
for (slice = 0; slice < box->depth; slice++) {
unsigned mem_x, mem_y;
@ -840,8 +840,8 @@ tex_staging_sys_convert_write(struct ilo_texture *tex,
else
dst_slice_stride = 0;
if (unlikely(tex->image.format == tex->base.format)) {
util_copy_box(dst, tex->image.format, tex->image.bo_stride,
if (unlikely(tex->image_format == tex->base.format)) {
util_copy_box(dst, tex->image_format, tex->image.bo_stride,
dst_slice_stride, 0, 0, 0, box->width, box->height, box->depth,
xfer->staging.sys, xfer->base.stride, xfer->base.layer_stride,
0, 0, 0);
@ -853,7 +853,7 @@ tex_staging_sys_convert_write(struct ilo_texture *tex,
switch (tex->base.format) {
case PIPE_FORMAT_ETC1_RGB8:
assert(tex->image.format == PIPE_FORMAT_R8G8B8X8_UNORM);
assert(tex->image_format == PIPE_FORMAT_R8G8B8X8_UNORM);
for (slice = 0; slice < box->depth; slice++) {
const void *src =