Commit Graph

321 Commits

Author SHA1 Message Date
Alyssa Rosenzweig 786871c87e agx: Don't kill helper threads in ld_var
Apparently this is yet another .kill bit. Fixes:

dEQP-GLES3.functional.shaders.derivate.dfdx.linear.*
dEQP-GLES3.functional.shaders.derivate.dfdy.linear.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig 367d93bcd4 agx: Handle texture array indices
These need to be converted to integers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig b459473bb9 agx: Implement nir_op_txb
Like explicit LODs, biases must be 16-bit, so add a lowering rule for
this. With the LOD mode selection updated for txb, we can then ingest
biases like explicit LODs and allowlist txb. Passes:

dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.texture.mipmap.2d.bias.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig e2903f66ec agx: Translate LOD modes more generically
Now includes support for auto_load_bias mode.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig d5b7d629d7 agx: Add AUTO_LOD_BIAS mode
Automatic load with a bias.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig daab41b80b asahi: Identify IOGPU_ATTACHMENT::size
Oops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14898>
2022-02-06 09:48:34 -05:00
Alyssa Rosenzweig f8feaee0dd agx: Call nir_lower_discard_if
We still need to implement discard itself, but this means we don't need
to worry about discard_if. This compiles down to the same idiom as
the vendor compiler (Metal) generates

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14217>
2022-02-04 19:09:23 +00:00
Alyssa Rosenzweig b4108e1d01 agx: Lower UBO loads to use per-element indexing
This lets us support indirect access to UBOs easily. The existing
constant special case disappears too, since the peephole optimizer can
inline the constant later. (note: this is too conservative since we can
go up to 16-bit immediates...)

Unfortunately, nir_opt_algebraic can't seem to optimize expressions like
"((a << 3) + 4) >> 2" to "(a << 1) + 1" which would be necessary for
reasonable perf out of this...

Fixes:

dEQP-GLES2.functional.shaders.indexing.uniform_array.float_dynamic_loop_read_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14581>
2022-01-24 14:25:18 +00:00
Alyssa Rosenzweig 9645fa9107 agx: Handle discard intrinsics
Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...

Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig f248f6623c agx: Add sample_mask instruction
Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig dcc12656e3 asahi: Route sample mask from shader
Compiler-controlled bit in the cmdstream.

Some other magic bits are needed for sample mask writes to work
properly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig 9b57600502 asahi: Rectify confusing XML comment
The field was split up...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig 3341abc5d7 asahi: Break out Fragment Parameters word
What the other 31 bits are for is anyone's guess.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig fc5a72be2f asahi: Add XML for unknown 0x4a packet
Enough bits of this packet are known that open-coding hex bytes for it
is annoying. Add some XML correpsonding to what we know.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Dave Airlie f7bb68e499 glsl/nir: don't pass gl_context to the convertor routine.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14433>
2022-01-07 06:19:49 +00:00
Dave Airlie d051854cca treewide: drop mtypes/macros includes from main
These aren't required in lots of places, so remove them.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14127>
2021-12-08 22:14:45 +00:00
Alyssa Rosenzweig 81d22da6de asahi: Fix BIND_PIPELINE sizing and alignment
Fix a bug in BIND_PIPELINE XML reported by Dougall, which cleans up
a bit of both decoder and driver.

Instead of...

   * 17 bytes BIND_PIPELINE  (17)
   * An unused 8 byte record (25)
   * A set of N 8 byte records (25 + 8 * N)
   * Oops, 1 byte too many! One just disappeared (24 + 8 * N)

It seems to instead be

   * 24 bytes BIND_PIPELINE (24)
   * A set of N 8 byte records (24 + 8 * N)

without the sentinel record. These means the 8 byte records themselves
are shuffled, with the high byte of the pointers split from the low
word, but that's less gross than an off-by-one.

It's still not clear what the last 8 bytes of the BIND_VERTEX_PIPELINE
structure mean, or the last 4 byte of the BIND_FRAGMENT_PIPELINE
structure which seems to be a bit shorter.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig 3b108393a2 asahi: Remove obnoxious workaround
Now that we're not hardcoded any magic BO IDs, there is no minimum
number of allocations needed. Remove the unneeded -- and obnoxious --
workaround of allocating unused BOs on startup.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig d55a1a77bd asahi: Fix agx_map_* structures
Dougall Johnson observed these structures make more sense with indices[]
first in the entries and indices[] absent from the header. Then the
sentinel entry disappears, nr_entries makes more sense, and a few magic
numbers pop out. Many thanks to Dougall's astute eyes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig 30433ae716 asahi: Deflake addresses
Reported by Dougall.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig df1824046a asahi: Rename PANDECODE->AGXDECODE
Fix remnant of the Panfrost decoder fork.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Timothy Arceri a9ed4538ab nir: add indirect loop unrolling to compiler options
This is where it should be rather than having to pass it into the
optimisation pass every time.

It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
2021-08-03 10:54:50 +00:00
Alyssa Rosenzweig a3e0b3b912 asahi: Add integers to agx_vertex_formats
Handles all the easy cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 18:00:07 -04:00
Alyssa Rosenzweig 3cd6f62388 agx: Shift vertex buffer stride in the compiler
Required to support non-32-bit vertex formats efficiently.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:57:19 -04:00
Alyssa Rosenzweig c7ba0fb04d agx: Add agx_format_shift routine
Required to calculate alignments for vertex buffers correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:45:38 -04:00
Alyssa Rosenzweig 96c98e0d25 agx: Define p_extract for type converts
Useful for grabbing the high 32-bit word of a 64-bit value.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:25:40 -04:00
Alyssa Rosenzweig 3417ecb4d7 agx: Implement instanced arrays
Divide by instance divisor if needed. Same strategy as ACO.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:25:11 -04:00
Alyssa Rosenzweig 538e3a3100 agx: Include divisors in the vertex shader key
Needed to lower the divisions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:24:47 -04:00
Alyssa Rosenzweig 0c353d47be agx: Add udiv-by-constant routine
Uses the ridiculousfish algorithm, will be used to lower instanced
arrays into something efficient.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:24:02 -04:00
Alyssa Rosenzweig 50a4c993fd agx: Add agx_ushr helper
Syntax sugar for the underlying bitfield manipulation instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:23:42 -04:00
Alyssa Rosenzweig 3c1f754a71 agx: Handle load_instance_id
Preloaded into r6, as predicted.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 15:12:18 -04:00
Alyssa Rosenzweig 3f5eebe5e6 agx: Drop dated /* TODO: RA */
We skip over vertex ID in RA now, it's fine.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 15:12:03 -04:00
Alyssa Rosenzweig 465224379c agx: Plug memory leak in register allocator
Fixes: 85e18deb18 ("agx: Assign registers locally")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reported-by: Coverity
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 15:00:22 -04:00
Alyssa Rosenzweig 7848100f27 agx: Use consistent ncomps
Fixes register allocation failure in:
dEQP-GLES3.functional.ubo.single_basic_array.shared.row_major_mat4_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 14:55:16 -04:00
Alyssa Rosenzweig cce1a2fc19 agx: Dump register file when failing to allocate
Usually shows a bug.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 14:54:34 -04:00
Alyssa Rosenzweig 5fb9159eb9 agx: Fix mismatched units in load_ubo
Fixes assertion failure in
dEQP-GLES3.functional.ubo.single_basic_type.shared.highp_float_fragment

   Assertion failed: ((value & 1) == 0), function agx_print_sized, file
   ../src/asahi/compiler/agx_print.c, line 39.

Fixes: 033d4d09fc ("agx: Implement load_ubo/kernel_input")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 14:39:44 -04:00
Alyssa Rosenzweig 5deb7c26d6 agx: Don't set helper invocation kill bit
In the future we'll need data flow analysis similar to what we do in
panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 14:27:35 -04:00
Alyssa Rosenzweig 1671022bf2 asahi: Identify texture dimension field
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 13:56:04 -04:00
Alyssa Rosenzweig 23f5ad668f asahi: Fix sampler filtering flag
Typo in the XML. Fixes broken filtering. Still chasing an off-by-one.

Fixes: cad54e2721 ("asahi: Add command buffer XML definitions")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 13:56:04 -04:00
Alyssa Rosenzweig f376a90d21 asahi: Identify texture address field
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 13:56:04 -04:00
Alyssa Rosenzweig dd98918a5a agx: Flip point coordinates because OpenGL
Fixes dEQP-GLES2.functional.shaders.builtin_variable.pointcoord

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig 3291779c21 asahi: Handle point coordinates
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig 3d75cff7d7 asahi: Identify triangle/lines vs point varyings
Seems to allow skipping over point coords?

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig e2176490d6 asahi: Unpack varying descriptors (1x)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig 2468b123bb asahi: Set bit for psiz
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig 05dc72f863 asahi/decode: Print some IOGPU stuff
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-11 14:49:00 -04:00
Alyssa Rosenzweig da85e84206 asahi/decode: Print clear/store pipelines
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-11 14:48:59 -04:00
Alyssa Rosenzweig 2f032283f8 asahi: Allocate global IDs
Use the same UABI as Metal. One less hack, trying to rule out possible
differences to Metal...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-11 14:48:59 -04:00
Alyssa Rosenzweig 314324f320 asahi/decode: Fix decoding of draw calls
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-11 14:48:42 -04:00
Alyssa Rosenzweig ed4b3a5d17 asahi/decode: Handle CULL packets
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10 12:34:40 -04:00
Alyssa Rosenzweig 9854079d59 asahi/decode: Fix up high word
Not sure what's happening here, there's some magic for sure.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10 12:34:40 -04:00
Alyssa Rosenzweig d5580ee805 asahi: Identify more unknown fields in the memmap
From validating the memory map of a Metal sample and seeing what goes wrong.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10 12:05:34 -04:00
Alyssa Rosenzweig a9b8731fa1 asahi/decode: Check fewer zeroes after a command buffer
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10 11:23:50 -04:00
Alyssa Rosenzweig 0b35a8f81a asahi: Make track_free safer
Ensure that we don't free the same BO multiple times, which can lead to later
segfaults in decode.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10 11:16:56 -04:00
Alyssa Rosenzweig 9b6ca87672 asahi/decode: Only dump mapped allocations
This matches the hardware's view of memory and helps catch spurious reads. (One
symptom of messing this up -- besides broken rendering -- is a kernel warning
about a "bogus texture handle 0".)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10 11:04:45 -04:00
Alyssa Rosenzweig ea7892a74c asahi: Remove unused bo_access property
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10 11:01:25 -04:00
Alyssa Rosenzweig 1d0008734c agx: Ensure we don't overallocate registers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig 7e65e47d19 agx: Pipe in nir_register
This is kind of lazy...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig 85e18deb18 agx: Assign registers locally
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig 15b49a6795 agx: Count read registers as well
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig f03cecf05f agx: Don't choke on registers in the optimizer
Just skip over them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig 01174fcec8 asahi: Use XML for interpolation packet
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig 4c99510d3b asahi: Identify attachment length field
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig b8bc5ed297 asahi: Use GenXML for main bind fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig 19bb9d278f asahi: Extend IOGPU header to contain encoder
Let's squash together all the resulting zeroes. Trying to discern some structure out of this.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig c1d8ed1bc2 asahi: Move IOGPU header to XML
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig 0b9e8181da asahi: Identify "command buffer" size field in map
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig 8e3f81ccc4 asahi: Add XML for the attachment structure
We need a lot more control over these magic structures to get Z/S attachments working correctly. This is an early start.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig 18a34dc47e asahi: Implement the stencil test
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig dc968a9bec asahi: Prepack rasterizer faces
A bit more efficient and will allow easy implementation of the stencil test.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig 0266cf86e9 asahi: Fix meson dependency on packing in compiler
Closes: #5030
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Fixes: 6a657b17b9 ("agx: Remap fragment shader varyings explicitly")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06 13:44:50 +00:00
Alyssa Rosenzweig bee077f5e2 asahi: Identify vertex texture/sampler counts
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 50f012542f agx: Handle txl
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 8361e24604 agx: Legalize LOD sources to be 16-bit only
I'm not convinced this is /right/ but it's a step.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 4891e51bf3 agx: Fix lod_mode shift
Was zero before so didn't notice the bug.

Fixes: 9f55538834 ("agx: Pack texture ops")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig edd30fa1bd agx: Pack LOD descriptors
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig e847bffbcc agx: Fix LOD_MIN enum
Fixes: 2470a080d2 ("agx: Stub NIR backend compiler")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig c99dfe6a0c agx: Fix 32-bit bitwise shifts
Fixes dEQP-GLES2.functional.shaders.functions.qualifiers.const_int_fragment

Fixes: e50bae00f4 ("agx: Add 32-bit bitwise shifts")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 8ea262f508 asahi: Add ASAHI_MESA_DEBUG=no16 option
A lot of dEQP failures go away with 32-bit forced...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 5228be45b6 asahi: Generalize varying linking
Handles matrices now. Fixes

dEQP-GLES2.functional.shaders.matrix.add.dynamic_mediump_mat4_float_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 5049907ae1 asahi: Implement colour buffer reloads
Gets glmark2 -bdesktop working.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 0e0448d8df asahi: Add internal (renderable) formats to the table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 2ad59fc9ec asahi: Handle Z16_UNORM textures
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig a1f732e67b agx: Track logical control flow graph
Logic lifted from the Bifrost compiler, which was a copypaste of the Midgard
compiler, which was based on a faulty understanding of the v3d compiler,
which...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig a207c77314 agx: Lift agx_block_add_successor from Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 2e1ba82060 agx: Count write registers, not components
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 0ef93554e1 agx: Mark sources that kill
Trivially computed during liveness analysis (already a byproduct!) and required
for efficient register allocation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 7972e74f40 agx: Add liveness analysis pass
Based on the Panfrost one, scalarized and with some silly things fixed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig ec40620f86 agx: Add agx_exit_block helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig ebd25e7ee7 agx: Pull out agx_write_components
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig f49ba0874a asahi: Unify varying linking code with vertex shaders
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 6a657b17b9 agx: Remap fragment shader varyings explicitly
Needed to handle fragcoord.z correctly, for example. Step 1, at least.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 32f4be5dd7 agx: Rename agx_pack to agx_pack_binary
Conflicts with GenXML.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig bf8d1734fd agx: Implement ld_vary_flat
Not clear what any of this is for but let's be nice and match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 3eab648d6b agx: Implement nir_intrinsic_load_frag_coord
Depends on matching ABI.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig 8457524238 agx: Rename remap_varyings -> remap_varyings_vs
Want to do the same for fragment shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig eabcf9f31e asahi: Identify varying descriptor fields
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig 3d3e4928b2 agx: Add ld_vary_flat opcode
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig 10b8563966 agx: Update ld_vary encoding mask
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig 99b67ab355 agx: Add perspective bit to ld_var
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig ef808205c6 agx: Add agx_immediate_f helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig be4d88a6ba agx: Mark components as ASSERTED
Prevents a release build warning.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Vinson Lee 6fe82e6c1e asahi: Fix macOS macro.
Fixes: 26b19bda30 ("asahi: Add device abstraction")
Fixes: 55c0956fd0 ("asahi: Add (clean room) IOKit uABI header")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11569>
2021-06-24 13:49:40 +00:00
Rhys Perry 1cbcfb8b38 nir, nir/algebraic: add byte/word insertion instructions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:42 +00:00
Alyssa Rosenzweig 0e2293a52b agx: Handle load_back_face_agx
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig c21168a26c agx: Lower front face to back face
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig 75cafd8472 agx: Pack SR immediate
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig 307b8f1b2f agx: List sr enum in Python
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig cc8fec8b74 agx: Generate enums from Python
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig 223476aff3 agx: Model get_sr
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig 6899f002fa asahi: Add mipmapping state to the XML
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig bf42d17a16 asahi: Flesh out the formats table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 1b24a3e9e9 asahi: Add "hacks for dEQP" flag
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig e2e1d8160f asahi: Add ETC2 formats to table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig f690d1f7ab asahi: Use pixel table in is_format_supported
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 8b1e273cb5 asahi: Scaffold format table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 6bb7172622 asahi: Hide pixel formats behind an opaque type
Convenient for mapping a format table.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 022e482eaa asahi: Add format enums
Split it up into the underlying parts. Now we can decode every format
accessible in Metal.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig eb5983b48e asahi: Print unknown enum values
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig bfd5e52f16 asahi: Note that "render target" lacks an sRGB bit
sRGB is handled through other mechanisms.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 118682dd83 asahi: Identify line stride in texture/RT XML
The off-by-four is concerning.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 9c0ef01c68 asahi: Add layout enum to XML
Used for textures and render targets. There are more values here, probably for
other tiling schemes and compression.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 5c97d1c837 asahi: Implement wide lines
Identify line width field and route through the Gallium line width.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
2021-06-01 01:31:02 +00:00
Alyssa Rosenzweig 6fbc1cb52a asahi: Update viewport descriptor depth fields
Acts like a translate/scale pair more generally, not specific to near/far
planes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:02 +00:00
Alyssa Rosenzweig 9392e2b275 asahi: Add unknown bits seen with the GL driver
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:02 +00:00
Alyssa Rosenzweig 5de49375ec asahi: Expose PIPE_CAP_CLIP_HALFZ
Use the Zink lowering pass to handle the non-halfz case. Metal, like Vulkan,
uses half-z (and Metal is not configurable, making r/e tricky).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig f99f7e70d7 asahi: Add scissor enable bit
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig d7cbfd4f6c asahi: Add "set scissor" command
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig f170b8357b asahi: Fix scissor descriptor definition
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig e9483110d2 agx: Zero r0l before first use of control flow
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 839fff846a agx: Add break/continue support
Following Dougall's notes closely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig dd06e6af34 agx: Implement loops in the simplest way
Again, optimizations are possible, but for now go for conformance.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 11705488ed agx: Optimize out empty else blocks
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig cf43206e76 agx: Implement emit_if the simplest way
Lots of optimizations are possible from here.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 3def66e8aa agx: Fix up branch offsets at pack time
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 4fb964ccb8 agx: Model jump instructions
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 6efd00336b agx: Pack control flow instructions
Nearly ALU.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 44dd5edae9 agx: Add push_exec alias
Use the same canonical form as Metal, so the disassembler can alias it
back.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 4eb8fbf780 agx: Model pop_exec
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig a270665a9e agx: Model control flow instructions
Thankfully the encoding is regular, if a bit complicated.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 4fe03cf97c agx: Add inner loop nesting count field
Needed for proper handling of break/continue with nested if-else.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 8454d08aa3 agx: Add branch target to IR
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig ad4dfb3321 agx: Add invert_cond (ccn) to IR
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 21cf528e76 agx: Add nest field to IR
Needed to model control flow instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 6f54385b0a agx: Track block offsets
For fixing branch offsets.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig f7918ebc82 agx: Track current_block
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 0a7a6f0558 agx: Implement boolean mov
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig a1a8ee9b11 agx: Enable 1-bit load_const
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 2d1390392f agx: Pack ld_var Dx
In the expected place.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 1f2d1423bb agx: Drop cmdline version back to ES3.0
The patch needed for this to work was dropped. Fixes the standalone
compiler.

Fixes: 972409dacb ("asahi: Stub command-line compiler for AGX G13B")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30