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asahi: Use GenXML for main bind fragment 

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
This commit is contained in:
Alyssa Rosenzweig 2021-07-05 19:56:22 -04:00 committed by Marge Bot
parent 19bb9d278f
commit b8bc5ed297
2 changed files with 14 additions and 10 deletions
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5
src/asahi/lib/cmdbuf.xml
View File

@ -390,7 +390,10 @@
specified in 32-bit word units. Intepretation per-shader stage.
Probably actually 17 bytes. -->
<struct name="Bind pipeline" size="16">
<field name="Tag" size="32" start="0:0" type="hex" default="0x4000002e"/>
<field name="Tag" size="32" start="0:0" type="hex" default="0x4000002e">
<value name="AGX_BIND_PIPELINE_VERTEX" value="0x4000002e"/>
<value name="AGX_BIND_PIPELINE_FRAGMENT" value="0x800000"/>
</field>
<field name="Unk 1" size="4" start="1:0" type="hex" default="0x2"/>
<field name="Sampler count" start="1:4" size="5" type="uint"/>
<field name="Texture count" start="1:9" size="3" type="uint"/>

19
src/gallium/drivers/asahi/agx_state.c
View File

@ -1281,18 +1281,18 @@ agx_build_store_pipeline(struct agx_context *ctx, uint32_t code,
static uint64_t
demo_launch_fragment(struct agx_context *ctx, struct agx_pool *pool, uint32_t pipeline, uint32_t varyings, unsigned input_count)
{
unsigned sampler_count = ctx->stage[PIPE_SHADER_FRAGMENT].texture_count;
unsigned texture_count = ctx->stage[PIPE_SHADER_FRAGMENT].texture_count;
struct agx_ptr t = agx_pool_alloc_aligned(pool, AGX_BIND_PIPELINE_LENGTH, 64);
uint32_t unk[] = {
0x800000,
0x1002 | (texture_count << 9) | (sampler_count << 4) | (input_count << 16), // TODO: xmlify
pipeline,
varyings,
0x0,
agx_pack(t.cpu, BIND_PIPELINE, cfg) {
cfg.tag = AGX_BIND_PIPELINE_FRAGMENT;
cfg.sampler_count = ctx->stage[PIPE_SHADER_FRAGMENT].texture_count;
cfg.texture_count = ctx->stage[PIPE_SHADER_FRAGMENT].texture_count;
cfg.input_count = input_count;
cfg.pipeline = pipeline;
cfg.fs_varyings = varyings;
};
return agx_pool_upload(pool, unk, sizeof(unk));
return t.gpu;
}
static uint64_t
@ -1416,6 +1416,7 @@ agx_encode_state(struct agx_context *ctx, uint8_t *out,
bool is_lines)
{
agx_pack(out, BIND_PIPELINE, cfg) {
cfg.tag = AGX_BIND_PIPELINE_VERTEX;
cfg.pipeline = pipeline_vertex;
cfg.vs_output_count_1 = ctx->vs->info.varyings.nr_slots;
cfg.vs_output_count_2 = ctx->vs->info.varyings.nr_slots;