Commit Graph

163488 Commits

Author SHA1 Message Date
Bas Nieuwenhuizen a97a6d0f0e radv: reserve space for the scissor in vkCmdBeginRendering.
Fixes: c7d0d328d5 ("radv: Set the window scissor to the render area, not framebuffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20014>
2022-11-26 14:35:54 +00:00
Tatsuyuki Ishi 2a3ed9521d radv: Enable rayTracingPipelineShaderGroupHandleCaptureReplay[Mixed].
Tested that a q2rtx gfxr capture replays correctly and without the
capture/replay feature warning.

I ran the CTS too, but it seems to be just giving out a pass without
testing the code path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19949>
2022-11-26 13:57:56 +00:00
Tapani Pälli dba75d345d nir: fix a leak of ralloc ctx in nir_opt_ray_query_ranges
Fixes following leak:

  ==7520== 48 bytes in 1 blocks are definitely lost in loss record 1,597 of 2,016
  ==7520==    at 0x484486F: malloc (vg_replace_malloc.c:381)
  ==7520==    by 0x5314A4E: ralloc_size (ralloc.c:117)
  ==7520==    by 0x5314A1F: ralloc_context (ralloc.c:104)
  ==7520==    by 0x6A95D68: nir_opt_ray_query_ranges (nir_opt_ray_queries.c:235)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f5b6576585 ("nir: Add a pass for combining ray queries")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20002>
2022-11-25 22:04:52 +00:00
Lucas Stach 2de7d6d1d8 etnaviv: remove copy of resource level in etna_surface
Keeping a full copy of the resource level around in the surface is
confusing and this confusion has caused real bugs already. Get rid
of the copy by retrieving most of the information directly from the
etna_resource_level pointed at from the surface. Only the precomputed
offsets into the target and TS BOs need to be kept in the surface.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19814>
2022-11-25 21:30:40 +00:00
Lucas Stach b6fa3cdb0e etnaviv: fix wrong surface TS clear size
Clearing ts_size - ts_offset bytes in a level means we are clearing the
TS region of all layers in the level starting from the surface layer, so
clearing one surface might corrupt all other layers of a resource level.
Use the correct size to clear only the requested TS region.

Cc: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19814>
2022-11-25 21:30:40 +00:00
Lucas Stach d9e2a7d6ad etnaviv: blt: use correct TS offset in clear operations
Using the ts_offset from the level means we are always clearing the
TS region of layer 0 of the level. Use the correct offset which takes
into account the layer offset.

Cc: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19814>
2022-11-25 21:30:40 +00:00
Lucas Stach 58259e1437 etnaviv: fix ZS clear value computation
Instead of hand-rolling our own conversion and apparently getting the
rounding wrong, just use the common util function.

Fixes piglit test spec@!opengl 1.1@depthstencil-default_fb-clear

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19958>
2022-11-25 21:23:01 +00:00
Lucas Stach 4449b5a271 etnaviv: fix stencil operation without Z write
If stencil operations are enabled, we either need the full early or
late ZS stage, even if Z writes are disabled. Empirically the early
stage properly supports stencil operations, just need to be careful to
not mix early tests with late writes when stencil operations modify
the depth buffer.

Fixes piglit tests:
spec@!opengl 1.1@depthstencil-default_fb-copypixels
spec@!opengl 1.1@depthstencil-default_fb-readpixels
spec@!opengl 1.1@depthstencil-default_fb-blit

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19958>
2022-11-25 21:23:01 +00:00
Martin Roukala (né Peres) ea3f73ba85 Revert "glx/dri: Fix DRI drawable release at MakeCurrent time"
This reverts commit 31b04e420b which
is also breaking KDE in some ways.

Fixes: #7674
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19972>
2022-11-25 20:08:45 +00:00
Martin Roukala (né Peres) 0cee008fee Revert "glx: Fix drawable refcounting for naked Windows"
This reverts commit 768238fdc0 which
is not only leading to memory leaks, but also reportedly breaks KDE
pretty badly.

Fixes: #7674, #7435
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19972>
2022-11-25 20:08:45 +00:00
Lucas Stach 797454edfc etnaviv: rs: fix blits with insufficient alignment for dual pipe operation
Up-aligning the blit height does not always work, as some blit targets
have a smaller padded height. Fall back to single pipe operation if
increasing the height alignment fails. Still try to do it opportunistically
as it improves performance when resolving MSAA targets.

Fixes: 0ff96aaef3 ("etnaviv: rs: fix MSAA alignment adjustment")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19991>
2022-11-25 19:06:28 +00:00
Lucas Stach fd06b313b0 etnaviv: always use RS align when GPU has TEXTURE_HALIGN feature
Due to a logic bug we didn't always up-align the resource when the GPU
has the TEXTURE_HALIGN feature, which broke the RS blit when we need
to blit into a sampler shadow from a multi-tiled render target.

Fixes: 735718ed33 ("etnaviv: move etna_layout_multiple into etnaviv_resource.c")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19991>
2022-11-25 19:06:28 +00:00
Alyssa Rosenzweig 20cdc35fdb asahi: Add missing #include
Noticed when shuffling headers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Alyssa Rosenzweig 5e379acd31 asahi: Enable framebuffer compression
At 4K, glmark2 -bdesktop from 60fps to 86fps.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Alyssa Rosenzweig 59824c1ecb asahi: Fix incorrect debug string
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Alyssa Rosenzweig 9b80ebd86c asahi: Print debug info about unsupported blits
Black box for when we're going down.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Alyssa Rosenzweig efa240b74b asahi: Don't hardcode is_dmabuf_modifier_supported
So we can add more modifiers more easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Asahi Lina a6079e5aa8 asahi: Hook up compressed Z/S support on macOS
We still need to handle uncompressed depth on G13X, but that might never
actually happen in practice.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Asahi Lina 6f15873d44 asahi: Introduce compressed resource support
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Asahi Lina 78948c03f0 asahi: Identify compression-related XML
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Asahi Lina bea975b298 ail: Add unit tests for compression
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Asahi Lina 0ba63d5c26 ail: Introduce support for compression
The main buffer is twiddled as before, but there's now also an auxiliary
compression buffer that we need to reserve space for.

With compression, the main buffer is aligned less. The macOS logic seems to be
to align to the page size only if the texture is both 3D and mipmapped, *and*
the layer stride is greater than the page size.

That's gated on compression being enabled. Page alignment seems to be needed for
uncompressed twiddled cube maps.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19999>
2022-11-25 18:56:48 +00:00
Sviatoslav Peleshko 478ffe7127 driconf/intel: Use fake vendor to WA bad detection in Source engine games
Source engine uses flawed device detection in Linux native OpenGL backend,
which causes it to use bad configurations for Intel devices and thus
not always render correctly. Workaround this by using vendor string that
does not include "Intel" in it.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7725
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19828>
2022-11-25 18:21:17 +00:00
Alyssa Rosenzweig f9e11c71c7 asahi: Fix undefined behaviour with samplers
bind_sampler_states doesn't zero [nr_samplers, PIPE_MAX_SAMPLERS) so can get
non-null garbage samplers leading to a use-after-free (segfault derefencing
sampler) or a buffer overflow (writing samplers[] out).

Fixes crashes in Xonotic.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: dcow
Tested-by: dcow
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19994>
2022-11-25 18:11:10 +00:00
Alyssa Rosenzweig b102f045ab asahi: Set GPR count accurately for background/EOT
Better occupancy, which is especially important when the background shader
does memory access (for reloads). On my 4K monitor, glmark2 -bdesktop fullscreen
from 95fps to 133fps.

At default settings, glmark2 -bterrain from 63fps to 71fps.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19997>
2022-11-25 18:02:42 +00:00
Alyssa Rosenzweig bcba473eac asahi: Fix UB in union with logic ops
Colour mask written.

Fixes: 9dddbfeaef ("asahi: Fix logic ops")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19998>
2022-11-25 17:53:43 +00:00
Bas Nieuwenhuizen 8d83ffe531 radv/ci: Add coverage for ETC2 emulation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19914>
2022-11-25 17:16:14 +00:00
Bas Nieuwenhuizen 13d755441c vulkan: Remove asserts that weren't valid for RADV ETC2 emulation.
Wasn't caught when radv was modified to use these helpers ...

Tried to move the aspects assert so it still checks application inputs.

Fixes: d9048e31a0 ("radv: Use vk_image_view as the base for radv_image_view")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19914>
2022-11-25 17:16:14 +00:00
Bas Nieuwenhuizen eab61863c0 radv: Fix sampler types in ETC2 decode.
Otherwise we'd have a type mismatch vs texture fetches, which
is asserted upon these days.

Fixes: 1153db23f5 ("radv: Add ETC2 decode shader.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19914>
2022-11-25 17:16:14 +00:00
Bas Nieuwenhuizen c6ec4925c0 radv: Use correct init order for ETC2 image views
Fixes: d9048e31a0 ("radv: Use vk_image_view as the base for radv_image_view")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19914>
2022-11-25 17:16:14 +00:00
Erik Faye-Lund 0685e330dd radeonsi: mark glx-multithread-texture as a flake
This has apparently been flaking for a while, so let's mark it as such.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7772
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20004>
2022-11-25 16:52:50 +00:00
Matt Coster 20747fabba pvr: debug: Add PPP sub-buffer support to CSB dumps.
This patch also includes the infrastructure for dumping sub-buffers in
print_sub_buffer() and new field types for floating and fixed point
decimals.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster 97e54d69a9 pvr: csbgen: Remove TEXTURE_WRAP_VARYING-dependent fields
This patch removes all fields dependent on the TEXTURE_WRAP_VARYING,
feature which is not currently supported.

It also removes STATE_PPP_CTRL.trp which is conditional on another
unused feature.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster 01f9601b02 pvr: debug: Add option to track pvr_bo allocations
This functionality should only need to be enabled when required by
other debug options.

While not used directly in this commit, it lays the groundwork for
dumping information from buffers referenced by other buffers.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster f9a234ef04 pvr: debug: Add "cs" debug option to dump control stream on job submit
With PVR_DEBUG=cs, the control stream will be dumped to stderr
immediately prior to every render or compute job submission.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster 0432015265 pvr: debug: Add documentation for PVR_DEBUG environment variable
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster e6b752ff62 pvr: Add pvr_bo_cpu_map_unchanged() helper to load saved vbits on map
When HAVE_VALGRIND is set, vbits of the CPU mapping are stored when
pvr_bo_cpu_unmap() is called. They can be reloaded by calling
pvr_bo_cpu_map_unchanged() instead of pvr_bo_cpu_map(). The vbits are
not loaded by default on every map, since they could easily have been
changed by the device between the unmap/map calls. Only use
pvr_bo_cpu_map_unchanged() when you can safely assume that nothing has
changed in the underlying memory.

When HAVE_VALGRIND is not set, pvr_bo_cpu_map_unchanged() just inlines
to pvr_bo_cpu_map().

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster d51d79b450 pvr: csbgen: Generate enum-to-string functions for debugging
All enums should be unambiguous, so an error is raised when multiple
enum variants with the same value are encountered. When no enum
variants match the provided value, NULL is returned. This allows the
to-string functions to double as validators.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster f36c938c94 pvr: util: Add integer digit counting functions
These are (reasonably) fast helpers for computing the number of binary,
decimal or hexadecimal digits required to represent a given non-negative
integer.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Samuel Pitoiset ccac91db7b radv: make sure to mark DCC as compressed on GFX11
The bit has moved to FDCC_ENABLE on GFX11.
Found by inspection.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20005>
2022-11-25 15:22:18 +00:00
Rhys Perry 9b19a93319 ac/nir: combine shift translation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19966>
2022-11-25 14:40:22 +00:00
Rhys Perry 064336d359 ac/nir: mask shift operands
NIR shifts are defined to truncate the shift amount to the number of bits
needed to represent the bit-size of the value shifted. LLVM treats large
shifts as poison. This fix achieves NIR semantics for shifts.

As an example, a|(b << 32), where "a" is 32bits, should produce a|b
according to NIR (because 32&31 == 0).

This caused LLVM to incorrectly optimize "(a >> c) | (b << (32 - c))" to a
u2u32(pack_64_2x32(a, b) >> c) (v_alignbit_b32), when the original NIR
should have returned "a | b" if c==0.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19966>
2022-11-25 14:40:22 +00:00
Gert Wollny d5217b024e virgl: Fix injection of double from const mov instruction
We only copy two components, we have to use the complete original source,
and we should rewrite the new source from scratch to avoid incorrect
dimension and indirect handling.

Fixes: 036d7172c (virgl: Move double operands to a temp to avoid double-swizzling bugs)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19975>
2022-11-25 11:54:18 +00:00
Samuel Pitoiset 762e5cccb5 radv: remove useless parenthesis in radv_cmd_buffer_flush_dynamic_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset e9b3a6b81f radv: simplify handling logic op when it's not dynamic
The command buffer already emits ROP3_COPY if the logic op is disabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset 470fbb35ef radv: fix and rework DISABLE_DUAL_QUAD setting
This bit can be enabled with various combinations and it looks better
to only emit it from the cmdbuf.

Fixes: 17b9aa92b7 ("radv: add support for dynamic logic op enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset 0a327f9c7a radv: re-emit dynamic provoking vertex mode if primitive topology changed
The vertex shader depends on the primitive topology.

Fixes: 2cce8500de ("radv: add support for dynamic provoking vertex mode with NGG")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset de4de09a56 radv: re-emit dynamic depth clamp enable if depth clip enable changed
The depth clamp mode depends on depth clip enable/disable.

Fixes: e48c0fbd8f ("radv: add support for dynamic depth clamp enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Lionel Landwerlin bbbc8e7ce7 anv: use the anv_state_pool address helper more
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19983>
2022-11-25 10:29:56 +00:00
Iago Toral Quiroga 08d34ca582 v3dv: allocate copy query pipelines lazily
Instead of creating all 8 pipeline combinations when we initialize
the device we create the pipelines when we need to use them. This
is probably better because applications are likely to always use
the same flags for the copy command, which means that only one
pipeline may be required.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19981>
2022-11-25 09:30:49 +00:00