Commit Graph

188245 Commits

Author SHA1 Message Date
Samuel Pitoiset 8b8d194bfb radv: advertise VK_EXT_nested_command_buffer
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28826>
2024-04-23 16:41:57 +00:00
Samuel Pitoiset 7de95e7742 radv: track if nested command buffers uses indirect draws
IB2 packets should be avoided when a cmdbuf executes nested cmdbufs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28826>
2024-04-23 16:41:57 +00:00
Samuel Pitoiset 0d18a2f4fb radv/amdgpu: do not use IB2 for nested command buffers
This should be enough to support executing nested command buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28826>
2024-04-23 16:41:56 +00:00
José Roberto de Souza 1763d1aab1 iris: Avoid allocation of not needed iris_bucket_cache
Following the previous patch and allocating just the number of
iris_bucket_cache that will be used by giving platform.

While at it also adding util_vma_heap_finish() call in the
iris_bufmgr_create() error path.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28864>
2024-04-23 15:59:01 +00:00
José Roberto de Souza c473a156dc iris: Avoid creation of slabs and cache buckets of lmem heaps in integrated gpus
It was allocating slabs and cache buckets data structs of lmem heaps
but those will never be used in integrated gpus, so lets avoid waste
cpu time and memory with those.

This will also remove slabs and cache buckets for
IRIS_HEAP_DEVICE_LOCAL_CPU_VISIBLE_SMALL_BAR for
discrete GPUs in systems with resizeble bar enabled.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28864>
2024-04-23 15:59:01 +00:00
José Roberto de Souza a51c64ac5c iris: Add comments to BO_ALLOC flags
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28864>
2024-04-23 15:59:01 +00:00
Connor Abbott 7a1779edc7 ir3: Don't pack FS inlocs
Thanks to transform feedback, we don't know which varying components
will be used when compiling the FS. The VS could use additional
components for xfb, and packing the inlocs per-component would result in
overlapping varyings. In order to do this properly, we'd need to create
a variant for the FS when used with xfb.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28626>
2024-04-23 15:22:19 +00:00
Connor Abbott 56607fafc2 ir3: Don't use non-contiguous component masks for FS
I think this isn't necessary, and when we disable packing inlocs we will
start actually using the compmask computed here tests like
KHR-Single-GL46.enhanced_layouts.varying_components on zink will fail
unless we add the extra unused components at the beginning.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28626>
2024-04-23 15:22:19 +00:00
Bas Nieuwenhuizen d0c4b9144a radv: Fix differing aspect masks for multiplane image copies.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11050
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28867>
2024-04-23 13:11:49 +00:00
Rhys Perry 37e9e8b06c aco: split vop3p results
Removes copies in the case of:
a = fmul
b = fmul
c = vec4(a.x, a.y, b.x, b.y)

fossil-db (navi31):
Totals from 21 (0.03% of 79395) affected shaders:
Instrs: 96481 -> 96338 (-0.15%)
CodeSize: 548452 -> 548196 (-0.05%); split: -0.13%, +0.09%
Latency: 1514460 -> 1514238 (-0.01%); split: -0.02%, +0.00%
InvThroughput: 683048 -> 682942 (-0.02%); split: -0.02%, +0.00%
VClause: 1611 -> 1613 (+0.12%)
Copies: 21326 -> 21190 (-0.64%)
Branches: 2427 -> 2426 (-0.04%)
PreVGPRs: 2289 -> 2298 (+0.39%)
VALU: 59090 -> 58954 (-0.23%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
2024-04-23 12:31:59 +00:00
Rhys Perry 88e03feb27 aco: schedule LDS instructions
fossil-db (navi31):
Totals from 1823 (2.30% of 79395) affected shaders:
MaxWaves: 53845 -> 53827 (-0.03%); split: +0.02%, -0.05%
Instrs: 1736317 -> 1731200 (-0.29%); split: -0.38%, +0.09%
CodeSize: 8876760 -> 8857908 (-0.21%); split: -0.29%, +0.08%
VGPRs: 91688 -> 92276 (+0.64%); split: -0.03%, +0.67%
Latency: 11743095 -> 11698872 (-0.38%); split: -0.42%, +0.04%
InvThroughput: 2070526 -> 2067440 (-0.15%); split: -0.17%, +0.02%
VClause: 39048 -> 39058 (+0.03%); split: -0.01%, +0.03%
SClause: 35371 -> 35406 (+0.10%); split: -0.02%, +0.12%
Copies: 104335 -> 104384 (+0.05%); split: -0.21%, +0.26%
Branches: 29769 -> 29794 (+0.08%); split: -0.00%, +0.09%
VALU: 970925 -> 970974 (+0.01%); split: -0.01%, +0.02%
SALU: 146222 -> 146345 (+0.08%); split: -0.01%, +0.09%
VOPD: 1119 -> 1162 (+3.84%); split: +4.29%, -0.45%

fossil-db (navi21):
Totals from 37078 (46.70% of 79395) affected shaders:
MaxWaves: 990093 -> 990025 (-0.01%)
Instrs: 21130662 -> 21182543 (+0.25%); split: -0.01%, +0.26%
CodeSize: 110205364 -> 110415032 (+0.19%); split: -0.01%, +0.20%
VGPRs: 1407168 -> 1410768 (+0.26%)
Latency: 90024839 -> 89929196 (-0.11%); split: -0.11%, +0.01%
InvThroughput: 17170356 -> 17167412 (-0.02%); split: -0.02%, +0.00%
VClause: 392830 -> 392825 (-0.00%); split: -0.01%, +0.01%
SClause: 463150 -> 463188 (+0.01%); split: -0.00%, +0.01%
Copies: 1768433 -> 1768483 (+0.00%); split: -0.02%, +0.02%
Branches: 605989 -> 606011 (+0.00%); split: -0.00%, +0.00%
VALU: 11614810 -> 11614912 (+0.00%); split: -0.00%, +0.00%
SALU: 3794531 -> 3794655 (+0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
2024-04-23 12:31:59 +00:00
Rhys Perry 0ee4fa33bc aco: schedule LDSDIR instructions
fossil-db (navi31):
Totals from 33850 (42.63% of 79395) affected shaders:
MaxWaves: 1011236 -> 1011204 (-0.00%)
Instrs: 23589117 -> 23559185 (-0.13%); split: -0.21%, +0.08%
CodeSize: 126099716 -> 125968376 (-0.10%); split: -0.17%, +0.07%
VGPRs: 1348632 -> 1356012 (+0.55%); split: -0.09%, +0.63%
Latency: 183233795 -> 180997751 (-1.22%); split: -1.33%, +0.11%
InvThroughput: 27081576 -> 27056383 (-0.09%); split: -0.15%, +0.06%
VClause: 386453 -> 386551 (+0.03%); split: -0.11%, +0.13%
SClause: 811941 -> 813023 (+0.13%); split: -0.38%, +0.52%
Copies: 1279706 -> 1280051 (+0.03%); split: -0.46%, +0.49%
Branches: 416940 -> 416938 (-0.00%); split: -0.02%, +0.02%
VALU: 13566410 -> 13567367 (+0.01%); split: -0.04%, +0.04%
SALU: 1835804 -> 1835652 (-0.01%); split: -0.02%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11013
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
2024-04-23 12:31:59 +00:00
Rhys Perry 0bc8a9be67 aco: make store clauses more aggressively
Apparently this significantly improves performance of a radeonsi resolve
shader.

fossil-db (navi31):
Totals from 2372 (2.99% of 79395) affected shaders:
MaxWaves: 59903 -> 59863 (-0.07%)
Instrs: 3508838 -> 3506178 (-0.08%); split: -0.10%, +0.02%
CodeSize: 18516272 -> 18505956 (-0.06%); split: -0.07%, +0.02%
VGPRs: 152708 -> 154604 (+1.24%)
Latency: 27881253 -> 27861445 (-0.07%); split: -0.07%, +0.00%
InvThroughput: 4076649 -> 4076220 (-0.01%); split: -0.03%, +0.02%
VClause: 92696 -> 89409 (-3.55%); split: -3.55%, +0.01%
Copies: 310787 -> 311697 (+0.29%); split: -0.03%, +0.32%
VALU: 1891048 -> 1891933 (+0.05%); split: -0.01%, +0.05%
VOPD: 2534 -> 2559 (+0.99%); split: +1.07%, -0.08%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11014
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
2024-04-23 12:31:59 +00:00
Rhys Perry 1bce498bbf aco: include LDSDIR in latency/etc stats
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
2024-04-23 12:31:59 +00:00
Iago Toral Quiroga 6c73c9bb16 v3d/simulator: size counter_values array correctly on V3D 7.x
sim_state.perfcnt_total provides the total number of counters
supported by the underlying simulated platform and is what we
use when we create a perform to validate that the counters
requested are valid, so we should use this.

V3D_PERFCNT_NUM is a fixed enum value that is only valid for
V3D 4.2 at present and is not sufficiently large for all the
counters available in V3D 7.x.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28870>
2024-04-23 11:20:08 +00:00
Tomeu Vizoso 0c0d62ba70 etnaviv/nn: Implement zero run length encoding of weights
Check how much smaller can the weight+bias buffers be with different
amount of bits to encode runs of zeroes and choose the smallest one.

This reduces the bandwidth considerably, which is at present the
bottleneck with useful models.

On a Libre Computer Alta AML-A311D-CC, I see these improvements:

MobileNetV1: 15.650ms -> 9.991ms
SSDLite MobileDet: 56.149ms -> 32.692ms

Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27513>
2024-04-23 10:55:24 +02:00
Erik Faye-Lund 1e78d9aaca panfrost: use util_debug_message for perf_debug
This way, applications can get to know about performance issues when
they happen, using the debug callback mechanism.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28693>
2024-04-23 10:09:41 +02:00
Erik Faye-Lund ef4c6e9345 panfrost: perf_debug_ctx -> perf_debug
Now that we only call one of these, the other one is superfluous. So
let's combine them and use the shorter name for the result.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28693>
2024-04-23 10:09:37 +02:00
Erik Faye-Lund 7655257c82 panfrost: use perf_debug_ctx instead of perf_debug
This allows us to use perf_debug_ctx() instead of perf_debug(), which
will help make things a bit cleaner down the line.

In order to do this, we also need to make sure we always have access to
the context, so let's also pass ctx to panfrost_should_linear_convert
while we're at it.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28693>
2024-04-23 10:09:32 +02:00
Samuel Pitoiset e4f945cd4a vulkan: pass cmdbuf level to vk_command_buffer_ops::create()
RADV needs to know the command buffer level in the create() helper.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28861>
2024-04-23 06:33:31 +00:00
Christian Gmeiner 1fb9e67f7e etnaviv: drm: Drop NPU-related params
All of the NPU related DRM_ETNAVIV_GET_PARAM values, which got introduced in
6.9-rc1 of the kernel got removed before the 6.9 release. Clean-up our code base.

NPU support _NEEDS_ hwdb support and a recent stable kernel.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28837>
2024-04-23 05:39:57 +00:00
Francisco Jerez 62aab1437e intel/fs/gfx20+: Handle subdword integer regioning restrictions in copy propagation.
This makes sure that copy propagation doesn't undo the lowering of
restricted sub-dword integer regions done by brw_fs_lower_regioning().

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28698>
2024-04-22 18:02:32 -07:00
Francisco Jerez 217d412360 intel/fs/gfx20+: Implement sub-dword integer regioning restrictions.
This patch introduces code to enforce the pages-long regioning
restrictions introduced by Xe2 that apply to sub-dword integer
datatypes (See BSpec page 56640).  They impose a number of
restrictions on what the regioning parameters of a source can be
depending on the source and destination datatypes as well as the
alignment of the destination.  The tricky cases are when the
destination stride is smaller than 32 bits and the source stride is at
least 32 bits, since such cases require the destination and source
offsets to be in agreement based on an equation determined by the
source and destination strides.  The second source of instructions
with multiple sources is even more restricted, and due to the
existence of hardware bug HSDES#16012383669 it basically requires the
source data to be packed in the GRF if the destination stride isn't
dword-aligned.

In order to address those restrictions this patch leverages the
existing infrastructure from brw_fs_lower_regioning.cpp.  The same
general approach can be used to handle this restriction we were using
to handle restrictions of the floating-point pipeline in previous
generations: Unsupported source regions are lowered by emitting an
additional copy before the instruction that shuffles the data in a way
that allows using a valid region in the original instruction.  The
main difficulty that wasn't encountered in previous platforms is that
it is non-trivial to come up with a copy instruction that doesn't
break the regioning restrictions itself, since on previous platforms
we could just bitcast floating-point data and use integer copies in
order to implement arbitrary regioning, which is unfortunately no
longer a choice lacking a magic third pipeline able to do the
regioning modes the integer pipeline is no longer able to do.

The required_src_byte_stride() and required_src_byte_offset() helpers
introduced here try to calculate parameters for both regions that
avoid that situation, but it isn't always possible, and actually in
some cases that involve the second source of ALU instructions a chain
of multiple copy instructions will be required, so the
lower_instruction() routine needs to be applied recursively to the
instructions emitted to lower the original instruction.

XXX - Allow more flexible regioning for the second source of an
      instruction if bug HSDES#16012383669 is fixed in a future
      hardware platform.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28698>
2024-04-22 18:02:07 -07:00
Mike Blumenkrantz 4cc975c6e9 glx: silence more implicit-load zink errors
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz e3ea55fef2 zink: don't print error messages when failing an implicit driver load
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz b53a402edc pipe-loader: plumb a flag for implicit driver load through screen creation
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz 744307289c frontends/dri: plumb an 'implicit' param through screen init
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz 4742d9bc1a gbm: plumb an 'implicit' param through device creation
this is always true except in the software fallback

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz 14c44aacff dri: plumb a 'implicit' param through createNewScreen interfaces
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz 014bbae4bf glx: pass implicit load param through allocation
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz 91c757bda1 glx: add an 'implicit' param to createScreen
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz 1b9ee76369 glx: fix some indentation
ifdefs are hard

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Mike Blumenkrantz 0e8202cc24 loader: delete unused param from pipe_loader_vk_probe_dri()
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28139>
2024-04-22 23:25:58 +00:00
Guilherme Gallo 4b81ee6418 ci/lava: Fix how exception entry in structured log
Improves the error logging in the LAVA job submitter by capturing and
logging the exception message rather than just the exception type when a
job fails to run.

Additionally, introduces a clearer script interruption
message to aid in debugging and immediate understanding of job
submission failures.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28778>
2024-04-22 21:20:07 +00:00
Guilherme Gallo e96e25f323 ci/lava: Don't run jobs if the remaining execution time is too short
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28778>
2024-04-22 21:20:07 +00:00
Guilherme Gallo 3e33171471 ci/lava: Introduce unretriable exception handling
This commit refactors the exception hierarchy to differentiate between
retriable and fatal errors in the CI pipeline, specifically within the
LAVA job submission process.

A new base class, `MesaCIRetriableException`, is introduced for
exceptions that should trigger a retry of the CI job, while
`MesaCIFatalException` is added for non-recoverable errors that halt the
process immediately.

Additionally, the logic for deciding whether a job should be retried or
not is updated to check for instances of `MesaCIRetriableException`,
improving the robustness and reliability of the CI job execution
strategy.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28778>
2024-04-22 21:20:07 +00:00
Guilherme Gallo 5363874676 ci/lava: A few formatting cleanups
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28778>
2024-04-22 21:20:07 +00:00
Caio Oliveira 13093ceb3c intel/brw: Move validate out of fs_visitor
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28534>
2024-04-22 13:38:41 -07:00
Caio Oliveira 671d216f39 intel/brw: Remove two duplicated validate calls in optimizer
The OPT macro will call validate() after each pass, so both cases
removed by this patch are just redundant calls.  Will only affect
Debug builds since in Release builds validation is a no-op.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28534>
2024-04-22 13:38:41 -07:00
Caio Oliveira 8a6fe54409 intel/brw: Refactor FS validation macros
Use `a` and `b` (already identified as that in the output message)
instead of `f` and `s` for the two values being compared, since in
a later patch `s` will be used to hold the fs_visitor shader.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28534>
2024-04-22 13:38:41 -07:00
Echo J d184808124 nvk: Don't advertise residencyAlignedMipSize on MaxwellB+
DXVK/vkd3d-proton require this feature to be advertised as VK_FALSE for FL12 support:
https://github.com/doitsujin/dxvk/blob/v2.3.1/src/d3d11/d3d11_features.cpp#L305
https://github.com/HansKristian-Work/vkd3d-proton/blob/v2.12/libs/vkd3d/device.c#L7426

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28850>
2024-04-22 20:11:49 +00:00
Echo J be940a7dc6 nvk: Use implicit pipeline cache
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28851>
2024-04-22 14:37:59 -05:00
Faith Ekstrand 59bba821ef nvk: Hash ycbcr conversions in the descriptor set layout hash
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28851>
2024-04-22 14:37:59 -05:00
Echo J 0f46e279ba vulkan: Add implicit pipeline caching support
This mirrors RADV's pipeline behavior (which is more performant
when programs like DXVK don't use the pipeline cache functionality)

Drivers need to set the implicit cache variable to use this though
(the next patch will enable this for NVK)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28851>
2024-04-22 14:37:59 -05:00
Eric R. Smith dae6b6a23d panfrost: fix an incorrect stencil clear optimization
We track stencil clears and writes to optimize them. Unfortunately, the
code for doing this tracks the whole resource, not individual layers or
levels within the resource, which can result in incorrect output when
different levels or layers are accessed. Modified to optimize only the first
layer/level; this will handle the common case of a single stencil texture
while allowing arrays or mipmaps to still work (albeit slightly slower).

The original optimization was introduced in a2463ec271 ("panfrost:
Constant stencil buffer tracking") but the code has been reformatted
since then, so this change won't apply as-is that far back (although it's
fairly obvious how to apply it by hand).

Fixes: a2463ec271 ("panfrost: Constant stencil value tracking")
Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28832>
2024-04-22 16:43:51 +00:00
Mike Blumenkrantz e89123ec73 zink: prune some piglit cts fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28859>
2024-04-22 16:16:59 +00:00
Yonggang Luo bf2df78575 broadcom/common: Now "util/box.h" is under src, so remove the FIXME
Remove the redundant inc_gallium_aux and inc_gallium

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28854>
2024-04-22 15:01:34 +00:00
Tomeu Vizoso ef111f5f07 etnaviv: Don't init the blitter in compute-only contexts
Otherwise, we hit this assertion:

etna_vertex_elements_state_create: Assertion `buffer_idx < screen->specs.stream_count' failed.

As specs.stream_count can be zero in GPUs that are compute only.

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28848>
2024-04-22 14:28:46 +00:00
Samuel Pitoiset 095e3af2b0 radv: add RADV_DEBUG=psocachestats to report per-pipeline cache hits/misses
This can be useful to make sure precompilation works as expected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28829>
2024-04-22 13:54:05 +00:00
Samuel Pitoiset 1f4ee45914 radv: rework pipeline cache search helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28829>
2024-04-22 13:54:05 +00:00