mirrors
/
mesa
mirror of https://gitlab.freedesktop.org/mesa/mesa
1
0
Fork 0
Code Issues 9 Packages Projects Releases Wiki Activity

etnaviv: drm: Drop NPU-related params 

All of the NPU related DRM_ETNAVIV_GET_PARAM values, which got introduced in
6.9-rc1 of the kernel got removed before the 6.9 release. Clean-up our code base.

NPU support _NEEDS_ hwdb support and a recent stable kernel.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28837>
This commit is contained in:
Christian Gmeiner 2024-04-20 15:51:29 +02:00 committed by Marge Bot
parent 62aab1437e
commit 1fb9e67f7e
2 changed files with 20 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/etnaviv/drm/etnaviv_drmif.h
View File

@ -80,11 +80,6 @@ enum etna_param_id {
ETNA_GPU_PRODUCT_ID = 0x1c,
ETNA_GPU_CUSTOMER_ID = 0x1d,
ETNA_GPU_ECO_ID = 0x1e,
ETNA_GPU_NN_CORE_COUNT = 0x1f,
ETNA_GPU_NN_MAD_PER_CORE = 0x20,
ETNA_GPU_TP_CORE_COUNT = 0x21,
ETNA_GPU_ON_CHIP_SRAM_SIZE = 0x22,
ETNA_GPU_AXI_SRAM_SIZE = 0x23,
};
/* bo flags: */

77
src/etnaviv/drm/etnaviv_gpu.c
View File

@ -61,7 +61,6 @@ static void
query_features_from_kernel(struct etna_gpu *gpu)
{
uint32_t features[VIV_FEATURES_WORD_COUNT];
uint64_t nn_core_count;
STATIC_ASSERT(ETNA_GPU_FEATURES_0 == 0x3);
STATIC_ASSERT(ETNA_GPU_FEATURES_1 == 0x4);
@ -84,13 +83,7 @@ query_features_from_kernel(struct etna_gpu *gpu)
features[i - ETNA_GPU_FEATURES_0] = val;
}
etna_gpu_get_param(gpu, ETNA_GPU_NN_CORE_COUNT, &nn_core_count);
if (nn_core_count)
gpu->info.type = ETNA_CORE_NPU;
else
gpu->info.type = ETNA_CORE_GPU;
gpu->info.type = ETNA_CORE_GPU;
ETNA_FEATURE(chipFeatures, FAST_CLEAR);
ETNA_FEATURE(chipFeatures, 32_BIT_INDICES);
@ -160,49 +153,34 @@ query_limits_from_kernel(struct etna_gpu *gpu)
struct etna_core_info *info = &gpu->info;
uint64_t val;
if (info->type == ETNA_CORE_GPU) {
etna_gpu_get_param(gpu, ETNA_GPU_INSTRUCTION_COUNT, &val);
info->gpu.max_instructions = val;
assert(info->type == ETNA_CORE_GPU);
etna_gpu_get_param(gpu, ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE, &val);
info->gpu.vertex_output_buffer_size = val;
etna_gpu_get_param(gpu, ETNA_GPU_INSTRUCTION_COUNT, &val);
info->gpu.max_instructions = val;
etna_gpu_get_param(gpu, ETNA_GPU_VERTEX_CACHE_SIZE, &val);
info->gpu.vertex_cache_size = val;
etna_gpu_get_param(gpu, ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE, &val);
info->gpu.vertex_output_buffer_size = val;
etna_gpu_get_param(gpu, ETNA_GPU_SHADER_CORE_COUNT, &val);
info->gpu.shader_core_count = val;
etna_gpu_get_param(gpu, ETNA_GPU_VERTEX_CACHE_SIZE, &val);
info->gpu.vertex_cache_size = val;
etna_gpu_get_param(gpu, ETNA_GPU_STREAM_COUNT, &val);
info->gpu.stream_count = val;
etna_gpu_get_param(gpu, ETNA_GPU_SHADER_CORE_COUNT, &val);
info->gpu.shader_core_count = val;
etna_gpu_get_param(gpu, ETNA_GPU_REGISTER_MAX, &val);
info->gpu.max_registers = val;
etna_gpu_get_param(gpu, ETNA_GPU_STREAM_COUNT, &val);
info->gpu.stream_count = val;
etna_gpu_get_param(gpu, ETNA_GPU_PIXEL_PIPES, &val);
info->gpu.pixel_pipes = val;
etna_gpu_get_param(gpu, ETNA_GPU_REGISTER_MAX, &val);
info->gpu.max_registers = val;
etna_gpu_get_param(gpu, ETNA_GPU_NUM_CONSTANTS, &val);
info->gpu.num_constants = val;
etna_gpu_get_param(gpu, ETNA_GPU_PIXEL_PIPES, &val);
info->gpu.pixel_pipes = val;
etna_gpu_get_param(gpu, ETNA_GPU_NUM_VARYINGS, &val);
info->gpu.max_varyings = val;
} else {
etna_gpu_get_param(gpu, ETNA_GPU_NN_CORE_COUNT, &val);
info->npu.nn_core_count = val;
etna_gpu_get_param(gpu, ETNA_GPU_NUM_CONSTANTS, &val);
info->gpu.num_constants = val;
etna_gpu_get_param(gpu, ETNA_GPU_NN_MAD_PER_CORE, &val);
info->npu.nn_mad_per_core = val;
etna_gpu_get_param(gpu, ETNA_GPU_TP_CORE_COUNT, &val);
info->npu.tp_core_count = val;
etna_gpu_get_param(gpu, ETNA_GPU_ON_CHIP_SRAM_SIZE, &val);
info->npu.on_chip_sram_size = val;
etna_gpu_get_param(gpu, ETNA_GPU_AXI_SRAM_SIZE, &val);
info->npu.axi_sram_size = val;
}
etna_gpu_get_param(gpu, ETNA_GPU_NUM_VARYINGS, &val);
info->gpu.max_varyings = val;
}
static uint64_t get_param(struct etna_device *dev, uint32_t core, uint32_t param)
@ -368,21 +346,6 @@ int etna_gpu_get_param(struct etna_gpu *gpu, enum etna_param_id param,
case ETNA_GPU_ECO_ID:
*value = gpu->info.eco_id;
return 0;
case ETNA_GPU_NN_CORE_COUNT:
*value = get_param(dev, core, ETNA_GPU_NN_CORE_COUNT);
return 0;
case ETNA_GPU_NN_MAD_PER_CORE:
*value = get_param(dev, core, ETNA_GPU_NN_MAD_PER_CORE);
return 0;
case ETNA_GPU_TP_CORE_COUNT:
*value = get_param(dev, core, ETNA_GPU_TP_CORE_COUNT);
return 0;
case ETNA_GPU_ON_CHIP_SRAM_SIZE:
*value = get_param(dev, core, ETNA_GPU_ON_CHIP_SRAM_SIZE);
return 0;
case ETNA_GPU_AXI_SRAM_SIZE:
*value = get_param(dev, core, ETNA_GPU_AXI_SRAM_SIZE);
return 0;
default:
ERROR_MSG("invalid param id: %d", param);