Commit Graph

72 Commits

Author SHA1 Message Date
Alyssa Rosenzweig 1d0008734c agx: Ensure we don't overallocate registers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig 7e65e47d19 agx: Pipe in nir_register
This is kind of lazy...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig 50f012542f agx: Handle txl
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 8361e24604 agx: Legalize LOD sources to be 16-bit only
I'm not convinced this is /right/ but it's a step.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig c99dfe6a0c agx: Fix 32-bit bitwise shifts
Fixes dEQP-GLES2.functional.shaders.functions.qualifiers.const_int_fragment

Fixes: e50bae00f4 ("agx: Add 32-bit bitwise shifts")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 5228be45b6 asahi: Generalize varying linking
Handles matrices now. Fixes

dEQP-GLES2.functional.shaders.matrix.add.dynamic_mediump_mat4_float_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 5049907ae1 asahi: Implement colour buffer reloads
Gets glmark2 -bdesktop working.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig a1f732e67b agx: Track logical control flow graph
Logic lifted from the Bifrost compiler, which was a copypaste of the Midgard
compiler, which was based on a faulty understanding of the v3d compiler,
which...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig a207c77314 agx: Lift agx_block_add_successor from Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig f49ba0874a asahi: Unify varying linking code with vertex shaders
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 6a657b17b9 agx: Remap fragment shader varyings explicitly
Needed to handle fragcoord.z correctly, for example. Step 1, at least.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 32f4be5dd7 agx: Rename agx_pack to agx_pack_binary
Conflicts with GenXML.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig bf8d1734fd agx: Implement ld_vary_flat
Not clear what any of this is for but let's be nice and match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig 3eab648d6b agx: Implement nir_intrinsic_load_frag_coord
Depends on matching ABI.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig 8457524238 agx: Rename remap_varyings -> remap_varyings_vs
Want to do the same for fragment shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig 99b67ab355 agx: Add perspective bit to ld_var
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig be4d88a6ba agx: Mark components as ASSERTED
Prevents a release build warning.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig 0e2293a52b agx: Handle load_back_face_agx
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig c21168a26c agx: Lower front face to back face
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig 5de49375ec asahi: Expose PIPE_CAP_CLIP_HALFZ
Use the Zink lowering pass to handle the non-halfz case. Metal, like Vulkan,
uses half-z (and Metal is not configurable, making r/e tricky).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig e9483110d2 agx: Zero r0l before first use of control flow
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 839fff846a agx: Add break/continue support
Following Dougall's notes closely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig dd06e6af34 agx: Implement loops in the simplest way
Again, optimizations are possible, but for now go for conformance.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 11705488ed agx: Optimize out empty else blocks
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig cf43206e76 agx: Implement emit_if the simplest way
Lots of optimizations are possible from here.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig f7918ebc82 agx: Track current_block
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 0a7a6f0558 agx: Implement boolean mov
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig a1a8ee9b11 agx: Enable 1-bit load_const
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig 15b5573194 agx: Set reads_tib appropriately
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig d0f566a90d agx: Implement load_output
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig 1b9b2f9046 agx: Condition writeout ops on already being emitted
There's a lot of r/e waiting here, but will be needed for ld_tile. Match
the Metal blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig 41d8db33a2 agx: Assume lower_fragcolor has been called
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig 07fdc0015e agx: Rename blend -> st_tile
For symmetry.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig 06fe6651b3 agx: Implement blend constant color sysvals
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig 5fd489a6bd agx: Return agx_instr* from emit_intrinsic
Aesthetically useful.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig 87ad9439d3 agx: Support bcsel
We're already using cmpsel in lots of places, pipe through the real
thing!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:20 -04:00
Alyssa Rosenzweig d3abe997ca agx: Add b2i implementation
Another icmpsel variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig 80edb8124d agx: Implement b2f
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig 5a5abdc8d8 agx: Support 1-bit booleans
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig 9201d31eac agx: Add min/max support
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig 257a8cc111 agx: Emit texture ops
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig d555849c3c agx: Add agx_tex_dim helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig 1455f33f9b agx: Implement vertex_id
Preloaded to r5 in vertex shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig 7566466354 agx: Lower load_attr to device memory accesses
This is pretty annoying but not as catastrophic as I feared... at least,
until we need to support indirect access, non-native formats, or instancing.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig 1c6f34f611 agx: Set flag on last st_vary instruction
Not sure what the point is but let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig 033d4d09fc agx: Implement load_ubo/kernel_input
Lower to a read from global memory at a base address specified in a
sysval.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig 77e7168ae2 agx: Implement limited case of i2i16/i2i32 as iadd
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig 0f58e8dabe agx: Add dead code eliminator
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig 28801b4849 agx: Add forward optimizing pass for fmov
Explain the ideas behind our SSA-based optimizer (inspired by ACO's,
thank you to Daniel Schuermann for discussing this with me in the
context of Bifrost), and implement the subset needed to propagate
abs/neg through.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig e50bae00f4 agx: Add 32-bit bitwise shifts
Only ishr has an actual native instruction, the others are special cases
of the bitfield insertion/extraction ops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
2021-05-02 17:41:16 -04:00