43f6c08a3b
asahi: Handle uncompressed Z32F depth buffers
...
This uses a subset of the depth/stencil infrastructure we built out to
support writing back tiled, uncompressed Z32F depth buffers to memory.
Texturing from this format is already supported.
This gets glmark2 -bshadow working.
v2: Fix partial renders
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512 >
2022-05-21 22:01:32 -04:00
e6c809d767
asahi: Use z24_in_z32f lowering
...
Thanks Dave!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512 >
2022-05-21 22:01:32 -04:00
6b1e73c700
asahi: Fix hangs waiting on the notification queue
...
Dequeue and WaitForAvailableData can race. Restructure the loop to avoid
this. Fixes all timeouts in dEQP.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16518 >
2022-05-17 15:00:15 +00:00
c4295816af
asahi: switch to NIR loop unrolling
...
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16543 >
2022-05-17 02:12:21 +00:00
d7a071a28f
gallium/drivers: set force_indirect_unrolling_sampler for all required drivers
...
This is set to true for all drivers that have a GLSL level
of support lower than 4.00. This matches the rule for setting the
GLSL IR option EmitNoIndirectSampler.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16543 >
2022-05-17 02:12:21 +00:00
28220b2778
agx: Restore Valve copyright header
...
Parallel copy code is from ir3_lower_parallel_copy.c. This was attributed in the
commit message but lost in the copyright header due to a copypaste mistake.
Rectify this.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16413 >
2022-05-10 01:36:18 +00:00
31fd926334
agx: Lower mediump flat shading
...
This isn't supported by the hardware. Fixes
dEQP-GLES2.functional.shaders.constants.float_uniform_vertex
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
18ef9398de
agx: Remove nir_register support
...
We don't use it anymore, now that we can handle SSA form. Gets rid of
the most gross hack in the compiler.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
3927a9e911
agx: Remove has_liveness
...
Given we do no metadata tracking, this is an accident waiting to happen.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
1c6bd0357f
agx: Update RA comment
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
6b22bbab36
agx: Add validation pass
...
For now, just check that we didn't botch the structure of the block,
since this just bit me.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
4498799822
agx: Remove identity moves
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
c712043b9c
agx: Unit test parallel copy lowering
...
It's pretty tricky.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
6a4d742369
agx: Always use hash table for extracts
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
860832e41b
agx: Split up RA from post-RA lowering
...
This allows us to validate results in the middle.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
ea065537cb
agx: Lower phi nodes to parallel copies
...
Now we have an SSA RA :-)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
ccb0210761
agx: Don't lower phis in NIR
...
We're ready for them now! Just scalarize.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
a8da17f628
agx: Copy prop into phi nodes
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
8ff0a29baf
agx: Translate phi nodes
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
4791dc9125
agx: Make DCE dumber
...
The current DCE pass hits issue around phi nodes. These need to be
solved properly eventually, but for now workaround them by doing
something obviously correct (but suboptimal compile time).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
606d9340f3
agx: Adapt liveness analysis for SSA
...
Lifted from nir_liveness.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
590df764d6
agx: Introduce worklist infrastructure
...
Using the common NIR stuff.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
e414a8c16f
agx: Add agx_after_block_logical helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
a2a947031a
agx: Mark the logical ends of blocks
...
We need to insert parallel copies at the logical end of blocks, before branches.
Add a pseudo instruction signaling that. Cribbed from ACO.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
5be26e8624
agx: Add predecessor index helper
...
To order phi sources.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
3f1e926bf4
agx: Use a dynarray for predecessors
...
This imposes a fixed ordering, allowing phi sources to be implicitly ordered.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
d02e913e95
agx: Remove else optimization
...
It will conflict with SSA-based RA and needs to be rewritten to happen
late.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
4d79f6ca76
agx: Use extract helper for tex internally
...
Allows better optimization.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
4f78141c77
agx: Emit splits for intrinsics
...
This allows optimizing the extracts.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
d06394095b
agx: Optimize p_split(kill) specially
...
Let's make sure these are allocated optimally.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
e16ad8f443
agx: Lower p_split after RA
...
Using existing regalloc infrastructure.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
4fc023ed42
agx: Use a transfer graph for parallel copies
...
Lifted from ir3. Algorithm is the same; the data structures and interface are
lightly modified to decouple from ir3's IR.
Sequentializing parallel copies after RA is tricky. ir3's implementation works
well enough, so I use that one.
Original implementation by Connor Abbott.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
330ec4260d
agx: Add helper to emit splits
...
This should be used for vector destinations, to facilitate the extraction
optimization.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
b30c718a57
agx: Add helper to emit combines
...
...in such a way that subsequent extracts will be optimized.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
5bc65ef963
agx: Add a hash table for vector extracts
...
This will allow us to introduce splits gradually, giving a graceful fallback.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
d285c63417
agx: Add phi pseudo instruction
...
For SSA.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
2a4a8a8902
agx: Add p_split pseudoinstruction
...
Easier on RA for extracts.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
bb1fb0a9db
agx: Dynamically allocate agx_instr->src
...
Required for phi nodes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
d39b1c3426
agx: Implement simple copyprop
...
Cleans up some of the mess.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
7d38bcb7ee
agx: Use pseudo ops for mov/not/and/xor/or
...
Rather than using builder magic (implicitly lowered on emit), add actual pseudo
operations (explicitly lowered before encoding). In theory this is slower, I
doubt it matters. This makes the instruction aliases first-class for IR prining
and machine inspection, which will make optimization passes easier to write.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
3d8c2f2693
agx: Add unit test infrastructure
...
Lifted from Bifrost. Add some basic optimizer tests (they pass!) to show the
compiler is ready to be unit tested. Given we can't have hardware CI for Asahi
yet -- and dEQP is still pretty janky -- unit testing should prove quite useful.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
43c701424b
agx: Wrap compiler header in extern "C"
...
So we can use it from GTest.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
f0a973081f
agx: Use correct types for some IR enums
...
Otherwise there are implicit int->enum casts which prevent us from building as
C++ (with -fpermissive).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
b87ce10210
agx: Match order for designated initializers
...
Required to compile our headers with C++, to allow us to use GTest unit tests.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
ff660dd637
agx: Track write registers more accurately
...
We may not write a full 32-bit vec4, don't be so pessimistic.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
0c82b5c99c
agx: Note that RA proceeds in dominance-order
...
This is an important invariant for SSA-based RA to work.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
81477f3809
agx: Implement some shader-db stats
...
Instructions, bytes, and registers -- this should hold us over until we
can reverse the underlying uarch and get proper cycle estimations.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
536c8ee96d
nir/lower_tex: Make the adding a 0 LOD to nir_op_tex in the VS optional.
...
This controls the whole lowering of "make tex ops with implicit
derivatives on non-implicit-derivative stages be tex ops with an explicit
lod of 0 instead", but it's really hard to describe that in a git commit
summary.
All existing callers get it added except:
- nir_to_tgsi which didn't want it.
- nouveau, which didn't want it (fixes regressions in shadowcube and
shadow2darray with NIR, since the shading languages don't expose txl of
those sampler types and thus it's not supported in HW)
- optional lowering passes in mesa/st (lower_rect, YUV lowering, etc)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16156 >
2022-04-28 21:26:08 +00:00
b219e9a96e
asahi: Port driver to macOS 12.x ABI
...
There's lots of reshuffling required. Nothing "interesting", though.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482 >
2022-03-22 00:19:30 +00:00
f5ae88d36f
asahi: Identify IOGPU_MISC data structure
...
This will be elaborated upon soon.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482 >
2022-03-22 00:19:29 +00:00
d5ee1eacf1
asahi: Add stencil buffer attachment type
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482 >
2022-03-22 00:19:29 +00:00
50f9b4ceba
asahi: Identify IOGPU Internal Pipelines structure
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482 >
2022-03-22 00:19:29 +00:00
eb9da583d7
asahi: Identify aux framebuffer data structure
...
Total guess at the name.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482 >
2022-03-22 00:19:29 +00:00
535f1c1166
asahi: Identify IOGPU Clear Z/S structure
...
Not sure on the details yet but identify and dump the data structure to start.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482 >
2022-03-22 00:19:29 +00:00
64acec0ef9
nir: Fix lowering terminology of compute system values: "from"->"to".
...
This is to match other NIR terminology.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103 >
2022-03-08 17:36:31 +00:00
01d1bf6228
asahi: Wire in pure integer texture formats
...
Passes dEQP-GLES3.functional.texture.format.sized.2d.r*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:33 +00:00
cc3e98e201
asahi: Identify minimum/maximum LOD fields
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:33 +00:00
6554790dfb
asahi: Add LOD clamp packing unit tests
...
With GTest.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
e3a5c1b478
asahi: Add LOD type
...
Automatically packs and unpacks float <==> clamped 4:6 fixed point, used
for min/max LOD fields on the Sampler descriptor.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
db93090ffc
asahi: Allow GenXML to be used in C++
...
C++ requires explicit casts from integers to enums. Fixes errors like
the following when trying to use Asahi GenXML from a GTest unit test.
src/asahi/lib/agx_pack.h:554:23: error: assigning to 'enum agx_channels' from incompatible type 'uint64_t' (aka 'unsigned long long')
values->channels = __gen_unpack_uint(cl, 0, 6);
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
055c5a59f8
agx: Round and clamp array indices
...
Conforming with the GLSL spec. Fixes:
dEQP-GLES3.functional.shaders.texture_functions.texture.sampler2darray_fixed_fragment
(and probably others)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
a822b7b6cc
agx: Naturally align uniform pushes
...
Required to pack correctly, e.g if we push a 16-bit value then a 64-bit
value.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
0c2bbb470a
agx: Add agx_size_align_16 helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
9aeb5156bc
agx: Add typed move helper
...
Useful for u2u16 in lowering code.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
830d16e9f0
asahi: Add AGX_PUSH_ARRAY_SIZE_MINUS_1
...
Required to clamp array indices against the array sizes per the GLSL
spec. Metal also does this, implying it's required by the hardware for
correct operation.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
a8bf729f8a
asahi: Support 2D array and 3D textures
...
As far as I can tell, these *must* be tiled. Other than that, the
implementation is completely routine. Passes
dEQP-GLES3.functional.texture.format.unsized.*2d_array*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
856f64de24
asahi: Allow tiling of all bpps
...
Use the usual macro trick via Panfrost. Fixes textures with formats with
non-32-bit bpp, including:
dEQP-GLES2.functional.texture.specification.basic_teximage2d.*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
2028873ef6
asahi: Dynamically configure tile size
...
We need to shrink the tile size when using small images (including
due to mipmapping) or when using large block sizes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
d103d64df6
asahi: Add some notes to XML about mipmapping
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
06b2d97666
asahi: Add 2D Array and 3D texture dimensions
...
Add to XML and translate in the driver.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
1a3e21a4de
asahi: Identify Level field of render target descriptor
...
Hardware support for rendering into nonzero mip levels.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
65368d2f9a
asahi: Don't redefine MIN2/MAX2
...
The tiling function was written before the Mesa driver...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
786871c87e
agx: Don't kill helper threads in ld_var
...
Apparently this is yet another .kill bit. Fixes:
dEQP-GLES3.functional.shaders.derivate.dfdx.linear.*
dEQP-GLES3.functional.shaders.derivate.dfdy.linear.*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
367d93bcd4
agx: Handle texture array indices
...
These need to be converted to integers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
b459473bb9
agx: Implement nir_op_txb
...
Like explicit LODs, biases must be 16-bit, so add a lowering rule for
this. With the LOD mode selection updated for txb, we can then ingest
biases like explicit LODs and allowlist txb. Passes:
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.texture.mipmap.2d.bias.*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
e2903f66ec
agx: Translate LOD modes more generically
...
Now includes support for auto_load_bias mode.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
d5b7d629d7
agx: Add AUTO_LOD_BIAS mode
...
Automatic load with a bias.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
daab41b80b
asahi: Identify IOGPU_ATTACHMENT::size
...
Oops.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14898 >
2022-02-06 09:48:34 -05:00
f8feaee0dd
agx: Call nir_lower_discard_if
...
We still need to implement discard itself, but this means we don't need
to worry about discard_if. This compiles down to the same idiom as
the vendor compiler (Metal) generates
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14217 >
2022-02-04 19:09:23 +00:00
b4108e1d01
agx: Lower UBO loads to use per-element indexing
...
This lets us support indirect access to UBOs easily. The existing
constant special case disappears too, since the peephole optimizer can
inline the constant later. (note: this is too conservative since we can
go up to 16-bit immediates...)
Unfortunately, nir_opt_algebraic can't seem to optimize expressions like
"((a << 3) + 4) >> 2" to "(a << 1) + 1" which would be necessary for
reasonable perf out of this...
Fixes:
dEQP-GLES2.functional.shaders.indexing.uniform_array.float_dynamic_loop_read_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14581 >
2022-01-24 14:25:18 +00:00
9645fa9107
agx: Handle discard intrinsics
...
Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...
Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
f248f6623c
agx: Add sample_mask instruction
...
Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
dcc12656e3
asahi: Route sample mask from shader
...
Compiler-controlled bit in the cmdstream.
Some other magic bits are needed for sample mask writes to work
properly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
9b57600502
asahi: Rectify confusing XML comment
...
The field was split up...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
3341abc5d7
asahi: Break out Fragment Parameters word
...
What the other 31 bits are for is anyone's guess.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
fc5a72be2f
asahi: Add XML for unknown 0x4a packet
...
Enough bits of this packet are known that open-coding hex bytes for it
is annoying. Add some XML correpsonding to what we know.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
f7bb68e499
glsl/nir: don't pass gl_context to the convertor routine.
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14433 >
2022-01-07 06:19:49 +00:00
d051854cca
treewide: drop mtypes/macros includes from main
...
These aren't required in lots of places, so remove them.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14127 >
2021-12-08 22:14:45 +00:00
81d22da6de
asahi: Fix BIND_PIPELINE sizing and alignment
...
Fix a bug in BIND_PIPELINE XML reported by Dougall, which cleans up
a bit of both decoder and driver.
Instead of...
* 17 bytes BIND_PIPELINE (17)
* An unused 8 byte record (25)
* A set of N 8 byte records (25 + 8 * N)
* Oops, 1 byte too many! One just disappeared (24 + 8 * N)
It seems to instead be
* 24 bytes BIND_PIPELINE (24)
* A set of N 8 byte records (24 + 8 * N)
without the sentinel record. These means the 8 byte records themselves
are shuffled, with the high byte of the pointers split from the low
word, but that's less gross than an off-by-one.
It's still not clear what the last 8 bytes of the BIND_VERTEX_PIPELINE
structure mean, or the last 4 byte of the BIND_FRAGMENT_PIPELINE
structure which seems to be a bit shorter.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784 >
2021-11-18 23:35:25 +00:00
3b108393a2
asahi: Remove obnoxious workaround
...
Now that we're not hardcoded any magic BO IDs, there is no minimum
number of allocations needed. Remove the unneeded -- and obnoxious --
workaround of allocating unused BOs on startup.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784 >
2021-11-18 23:35:25 +00:00
d55a1a77bd
asahi: Fix agx_map_* structures
...
Dougall Johnson observed these structures make more sense with indices[]
first in the entries and indices[] absent from the header. Then the
sentinel entry disappears, nr_entries makes more sense, and a few magic
numbers pop out. Many thanks to Dougall's astute eyes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784 >
2021-11-18 23:35:25 +00:00
30433ae716
asahi: Deflake addresses
...
Reported by Dougall.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784 >
2021-11-18 23:35:25 +00:00
df1824046a
asahi: Rename PANDECODE->AGXDECODE
...
Fix remnant of the Panfrost decoder fork.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784 >
2021-11-18 23:35:25 +00:00
a9ed4538ab
nir: add indirect loop unrolling to compiler options
...
This is where it should be rather than having to pass it into the
optimisation pass every time.
It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064 >
2021-08-03 10:54:50 +00:00
a3e0b3b912
asahi: Add integers to agx_vertex_formats
...
Handles all the easy cases.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 18:00:07 -04:00
3cd6f62388
agx: Shift vertex buffer stride in the compiler
...
Required to support non-32-bit vertex formats efficiently.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:57:19 -04:00
c7ba0fb04d
agx: Add agx_format_shift routine
...
Required to calculate alignments for vertex buffers correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:45:38 -04:00
96c98e0d25
agx: Define p_extract for type converts
...
Useful for grabbing the high 32-bit word of a 64-bit value.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:25:40 -04:00
3417ecb4d7
agx: Implement instanced arrays
...
Divide by instance divisor if needed. Same strategy as ACO.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:25:11 -04:00
538e3a3100
agx: Include divisors in the vertex shader key
...
Needed to lower the divisions.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:24:47 -04:00
0c353d47be
agx: Add udiv-by-constant routine
...
Uses the ridiculousfish algorithm, will be used to lower instanced
arrays into something efficient.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:24:02 -04:00
50a4c993fd
agx: Add agx_ushr helper
...
Syntax sugar for the underlying bitfield manipulation instruction.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:23:42 -04:00
3c1f754a71
agx: Handle load_instance_id
...
Preloaded into r6, as predicted.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 15:12:18 -04:00
3f5eebe5e6
agx: Drop dated /* TODO: RA */
...
We skip over vertex ID in RA now, it's fine.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 15:12:03 -04:00
465224379c
agx: Plug memory leak in register allocator
...
Fixes: 85e18deb18https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 15:00:22 -04:00
7848100f27
agx: Use consistent ncomps
...
Fixes register allocation failure in:
dEQP-GLES3.functional.ubo.single_basic_array.shared.row_major_mat4_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:55:16 -04:00
cce1a2fc19
agx: Dump register file when failing to allocate
...
Usually shows a bug.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:54:34 -04:00
5fb9159eb9
agx: Fix mismatched units in load_ubo
...
Fixes assertion failure in
dEQP-GLES3.functional.ubo.single_basic_type.shared.highp_float_fragment
Assertion failed: ((value & 1) == 0), function agx_print_sized, file
../src/asahi/compiler/agx_print.c, line 39.
Fixes: 033d4d09fchttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:39:44 -04:00
5deb7c26d6
agx: Don't set helper invocation kill bit
...
In the future we'll need data flow analysis similar to what we do in
panfrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:27:35 -04:00
1671022bf2
asahi: Identify texture dimension field
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 13:56:04 -04:00
23f5ad668f
asahi: Fix sampler filtering flag
...
Typo in the XML. Fixes broken filtering. Still chasing an off-by-one.
Fixes: cad54e2721https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 13:56:04 -04:00
f376a90d21
asahi: Identify texture address field
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 13:56:04 -04:00
dd98918a5a
agx: Flip point coordinates because OpenGL
...
Fixes dEQP-GLES2.functional.shaders.builtin_variable.pointcoord
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
3291779c21
asahi: Handle point coordinates
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
3d75cff7d7
asahi: Identify triangle/lines vs point varyings
...
Seems to allow skipping over point coords?
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
e2176490d6
asahi: Unpack varying descriptors (1x)
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
2468b123bb
asahi: Set bit for psiz
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
05dc72f863
asahi/decode: Print some IOGPU stuff
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-11 14:49:00 -04:00
da85e84206
asahi/decode: Print clear/store pipelines
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-11 14:48:59 -04:00
2f032283f8
asahi: Allocate global IDs
...
Use the same UABI as Metal. One less hack, trying to rule out possible
differences to Metal...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-11 14:48:59 -04:00
314324f320
asahi/decode: Fix decoding of draw calls
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-11 14:48:42 -04:00
ed4b3a5d17
asahi/decode: Handle CULL packets
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-10 12:34:40 -04:00
9854079d59
asahi/decode: Fix up high word
...
Not sure what's happening here, there's some magic for sure.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-10 12:34:40 -04:00
d5580ee805
asahi: Identify more unknown fields in the memmap
...
From validating the memory map of a Metal sample and seeing what goes wrong.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-10 12:05:34 -04:00
a9b8731fa1
asahi/decode: Check fewer zeroes after a command buffer
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-10 11:23:50 -04:00
0b35a8f81a
asahi: Make track_free safer
...
Ensure that we don't free the same BO multiple times, which can lead to later
segfaults in decode.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-10 11:16:56 -04:00
9b6ca87672
asahi/decode: Only dump mapped allocations
...
This matches the hardware's view of memory and helps catch spurious reads. (One
symptom of messing this up -- besides broken rendering -- is a kernel warning
about a "bogus texture handle 0".)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-10 11:04:45 -04:00
ea7892a74c
asahi: Remove unused bo_access property
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815 >
2021-07-10 11:01:25 -04:00
1d0008734c
agx: Ensure we don't overallocate registers
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
7e65e47d19
agx: Pipe in nir_register
...
This is kind of lazy...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
85e18deb18
agx: Assign registers locally
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
15b49a6795
agx: Count read registers as well
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
f03cecf05f
agx: Don't choke on registers in the optimizer
...
Just skip over them.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
01174fcec8
asahi: Use XML for interpolation packet
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
4c99510d3b
asahi: Identify attachment length field
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
b8bc5ed297
asahi: Use GenXML for main bind fragment
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
19bb9d278f
asahi: Extend IOGPU header to contain encoder
...
Let's squash together all the resulting zeroes. Trying to discern some structure out of this.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
c1d8ed1bc2
asahi: Move IOGPU header to XML
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
0b9e8181da
asahi: Identify "command buffer" size field in map
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
8e3f81ccc4
asahi: Add XML for the attachment structure
...
We need a lot more control over these magic structures to get Z/S attachments working correctly. This is an early start.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
18a34dc47e
asahi: Implement the stencil test
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
dc968a9bec
asahi: Prepack rasterizer faces
...
A bit more efficient and will allow easy implementation of the stencil test.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
0266cf86e9
asahi: Fix meson dependency on packing in compiler
...
Closes : #5030
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Fixes: 6a657b17b9https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
bee077f5e2
asahi: Identify vertex texture/sampler counts
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
50f012542f
agx: Handle txl
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
8361e24604
agx: Legalize LOD sources to be 16-bit only
...
I'm not convinced this is /right/ but it's a step.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
4891e51bf3
agx: Fix lod_mode shift
...
Was zero before so didn't notice the bug.
Fixes: 9f55538834https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
edd30fa1bd
agx: Pack LOD descriptors
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
e847bffbcc
agx: Fix LOD_MIN enum
...
Fixes: 2470a080d2https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
c99dfe6a0c
agx: Fix 32-bit bitwise shifts
...
Fixes dEQP-GLES2.functional.shaders.functions.qualifiers.const_int_fragment
Fixes: e50bae00f4https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
8ea262f508
asahi: Add ASAHI_MESA_DEBUG=no16 option
...
A lot of dEQP failures go away with 32-bit forced...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
5228be45b6
asahi: Generalize varying linking
...
Handles matrices now. Fixes
dEQP-GLES2.functional.shaders.matrix.add.dynamic_mediump_mat4_float_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
5049907ae1
asahi: Implement colour buffer reloads
...
Gets glmark2 -bdesktop working.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
0e0448d8df
asahi: Add internal (renderable) formats to the table
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
2ad59fc9ec
asahi: Handle Z16_UNORM textures
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
a1f732e67b
agx: Track logical control flow graph
...
Logic lifted from the Bifrost compiler, which was a copypaste of the Midgard
compiler, which was based on a faulty understanding of the v3d compiler,
which...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
a207c77314
agx: Lift agx_block_add_successor from Panfrost
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
2e1ba82060
agx: Count write registers, not components
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
0ef93554e1
agx: Mark sources that kill
...
Trivially computed during liveness analysis (already a byproduct!) and required
for efficient register allocation.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
7972e74f40
agx: Add liveness analysis pass
...
Based on the Panfrost one, scalarized and with some silly things fixed.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
ec40620f86
agx: Add agx_exit_block helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
ebd25e7ee7
agx: Pull out agx_write_components
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
f49ba0874a
asahi: Unify varying linking code with vertex shaders
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
6a657b17b9
agx: Remap fragment shader varyings explicitly
...
Needed to handle fragcoord.z correctly, for example. Step 1, at least.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
32f4be5dd7
agx: Rename agx_pack to agx_pack_binary
...
Conflicts with GenXML.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
bf8d1734fd
agx: Implement ld_vary_flat
...
Not clear what any of this is for but let's be nice and match the blob.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
3eab648d6b
agx: Implement nir_intrinsic_load_frag_coord
...
Depends on matching ABI.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
8457524238
agx: Rename remap_varyings -> remap_varyings_vs
...
Want to do the same for fragment shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
eabcf9f31e
asahi: Identify varying descriptor fields
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
3d3e4928b2
agx: Add ld_vary_flat opcode
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
10b8563966
agx: Update ld_vary encoding mask
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
99b67ab355
agx: Add perspective bit to ld_var
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
ef808205c6
agx: Add agx_immediate_f helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
be4d88a6ba
agx: Mark components as ASSERTED
...
Prevents a release build warning.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
6fe82e6c1e
asahi: Fix macOS macro.
...
Fixes: 26b19bda3055c0956fd0https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11569 >
2021-06-24 13:49:40 +00:00
1cbcfb8b38
nir, nir/algebraic: add byte/word insertion instructions
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151 >
2021-06-08 08:57:42 +00:00
0e2293a52b
agx: Handle load_back_face_agx
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
c21168a26c
agx: Lower front face to back face
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
75cafd8472
agx: Pack SR immediate
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
307b8f1b2f
agx: List sr enum in Python
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
cc8fec8b74
agx: Generate enums from Python
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
223476aff3
agx: Model get_sr
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
6899f002fa
asahi: Add mipmapping state to the XML
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
bf42d17a16
asahi: Flesh out the formats table
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
1b24a3e9e9
asahi: Add "hacks for dEQP" flag
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
e2e1d8160f
asahi: Add ETC2 formats to table
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
f690d1f7ab
asahi: Use pixel table in is_format_supported
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
8b1e273cb5
asahi: Scaffold format table
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
6bb7172622
asahi: Hide pixel formats behind an opaque type
...
Convenient for mapping a format table.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
022e482eaa
asahi: Add format enums
...
Split it up into the underlying parts. Now we can decode every format
accessible in Metal.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
eb5983b48e
asahi: Print unknown enum values
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
bfd5e52f16
asahi: Note that "render target" lacks an sRGB bit
...
sRGB is handled through other mechanisms.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
118682dd83
asahi: Identify line stride in texture/RT XML
...
The off-by-four is concerning.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
9c0ef01c68
asahi: Add layout enum to XML
...
Used for textures and render targets. There are more values here, probably for
other tiling schemes and compression.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
5c97d1c837
asahi: Implement wide lines
...
Identify line width field and route through the Gallium line width.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086 >
2021-06-01 01:31:02 +00:00
6fbc1cb52a
asahi: Update viewport descriptor depth fields
...
Acts like a translate/scale pair more generally, not specific to near/far
planes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084 >
2021-05-30 23:32:02 +00:00
9392e2b275
asahi: Add unknown bits seen with the GL driver
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084 >
2021-05-30 23:32:02 +00:00
5de49375ec
asahi: Expose PIPE_CAP_CLIP_HALFZ
...
Use the Zink lowering pass to handle the non-halfz case. Metal, like Vulkan,
uses half-z (and Metal is not configurable, making r/e tricky).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084 >
2021-05-30 23:32:01 +00:00
f99f7e70d7
asahi: Add scissor enable bit
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084 >
2021-05-30 23:32:01 +00:00
d7cbfd4f6c
asahi: Add "set scissor" command
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084 >
2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
Timothy Arceri
Alyssa Rosenzweig
Emma Anholt
Timur Kristóf
Dave Airlie
Vinson Lee
Rhys Perry