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Code Issues 9 Packages Projects Releases Wiki Activity

asahi: Support 2D array and 3D textures 

As far as I can tell, these *must* be tiled. Other than that, the
implementation is completely routine. Passes

dEQP-GLES3.functional.texture.format.unsized.*2d_array*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
This commit is contained in:
Alyssa Rosenzweig 2022-01-18 14:16:12 -05:00 committed by Marge Bot
parent 204e2ffe1b
commit a8bf729f8a
3 changed files with 16 additions and 5 deletions
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2
src/asahi/lib/cmdbuf.xml
View File

@ -212,6 +212,8 @@
<field name="sRGB" size="1" start="108" type="bool"/>
<field name="Unk 2" size="1" start="109" type="bool"/>
<field name="Stride" size="18" start="110" type="hex" modifier="shr(4)"/>
<!-- Note that 3D/arrays cannot be linear. -->
<field name="Depth" size="14" start="110" type="uint" modifier="minus(1)" default="1"/>
</struct>
<enum name="Wrap">

4
src/gallium/drivers/asahi/agx_pipe.c
View File

@ -191,7 +191,7 @@ agx_resource_create(struct pipe_screen *screen,
/* Arrays and cubemaps have the entire miptree duplicated and page aligned (16K) */
nresource->array_stride = ALIGN_POT(offset, 0x4000);
unsigned size = nresource->array_stride * templ->array_size;
unsigned size = nresource->array_stride * templ->array_size * templ->depth0;
pipe_reference_init(&nresource->base.reference, 1);
@ -763,7 +763,7 @@ agx_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return is_deqp ? 1 : 0;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
return is_deqp ? 256 : 0;
return 256;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:

15
src/gallium/drivers/asahi/agx_state.c
View File

@ -463,6 +463,10 @@ agx_create_sampler_view(struct pipe_context *pctx,
unsigned level = state->u.tex.first_level;
assert(state->u.tex.first_layer == 0);
/* Must tile array textures */
assert((rsrc->modifier != DRM_FORMAT_MOD_LINEAR) ||
(state->u.tex.last_layer == state->u.tex.first_layer));
/* Pack the descriptor into GPU memory */
agx_pack(so->desc->ptr.cpu, TEXTURE, cfg) {
cfg.dimension = agx_translate_texture_dimension(state->target);
@ -480,6 +484,11 @@ agx_create_sampler_view(struct pipe_context *pctx,
cfg.unk_mipmapped = rsrc->mipmapped;
cfg.unk_2 = false;
if (state->target == PIPE_TEXTURE_3D)
cfg.depth = u_minify(texture->depth0, level);
else
cfg.depth = state->u.tex.last_layer - state->u.tex.first_layer + 1;
cfg.stride = (rsrc->modifier == DRM_FORMAT_MOD_LINEAR) ?
(rsrc->slices[level].line_stride - 16) :
AGX_RT_STRIDE_TILED;
@ -726,9 +735,9 @@ agx_set_framebuffer_state(struct pipe_context *pctx,
const struct util_format_description *desc =
util_format_description(surf->format);
unsigned level = surf->u.tex.level;
unsigned layer = surf->u.tex.first_layer;
assert(surf->u.tex.first_layer == 0);
assert(surf->u.tex.last_layer == 0);
assert(surf->u.tex.last_layer == layer);
agx_pack(ctx->render_target[i], RENDER_TARGET, cfg) {
cfg.layout = agx_translate_layout(tex->modifier);
@ -740,7 +749,7 @@ agx_set_framebuffer_state(struct pipe_context *pctx,
cfg.width = state->width;
cfg.height = state->height;
cfg.level = surf->u.tex.level;
cfg.buffer = tex->bo->ptr.gpu;
cfg.buffer = tex->bo->ptr.gpu + layer * tex->array_stride;
if (tex->mipmapped)
cfg.unk_55 = 0x8;