mesa/src/compiler/nir
Jason Ekstrand fa717a202c docs,nir: Document NIR texture instructions
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11775>
2021-07-23 15:53:57 +00:00
..
tests nir: Free the instructions in a DCE instr removal. 2021-07-06 11:24:48 -07:00
README
meson.build nir: Add nir_lower_image() to lower cube image sizes 2021-07-21 11:02:15 -07:00
nir.c nir: Add a format field to _deref image intrinsics 2021-07-20 23:18:22 +00:00
nir.h docs,nir: Document NIR texture instructions 2021-07-23 15:53:57 +00:00
nir_algebraic.py
nir_builder.h nir: add nir_imm_ivec3 builder 2021-07-21 13:57:14 +00:00
nir_builder_opcodes_h.py nir: fix intrinsic builders on MSVC C++ 2020-11-27 10:51:54 +00:00
nir_builtin_builder.c nir: Fix MSVC warning C4334 (32bit shift cast to 64bit) 2021-04-20 00:28:34 +00:00
nir_builtin_builder.h nir/builder: Move clamp helpers to nir_builder.h 2021-05-04 22:51:34 +00:00
nir_clone.c nir: Drop nir_ssa_def::name and nir_register::name 2021-07-08 17:34:41 +00:00
nir_constant_expressions.h
nir_constant_expressions.py nir: Temporarily disable optimizations for MSVC ARM64 2021-03-21 21:41:41 +00:00
nir_control_flow nir: Add read_invocation_cond_ir3 intrinsic 2021-07-08 16:02:41 +00:00
nir_control_flow.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_control_flow.h nir/lower_returns: Append missing phis' sources after "break" insertion 2020-11-02 14:12:21 +00:00
nir_control_flow_private.h
nir_conversion_builder.h nir: Update saturated float->int/uint conversion algorithm 2021-01-05 19:46:25 +00:00
nir_convert_ycbcr.c
nir_deref.c nir: Drop nir_ssa_def::name and nir_register::name 2021-07-08 17:34:41 +00:00
nir_deref.h nir/deref: add helpers to lazily create paths 2020-11-20 13:57:34 +00:00
nir_divergence_analysis.c nir: Add AMD specific intrinsics for NGG shader based culling. 2021-07-13 23:56:33 +00:00
nir_dominance.c
nir_format_convert.h nir/format_convert: add ssa version of uint packing 2021-07-07 13:41:37 +00:00
nir_from_ssa.c nir: Better document the Boissinot algorithm in nir_from_ssa() 2021-07-16 06:19:25 +00:00
nir_gather_info.c nir/gather_info: Rename per_vertex to is_arrayed 2021-06-09 07:35:57 +00:00
nir_gather_ssa_types.c nir: Add a nir_src_is_undef() helper, like nir_src_is_const(). 2021-03-03 00:51:44 +00:00
nir_gather_xfb_info.c
nir_gs_count_vertices.c nir: Add ability to count primitives per stream. 2020-10-09 15:26:14 +02:00
nir_inline_functions.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_inline_helpers.h nir: fix build at -O1 2021-02-26 21:54:53 +00:00
nir_inline_uniforms.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_instr_set.c nir: use a single set during CSE 2021-06-15 17:57:07 +00:00
nir_instr_set.h nir: use a single set during CSE 2021-06-15 17:57:07 +00:00
nir_intrinsics.py nir: Add a format field to _deref image intrinsics 2021-07-20 23:18:22 +00:00
nir_intrinsics_c.py nir: make intrinsic order in nir_print consistent 2020-11-26 17:50:38 +00:00
nir_intrinsics_h.py nir: use a single canonical list of intrinsic indices 2020-11-26 17:50:38 +00:00
nir_intrinsics_indices_h.py nir: use a single canonical list of intrinsic indices 2020-11-26 17:50:38 +00:00
nir_linking_helpers.c nir/linker: add option to ignore the IO precisions for better varying packing 2021-05-15 09:58:27 +02:00
nir_liveness.c nir: Add a nir_src_is_undef() helper, like nir_src_is_const(). 2021-03-03 00:51:44 +00:00
nir_loop_analyze.c nir/loop_analyze: initialize loop variables on demand 2020-11-20 13:57:34 +00:00
nir_loop_analyze.h
nir_lower_alpha_test.c nir: use intrinsic builders 2021-01-06 14:34:41 +00:00
nir_lower_alu.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_alu_to_scalar.c nir,amd: Suffix nir_op_cube_face_coord/index with _amd 2021-06-21 09:03:34 -05:00
nir_lower_amul.c
nir_lower_array_deref_of_vec.c nir: Make nir_ssa_def_rewrite_uses_after take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_atomics_to_ssbo.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_bit_size.c nir: Make nir_ssa_def_rewrite_uses_after take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_bitmap.c nir: Use sized types for nir_tex_instr::dest_type 2021-01-25 11:21:48 +01:00
nir_lower_blend.c nir: Add blend lowering pass 2021-05-07 17:25:21 +00:00
nir_lower_blend.h Convert a few files to UTF-8 2021-07-12 23:45:34 +00:00
nir_lower_bool_to_bitsize.c nir/lower_bool: Rewrite dest_type for boolean destinations 2021-01-25 11:21:42 +01:00
nir_lower_bool_to_float.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_bool_to_int32.c nir/lower_bool: Rewrite dest_type for boolean destinations 2021-01-25 11:21:42 +01:00
nir_lower_clamp_color_outputs.c
nir_lower_clip.c nir: Update clip_distance_array_size in clip lowering. 2021-03-26 20:51:18 +00:00
nir_lower_clip_cull_distance_arrays.c nir: Rename nir_is_per_vertex_io to nir_is_arrayed_io 2021-05-14 16:17:45 +00:00
nir_lower_clip_disable.c nir/lower_clip_disable: Fix store writemask 2021-04-26 17:07:02 +00:00
nir_lower_clip_halfz.c
nir_lower_convert_alu_types.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_discard_or_demote.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_double_ops.c
nir_lower_drawpixels.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_fb_read.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_flatshade.c
nir_lower_flrp.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_fp16_conv.c nir: lower 64-bit floats to 32-bit first. 2021-03-22 12:17:14 +10:00
nir_lower_fragcolor.c nir/lower_fragcolor: Avoid redundant load_output 2021-06-09 02:58:08 +00:00
nir_lower_fragcoord_wtrans.c compiler/nir: check whether var is an input in lower_fragcoord_wtrans 2021-05-14 13:26:13 +00:00
nir_lower_frexp.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_global_vars_to_local.c
nir_lower_goto_ifs.c
nir_lower_gs_intrinsics.c nir: use intrinsic builders 2020-11-26 17:50:38 +00:00
nir_lower_idiv.c nir/lower_idiv: make lowered divisions exact 2021-04-12 16:19:46 +00:00
nir_lower_image.c nir/lower_image: Handle index and bindless image_size 2021-07-22 14:22:35 -05:00
nir_lower_indirect_derefs.c nir: add nir_lower_indirect_builtin_uniform_derefs() 2021-03-23 14:44:48 +00:00
nir_lower_input_attachments.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_int64.c Convert most remaining free-form fall-through comments to FALLTHROUGH 2021-04-15 16:01:22 +00:00
nir_lower_int_to_float.c nir/lower_int_to_float: Make sure the cursor is in the right spot. 2021-06-18 04:30:43 +00:00
nir_lower_interpolation.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_io.c nir: Drop nir_ssa_def::name and nir_register::name 2021-07-08 17:34:41 +00:00
nir_lower_io_arrays_to_elements.c nir/lower_io: Rename vertex_index to array_index in helpers 2021-06-09 07:35:57 +00:00
nir_lower_io_to_scalar.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_io_to_temporaries.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_io_to_vector.c nir/lower_io_to_vector: fix per vertex io handling for arrays 2021-05-21 02:43:30 +00:00
nir_lower_is_helper_invocation.c nir: add lowering pass for helperInvocationEXT() 2021-04-19 17:11:36 +00:00
nir_lower_load_const_to_scalar.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_locals_to_regs.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_mediump.c nir: add many passes that lower and optimize 16-bit input/outputs and samplers 2021-04-13 05:07:42 +00:00
nir_lower_memcpy.c nir: Make nir_deref_instr::mode a bitfield 2020-11-03 22:18:28 +00:00
nir_lower_memory_model.c nir: handle float atomics in nir_lower_memory_model 2021-05-12 11:09:07 +00:00
nir_lower_multiview.c nir: Add image atomic_fmin/fmax intrinsics 2021-03-18 00:13:40 +00:00
nir_lower_non_uniform_access.c nir/lower_non_uniform: allow lowering with vec2 handles 2021-04-27 15:56:07 +00:00
nir_lower_packing.c nir/lower_packing: use shader_instructions_pass 2021-06-29 22:08:29 +00:00
nir_lower_passthrough_edgeflags.c i965: Use nir_lower_passthrough_edgeflags 2021-06-11 21:19:06 +00:00
nir_lower_patch_vertices.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_phis_to_scalar.c nir/lower_phis_to_scalar: Add "lower_all" option 2021-05-17 09:59:45 +00:00
nir_lower_pntc_ytransform.c nir: Make nir_ssa_def_rewrite_uses_after take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_point_size.c
nir_lower_point_size_mov.c nir/lower_point_size_mov: zero nir_state_slot::swizzle in new variable 2021-07-20 16:34:51 +00:00
nir_lower_printf.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_readonly_images_to_tex.c nir_lower_readonly_images: Clear variable data when changing the type 2021-07-02 04:24:22 +00:00
nir_lower_regs_to_ssa.c nir: Drop nir_ssa_def::name and nir_register::name 2021-07-08 17:34:41 +00:00
nir_lower_returns.c nir/lower_returns: Deal with single-arg phis after if. 2021-06-08 11:29:53 +00:00
nir_lower_samplers.c
nir_lower_scratch.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_shader_calls.c intel: struct bitset is renamed to brw_bitset 2021-06-28 21:12:24 +03:00
nir_lower_ssbo.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_subgroups.c nir/lower_subgroups: Handle down-casts in uint_to_ballot_type 2021-07-21 16:41:56 +00:00
nir_lower_system_values.c nir: Move workgroup_size and workgroup_variable_size into common shader_info 2021-06-08 09:23:55 -07:00
nir_lower_tex.c nir/lower_tex: Add a lower_txs_cube_array option 2021-07-22 14:22:35 -05:00
nir_lower_texcoord_replace.c compiler/nir: Increment shader input count and mark as used when adding new gl_PointCoord 2021-03-09 21:24:35 +00:00
nir_lower_to_source_mods.c nir: add nir_ssa_def_is_unused() 2021-03-01 17:38:10 +00:00
nir_lower_two_sided_color.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_ubo_vec4.c nir: Set access at lower_ubo_vec4 2021-03-17 01:09:30 +00:00
nir_lower_undef_to_zero.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_uniforms_to_ubo.c nir: Generate load_ubo_vec4 directly for !PIPE_CAP_NATIVE_INTEGERS 2021-04-16 21:58:00 +00:00
nir_lower_var_copies.c
nir_lower_variable_initializers.c nir: Move workgroup_size and workgroup_variable_size into common shader_info 2021-06-08 09:23:55 -07:00
nir_lower_vars_to_ssa.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_vec3_to_vec4.c nir: Make nir_ssa_def_rewrite_uses_after take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_vec_to_movs.c nir: Add and use a new nir_ssa_def_rewrite_uses_src helper 2021-03-08 16:59:55 +00:00
nir_lower_viewport_transform.c nir/lower_viewport_transform: Allow geom/tess 2021-03-07 17:57:04 +00:00
nir_lower_wpos_center.c nir: Make nir_ssa_def_rewrite_uses_after take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_wpos_ytransform.c nir: Make nir_ssa_def_rewrite_uses_after take an SSA value 2021-03-08 16:59:55 +00:00
nir_lower_wrmasks.c
nir_metadata.c nir: Introduce nir_metadata_instr_index for nir_index_instr() being current. 2020-10-20 08:53:36 -07:00
nir_move_vec_src_uses_to_dest.c
nir_normalize_cubemap_coords.c
nir_opcodes.py nir: Add new opcode for ternary addition 2021-07-16 15:59:55 +00:00
nir_opcodes_c.py
nir_opcodes_h.py
nir_opt_access.c nir: Add image atomic_fmin/fmax intrinsics 2021-03-18 00:13:40 +00:00
nir_opt_algebraic.py nir: Add optimizations for iadd3 2021-07-16 15:59:56 +00:00
nir_opt_barriers.c
nir_opt_combine_stores.c nir: Add lowered vendor independent raytracing intrinsics. 2021-06-21 21:23:51 +00:00
nir_opt_comparison_pre.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_conditional_discard.c nir: Add nir_intrinsic_terminate and nir_intrinsic_terminate_if 2020-10-15 21:40:09 +00:00
nir_opt_constant_folding.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_copy_prop_vars.c nir: Add lowered vendor independent raytracing intrinsics. 2021-06-21 21:23:51 +00:00
nir_opt_copy_propagate.c nir: Add a helper for chasing movs with nir_ssa_scalar(). 2021-06-28 16:26:24 +00:00
nir_opt_cse.c nir/cse: resize the instruction set 2021-06-15 17:57:07 +00:00
nir_opt_dce.c nir/dce: perform DCE for unlooped instructions in a single pass 2021-02-24 09:58:59 +00:00
nir_opt_dead_cf.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_dead_write_vars.c nir: Add lowered vendor independent raytracing intrinsics. 2021-06-21 21:23:51 +00:00
nir_opt_find_array_copies.c nir/find_array_copies: Don't assume all children exist 2020-11-04 05:57:07 +00:00
nir_opt_gcm.c nir/gcm: be less destructive with instruction order 2021-07-21 14:24:00 +00:00
nir_opt_idiv_const.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_if.c nir: Drop nir_ssa_def::name and nir_register::name 2021-07-08 17:34:41 +00:00
nir_opt_intrinsics.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_large_constants.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_load_store_vectorize.c nir/opt_load_store_vectorize: fix check_for_robustness() with deref access 2021-06-28 15:15:42 +00:00
nir_opt_loop_unroll.c nir/loop_unroll: fix is_indirect_load() with load_global 2021-04-12 20:28:57 +00:00
nir_opt_memcpy.c
nir_opt_move.c
nir_opt_move_discards_to_top.c nir: Add a discard optimization pass 2021-05-19 18:04:44 +00:00
nir_opt_offsets.c nir/unsigned_upper_bound: don't require dominance metadata 2021-06-04 14:14:00 +00:00
nir_opt_peephole_select.c nir: Drop nir_ssa_def::name and nir_register::name 2021-07-08 17:34:41 +00:00
nir_opt_phi_precision.c nir: Add pass to lower phi precision 2021-06-29 23:27:28 +00:00
nir_opt_rematerialize_compares.c
nir_opt_remove_phis.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_shrink_vectors.c nir: Shrink vectors for load_shared. 2021-03-17 12:42:23 +00:00
nir_opt_sink.c nir/sink,nir/move: sink/move reorderable load_ssbo 2021-01-21 18:07:03 +00:00
nir_opt_trivial_continues.c
nir_opt_undef.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_opt_uniform_atomics.c nir: Move workgroup_size and workgroup_variable_size into common shader_info 2021-06-08 09:23:55 -07:00
nir_opt_vectorize.c nir: add nir_ssa_def_is_unused() 2021-03-01 17:38:10 +00:00
nir_phi_builder.c nir: add nir_block_get_predecessors_sorted() helper 2021-04-12 18:17:19 +00:00
nir_phi_builder.h
nir_print.c nir: Suffix all the MCS texture stuff _intel 2021-07-23 15:53:57 +00:00
nir_propagate_invariant.c nir/propagate_invariant: add invariant_prim option 2021-06-21 15:13:05 +00:00
nir_range_analysis.c amd: Add extra source to the mbcnt_amd NIR intrinsic. 2021-06-09 16:48:51 +00:00
nir_range_analysis.h nir/range_analysis: Add "is a number" range analysis tracking 2021-03-11 22:00:30 +00:00
nir_remove_dead_variables.c nir: Two shared memory *blocks* may alias each other 2021-01-27 22:20:53 +00:00
nir_repair_ssa.c nir: Make nir_deref_instr::mode a bitfield 2020-11-03 22:18:28 +00:00
nir_schedule.c nir: Add nir_intrinsic_terminate and nir_intrinsic_terminate_if 2020-10-15 21:40:09 +00:00
nir_schedule.h
nir_search.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_search.h nir/search: Constify instruction parameter to search helpers 2021-03-03 18:32:14 +00:00
nir_search_helpers.h nir/algebraic: Tautology replacements require sources be numbers 2021-05-20 01:39:35 +00:00
nir_serialize.c nir: Validate after deserialization. 2021-07-15 18:43:42 +00:00
nir_serialize.h
nir_split_per_member_structs.c nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
nir_split_var_copies.c
nir_split_vars.c nir: Make nir_ssa_def_rewrite_uses_after take an SSA value 2021-03-08 16:59:55 +00:00
nir_sweep.c
nir_to_lcssa.c nir/lcssa: fix nondeterminism in predecessor iteration 2021-04-12 18:17:19 +00:00
nir_validate.c nir: Add a format field to _deref image intrinsics 2021-07-20 23:18:22 +00:00
nir_vla.h
nir_vulkan.h
nir_worklist.c nir: Add a nir_instr_remove that recursively removes dead code. 2021-07-06 11:24:43 -07:00
nir_worklist.h nir: Add a nir_instr_remove that recursively removes dead code. 2021-07-06 11:24:43 -07:00
nir_xfb_info.h

README

New IR, or NIR, is an IR for Mesa intended to sit below GLSL IR and Mesa IR.
Its design inherits from the various IRs that Mesa has used in the past, as
well as Direct3D assembly, and it includes a few new ideas as well. It is a
flat (in terms of using instructions instead of expressions), typeless IR,
similar to TGSI and Mesa IR.  It also supports SSA (although it doesn't require
it).

Variables
=========

NIR includes support for source-level GLSL variables through a structure mostly
copied from GLSL IR. These will be used for linking and conversion from GLSL IR
(and later, from an AST), but for the most part, they will be lowered to
registers (see below) and loads/stores.

Registers
=========

Registers are light-weight; they consist of a structure that only contains its
size, its index for liveness analysis, and an optional name for debugging. In
addition, registers can be local to a function or global to the entire shader;
the latter will be used in ARB_shader_subroutine for passing parameters and
getting return values from subroutines. Registers can also be an array, in which
case they can be accessed indirectly. Each ALU instruction (add, subtract, etc.)
works directly with registers or SSA values (see below).

SSA
========

Everywhere a register can be loaded/stored, an SSA value can be used instead.
The only exception is that arrays/indirect addressing are not supported with
SSA; although research has been done on extensions of SSA to arrays before, it's
usually for the purpose of parallelization (which we're not interested in), and
adds some overhead in the form of adding copies or extra arrays (which is much
more expensive than introducing copies between non-array registers). SSA uses
point directly to their corresponding definition, which in turn points to the
instruction it is part of. This creates an implicit use-def chain and avoids the
need for an external structure for each SSA register.

Functions
=========

Support for function calls is mostly similar to GLSL IR. Each shader contains a
list of functions, and each function has a list of overloads. Each overload
contains a list of parameters, and may contain an implementation which specifies
the variables that correspond to the parameters and return value. Inlining a
function, assuming it has a single return point, is as simple as copying its
instructions, registers, and local variables into the target function and then
inserting copies to and from the new parameters as appropriate. After functions
are inlined and any non-subroutine functions are deleted, parameters and return
variables will be converted to global variables and then global registers. We
don't do this lowering earlier (i.e. the fortranizer idea) for a few reasons:

- If we want to do optimizations before link time, we need to have the function
signature available during link-time.

- If we do any inlining before link time, then we might wind up with the
inlined function and the non-inlined function using the same global
variables/registers which would preclude optimization.

Intrinsics
=========

Any operation (other than function calls and textures) which touches a variable
or is not referentially transparent is represented by an intrinsic. Intrinsics
are similar to the idea of a "builtin function," i.e. a function declaration
whose implementation is provided by the backend, except they are more powerful
in the following ways:

- They can also load and store registers when appropriate, which limits the
number of variables needed in later stages of the IR while obviating the need
for a separate load/store variable instruction.

- Intrinsics can be marked as side-effect free, which permits them to be
treated like any other instruction when it comes to optimizations. This allows
load intrinsics to be represented as intrinsics while still being optimized
away by dead code elimination, common subexpression elimination, etc.

Intrinsics are used for:

- Atomic operations
- Memory barriers
- Subroutine calls
- Geometry shader emitVertex and endPrimitive
- Loading and storing variables (before lowering)
- Loading and storing uniforms, shader inputs and outputs, etc (after lowering)
- Copying variables (cases where in GLSL the destination is a structure or
array)
- The kitchen sink
- ...

Textures
=========

Unfortunately, there are far too many texture operations to represent each one
of them with an intrinsic, so there's a special texture instruction similar to
the GLSL IR one. The biggest difference is that, while the texture instruction
has a sampler dereference field used just like in GLSL IR, this gets lowered to
a texture unit index (with a possible indirect offset) while the type
information of the original sampler is kept around for backends. Also, all the
non-constant sources are stored in a single array to make it easier for
optimization passes to iterate over all the sources.

Control Flow
=========

Like in GLSL IR, control flow consists of a tree of "control flow nodes", which
include if statements and loops, and jump instructions (break, continue, and
return). Unlike GLSL IR, though, the leaves of the tree aren't statements but
basic blocks. Each basic block also keeps track of its successors and
predecessors, and function implementations keep track of the beginning basic
block (the first basic block of the function) and the ending basic block (a fake
basic block that every return statement points to). Together, these elements
make up the control flow graph, in this case a redundant piece of information on
top of the control flow tree that will be used by almost all the optimizations.
There are helper functions to add and remove control flow nodes that also update
the control flow graph, and so usually it doesn't need to be touched by passes
that modify control flow nodes.