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Convert most remaining free-form fall-through comments to FALLTHROUGH 

One exception is src/amd/addrlib/, for which -Wimplicit-fallthrough is
explicitly disabled.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10220>
This commit is contained in:
Michel Dänzer 2021-04-10 17:11:58 +02:00 committed by Marge Bot
parent 96f0f46350
commit 2928c21eb7
147 changed files with 307 additions and 286 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/amd/compiler/aco_lower_to_hw_instr.cpp
View File

@ -701,7 +701,7 @@ void emit_reduction(lower_context *ctx, aco_opcode op, ReduceOp reduce_op, unsig
bld.writelane(Definition(PhysReg{tmp+i}, v1), identity[i], Operand(0u), Operand(PhysReg{tmp+i}, v1));
}
}
/* fall through */
FALLTHROUGH;
case aco_opcode::p_inclusive_scan:
assert(cluster_size == ctx->program->wave_size);
if (ctx->program->chip_class <= GFX7) {

2
src/amd/vulkan/radv_nir_lower_ycbcr_textures.c
View File

@ -114,7 +114,7 @@ create_plane_tex_instr_implicit(struct ycbcr_state *state, uint32_t plane)
nir_src_for_ssa(implicit_downsampled_coords(state, old_tex->src[i].src.ssa));
break;
}
/* fall through */
FALLTHROUGH;
default:
nir_src_copy(&tex->src[i].src, &old_tex->src[i].src, tex);
break;

2
src/amd/vulkan/radv_nir_to_llvm.c
View File

@ -1084,7 +1084,7 @@ radv_emit_stream_output(struct radv_shader_context *ctx, LLVMValueRef const *so_
case 2: /* as v2i32 */
case 3: /* as v4i32 (aligned to 4) */
out[3] = LLVMGetUndef(ctx->ac.i32);
/* fall through */
FALLTHROUGH;
case 4: /* as v4i32 */
vdata = ac_build_gather_values(&ctx->ac, out,
!ac_has_vec3_support(ctx->ac.chip_class, false)

4
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
View File

@ -48,7 +48,7 @@ radv_amdgpu_surface_sanity(const struct ac_surf_info *surf_info, const struct ra
case RADEON_SURF_TYPE_1D:
if (surf_info->height > 1)
return -EINVAL;
/* fall through */
FALLTHROUGH;
case RADEON_SURF_TYPE_2D:
case RADEON_SURF_TYPE_CUBEMAP:
if (surf_info->depth > 1 || surf_info->array_size > 1)
@ -61,7 +61,7 @@ radv_amdgpu_surface_sanity(const struct ac_surf_info *surf_info, const struct ra
case RADEON_SURF_TYPE_1D_ARRAY:
if (surf_info->height > 1)
return -EINVAL;
/* fall through */
FALLTHROUGH;
case RADEON_SURF_TYPE_2D_ARRAY:
if (surf_info->depth > 1)
return -EINVAL;

4
src/compiler/glsl/ast_to_hir.cpp
View File

@ -2448,7 +2448,7 @@ get_type_name_for_precision_qualifier(const glsl_type *type)
case GLSL_TYPE_ATOMIC_UINT:
return "atomic_uint";
case GLSL_TYPE_IMAGE:
/* fallthrough */
FALLTHROUGH;
case GLSL_TYPE_SAMPLER: {
const unsigned type_idx =
type->sampler_array + 2 * type->sampler_shadow;
@ -4183,7 +4183,7 @@ apply_type_qualifier_to_variable(const struct ast_type_qualifier *qual,
case GLSL_TYPE_IMAGE:
if (state->has_bindless())
break;
/* fallthrough */
FALLTHROUGH;
default:
_mesa_glsl_error(loc, state, "illegal type for a varying variable");
break;

2
src/compiler/glsl/builtin_variables.cpp
View File

@ -1482,7 +1482,7 @@ builtin_variable_generator::add_varying(int slot, const glsl_type *type,
case MESA_SHADER_TESS_EVAL:
case MESA_SHADER_GEOMETRY:
this->per_vertex_in.add_field(slot, type, precision, name, interp);
/* FALLTHROUGH */
FALLTHROUGH;
case MESA_SHADER_VERTEX:
this->per_vertex_out.add_field(slot, type, precision, name, interp);
break;

2
src/compiler/glsl/glsl_parser_extras.cpp
View File

@ -475,7 +475,7 @@ _mesa_glsl_parse_state::process_version_directive(YYLTYPE *locp, int version,
case API_OPENGLES:
assert(!"Should not get here.");
/* FALLTHROUGH */
FALLTHROUGH;
case API_OPENGLES2:
this->language_version = 100;

2
src/compiler/glsl/glsl_to_nir.cpp
View File

@ -1543,7 +1543,7 @@ nir_visitor::visit(ir_call *ir)
}
case nir_intrinsic_vote_ieq:
instr->num_components = 1;
/* fall-through */
FALLTHROUGH;
case nir_intrinsic_vote_any:
case nir_intrinsic_vote_all: {
nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);

2
src/compiler/glsl/linker.cpp
View File

@ -3864,7 +3864,7 @@ add_shader_variable(const struct gl_context *ctx,
}
return true;
}
/* fallthrough */
FALLTHROUGH;
}
default: {

2
src/compiler/glsl/lower_if_to_cond_assign.cpp
View File

@ -158,7 +158,7 @@ check_ir_node(ir_instruction *ir, void *data)
if (deref->array_index->ir_type != ir_type_constant)
v->found_dynamic_arrayref = true;
} /* fall-through */
} FALLTHROUGH;
case ir_type_expression:
case ir_type_dereference_record:
if (v->is_then)

2
src/compiler/glsl_types.cpp
View File

@ -2848,7 +2848,7 @@ glsl_type::count_dword_slots(bool is_bindless) const
case GLSL_TYPE_SAMPLER:
if (!is_bindless)
return 0;
/* FALLTHROUGH */
FALLTHROUGH;
case GLSL_TYPE_DOUBLE:
case GLSL_TYPE_UINT64:
case GLSL_TYPE_INT64:

3
src/compiler/nir/nir_gather_info.c
View File

@ -321,8 +321,7 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
case nir_intrinsic_demote:
case nir_intrinsic_demote_if:
shader->info.fs.uses_demote = true;
FALLTHROUGH;
/* fallthrough - quads with helper lanes only might be discarded entirely */
FALLTHROUGH; /* quads with helper lanes only might be discarded entirely */
case nir_intrinsic_discard:
case nir_intrinsic_discard_if:
/* Freedreno uses the discard_if intrinsic to end GS invocations that

2
src/compiler/nir/nir_lower_int64.c
View File

@ -1054,7 +1054,7 @@ should_lower_int64_alu_instr(const nir_alu_instr *alu,
break;
case nir_op_f2u64:
case nir_op_f2i64:
/* fall-through */
FALLTHROUGH;
default:
assert(alu->dest.dest.is_ssa);
if (alu->dest.dest.ssa.bit_size != 64)

2
src/compiler/spirv/spirv_to_nir.c
View File

@ -2301,7 +2301,7 @@ vtn_mem_semantics_to_nir_mem_semantics(struct vtn_builder *b,
break;
case SpvMemorySemanticsSequentiallyConsistentMask:
/* Fall through. Treated as AcquireRelease in Vulkan. */
FALLTHROUGH; /* Treated as AcquireRelease in Vulkan. */
case SpvMemorySemanticsAcquireReleaseMask:
nir_semantics = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE;
break;

2
src/egl/drivers/dri2/platform_android.c
View File

@ -1120,7 +1120,7 @@ droid_get_buffers_parse_attachments(struct dri2_egl_surface *dri2_surf,
break;
}
/* fall through for pbuffers */
FALLTHROUGH; /* for pbuffers */
case __DRI_BUFFER_DEPTH:
case __DRI_BUFFER_STENCIL:
case __DRI_BUFFER_ACCUM:

2
src/freedreno/ir3/ir3.c
View File

@ -137,7 +137,7 @@ should_double_threadsize(struct ir3_shader_variant *v,
return false;
}
}
/* fallthrough */
FALLTHROUGH;
case MESA_SHADER_FRAGMENT: {
/* Check that doubling the threadsize wouldn't exceed the regfile size */
return regs_count * 2 <= compiler->reg_size_vec4;

6
src/freedreno/ir3/ir3_compiler_nir.c
View File

@ -1883,7 +1883,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
break;
case nir_intrinsic_load_sample_id:
ctx->so->per_samp = true;
/* fall-thru */
FALLTHROUGH;
case nir_intrinsic_load_sample_id_no_per_sample:
if (!ctx->samp_id) {
ctx->samp_id = create_sysval_input(ctx, SYSTEM_VALUE_SAMPLE_ID, 0x1);
@ -2337,7 +2337,7 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
ctx->so->num_sampler_prefetch++;
break;
}
/* fallthru */
FALLTHROUGH;
case nir_texop_tex: opc = has_lod ? OPC_SAML : OPC_SAM; break;
case nir_texop_txb: opc = OPC_SAMB; break;
case nir_texop_txl: opc = OPC_SAML; break;
@ -3267,7 +3267,7 @@ setup_output(struct ir3_context *ctx, nir_intrinsic_instr *intr)
case VARYING_SLOT_PRIMITIVE_ID:
case VARYING_SLOT_GS_VERTEX_FLAGS_IR3:
debug_assert(ctx->so->type == MESA_SHADER_GEOMETRY);
/* fall through */
FALLTHROUGH;
case VARYING_SLOT_COL0:
case VARYING_SLOT_COL1:
case VARYING_SLOT_BFC0:

3
src/freedreno/rnn/rnndec.c
View File

@ -30,6 +30,7 @@
#include <stdlib.h>
#include <inttypes.h>
#include "util.h"
#include "util/compiler.h"
struct rnndeccontext *rnndec_newcontext(struct rnndb *db) {
struct rnndeccontext *res = calloc (sizeof *res, 1);
@ -266,7 +267,7 @@ char *rnndec_decodeval(struct rnndeccontext *ctx, struct rnntypeinfo *ti, uint64
ctx->colors->reset);
break;
}
/* fallthrough */
FALLTHROUGH;
case RNN_TTYPE_UFIXED:
asprintf (&res, "%s%lf%s", ctx->colors->num,
((double)value) / ((double)(1LL << ti->radix)),

4
src/freedreno/vulkan/tu_clear_blit.c
View File

@ -956,13 +956,13 @@ copy_format(VkFormat format, VkImageAspectFlags aspect_mask, bool copy_buffer)
case VK_FORMAT_G8_B8R8_2PLANE_420_UNORM:
if (aspect_mask == VK_IMAGE_ASPECT_PLANE_1_BIT)
return VK_FORMAT_R8G8_UNORM;
/* fallthrough */
FALLTHROUGH;
case VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM:
return VK_FORMAT_R8_UNORM;
case VK_FORMAT_D24_UNORM_S8_UINT:
if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT && copy_buffer)
return VK_FORMAT_R8_UNORM;
/* fallthrough */
FALLTHROUGH;
default:
return format;
case VK_FORMAT_E5B9G9R9_UFLOAT_PACK32:

2
src/freedreno/vulkan/tu_descriptor_set.c
View File

@ -1008,7 +1008,7 @@ tu_CreateDescriptorUpdateTemplate(
immutable_samplers =
tu_immutable_samplers(set_layout, binding_layout) + entry->dstArrayElement;
}
/* fallthrough */
FALLTHROUGH;
default:
dst_offset = binding_layout->offset / 4;
dst_offset += (binding_layout->size * entry->dstArrayElement) / 4;

2
src/freedreno/vulkan/tu_image.c
View File

@ -688,7 +688,7 @@ tu_CreateImage(VkDevice _device,
switch (layout->nr_samples) {
case 4:
width *= 2;
/* fallthru */
FALLTHROUGH;
case 2:
height *= 2;
break;

4
src/freedreno/vulkan/tu_pipeline.c
View File

@ -174,7 +174,7 @@ tu6_emit_load_state(struct tu_pipeline *pipeline, bool compute)
base = MAX_SETS;
offset = (layout->set[i].dynamic_offset_start +
binding->dynamic_offset_offset) * A6XX_TEX_CONST_DWORDS;
/* fallthrough */
FALLTHROUGH;
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
@ -206,7 +206,7 @@ tu6_emit_load_state(struct tu_pipeline *pipeline, bool compute)
base = MAX_SETS;
offset = (layout->set[i].dynamic_offset_start +
binding->dynamic_offset_offset) * A6XX_TEX_CONST_DWORDS;
/* fallthrough */
FALLTHROUGH;
case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER: {
tu_foreach_stage(stage, stages) {
emit_load_state(&cs, tu6_stage2opcode(stage), ST6_UBO,

2
src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c
View File

@ -2209,7 +2209,7 @@ lp_build_sample_common(struct lp_build_sample_context *bld,
switch (mip_filter) {
default:
assert(0 && "bad mip_filter value in lp_build_sample_soa()");
/* fall-through */
FALLTHROUGH;
case PIPE_TEX_MIPFILTER_NONE:
/* always use mip level 0 */
first_level = bld->dynamic_state->first_level(bld->dynamic_state,

3
src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
View File

@ -33,6 +33,7 @@
*/
#include <inttypes.h> /* for PRIx64 macro */
#include "util/compiler.h"
#include "util/u_debug.h"
#include "lp_bld_type.h"
@ -407,7 +408,7 @@ lp_build_swizzle_aos(struct lp_build_context *bld,
switch (swizzles[i]) {
default:
assert(0);
/* fall through */
FALLTHROUGH;
case PIPE_SWIZZLE_X:
case PIPE_SWIZZLE_Y:
case PIPE_SWIZZLE_Z:

2
src/gallium/drivers/d3d12/d3d12_resource.cpp
View File

@ -177,7 +177,7 @@ init_texture(struct d3d12_screen *screen,
case PIPE_TEXTURE_CUBE:
case PIPE_TEXTURE_CUBE_ARRAY:
desc.DepthOrArraySize *= 6;
/* fall-through */
FALLTHROUGH;
case PIPE_TEXTURE_2D:
case PIPE_TEXTURE_2D_ARRAY:
case PIPE_TEXTURE_RECT:

2
src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
View File

@ -300,7 +300,7 @@ main(int argc, char **argv)
break;
default:
printf("unrecognized arg: %c\n", opt);
/* fallthrough */
FALLTHROUGH;
case 'h':
print_usage();
return 0;

6
src/gallium/drivers/i915/i915_fpc_emit.c
View File

@ -201,13 +201,13 @@ uint i915_emit_texld( struct i915_fp_compile *p,
switch(num_coord) {
case 0:
ignore |= (0xf << UREG_CHANNEL_X_SHIFT);
/* fall-through */
FALLTHROUGH;
case 1:
ignore |= (0xf << UREG_CHANNEL_Y_SHIFT);
/* fall-through */
FALLTHROUGH;
case 2:
ignore |= (0xf << UREG_CHANNEL_Z_SHIFT);
/* fall-through */
FALLTHROUGH;
case 3:
ignore |= (0xf << UREG_CHANNEL_W_SHIFT);
}

8
src/gallium/drivers/i915/i915_fpc_translate.c
View File

@ -237,7 +237,7 @@ src_vector(struct i915_fp_compile *p,
case TGSI_FILE_IMMEDIATE:
assert(index < p->num_immediates);
index = p->immediates_map[index];
/* fall-through */
FALLTHROUGH;
case TGSI_FILE_CONSTANT:
src = UREG(REG_TYPE_CONST, index);
break;
@ -338,17 +338,17 @@ translate_tex_src_target(struct i915_fp_compile *p, uint tex)
{
switch (tex) {
case TGSI_TEXTURE_SHADOW1D:
/* fall-through */
FALLTHROUGH;
case TGSI_TEXTURE_1D:
return D0_SAMPLE_TYPE_2D;
case TGSI_TEXTURE_SHADOW2D:
/* fall-through */
FALLTHROUGH;
case TGSI_TEXTURE_2D:
return D0_SAMPLE_TYPE_2D;
case TGSI_TEXTURE_SHADOWRECT:
/* fall-through */
FALLTHROUGH;
case TGSI_TEXTURE_RECT:
return D0_SAMPLE_TYPE_2D;

8
src/gallium/drivers/i915/i915_screen.c
View File

@ -312,12 +312,12 @@ i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
{
switch(cap) {
case PIPE_CAPF_MAX_LINE_WIDTH:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
return 7.5;
case PIPE_CAPF_MAX_POINT_WIDTH:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
return 255.0;
@ -328,9 +328,9 @@ i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
return 16.0;
case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
return 0.0f;

2
src/gallium/drivers/iris/iris_resolve.c
View File

@ -999,7 +999,7 @@ iris_resource_render_aux_usage(struct iris_context *ice,
render_format)) {
return res->aux.usage;
}
/* fallthrough */
FALLTHROUGH;
default:
return ISL_AUX_USAGE_NONE;

6
src/gallium/drivers/iris/iris_state.c
View File

@ -3584,9 +3584,9 @@ iris_create_vertex_elements(struct pipe_context *ctx,
VFCOMP_STORE_SRC, VFCOMP_STORE_SRC };
switch (isl_format_get_num_channels(fmt.fmt)) {
case 0: comp[0] = VFCOMP_STORE_0; /* fallthrough */
case 1: comp[1] = VFCOMP_STORE_0; /* fallthrough */
case 2: comp[2] = VFCOMP_STORE_0; /* fallthrough */
case 0: comp[0] = VFCOMP_STORE_0; FALLTHROUGH;
case 1: comp[1] = VFCOMP_STORE_0; FALLTHROUGH;
case 2: comp[2] = VFCOMP_STORE_0; FALLTHROUGH;
case 3:
comp[3] = isl_format_has_int_channel(fmt.fmt) ? VFCOMP_STORE_1_INT
: VFCOMP_STORE_1_FP;

8
src/gallium/drivers/lima/ir/gp/codegen.c
View File

@ -114,7 +114,7 @@ static void gpir_codegen_mul0_slot(gpir_codegen_instr *code, gpir_instr *instr)
case gpir_op_neg:
code->mul0_neg = true;
/* fallthrough */
FALLTHROUGH;
case gpir_op_mov:
code->mul0_src0 = gpir_get_alu_input(node, alu->children[0]);
code->mul0_src1 = gpir_codegen_src_ident;
@ -174,7 +174,7 @@ static void gpir_codegen_mul1_slot(gpir_codegen_instr *code, gpir_instr *instr)
case gpir_op_neg:
code->mul1_neg = true;
/* fallthrough */
FALLTHROUGH;
case gpir_op_mov:
code->mul1_src0 = gpir_get_alu_input(node, alu->children[0]);
code->mul1_src1 = gpir_codegen_src_ident;
@ -267,7 +267,7 @@ static void gpir_codegen_add0_slot(gpir_codegen_instr *code, gpir_instr *instr)
case gpir_op_neg:
code->acc0_src0_neg = true;
/* fallthrough */
FALLTHROUGH;
case gpir_op_mov:
code->acc_op = gpir_codegen_acc_op_add;
code->acc0_src0 = gpir_get_alu_input(node, alu->children[0]);
@ -352,7 +352,7 @@ static void gpir_codegen_add1_slot(gpir_codegen_instr *code, gpir_instr *instr)
case gpir_op_neg:
code->acc1_src0_neg = true;
/* fallthrough */
FALLTHROUGH;
case gpir_op_mov:
code->acc_op = gpir_codegen_acc_op_add;
code->acc1_src0 = gpir_get_alu_input(node, alu->children[0]);

6
src/gallium/drivers/llvmpipe/lp_bld_interp.c
View File

@ -324,7 +324,7 @@ attribs_update_simple(struct lp_build_interp_soa_context *bld,
index = lp_build_const_int32(gallivm, chan);
switch (interp) {
case LP_INTERP_PERSPECTIVE:
/* fall-through */
FALLTHROUGH;
case LP_INTERP_LINEAR:
if (attrib == 0 && chan == 0) {
@ -462,7 +462,7 @@ lp_build_interp_soa_indirect(struct lp_build_interp_soa_context *bld,
dst_type.length = 1;
switch (interp) {
case LP_INTERP_PERSPECTIVE:
/* fall-through */
FALLTHROUGH;
case LP_INTERP_LINEAR:
dadx = lp_build_gather(gallivm, coeff_bld->type.length,
@ -605,7 +605,7 @@ lp_build_interp_soa(struct lp_build_interp_soa_context *bld,
switch (interp) {
case LP_INTERP_PERSPECTIVE:
/* fall-through */
FALLTHROUGH;
case LP_INTERP_LINEAR:
dadx = lp_build_extract_broadcast(gallivm, setup_bld->type,
coeff_bld->type, bld->dadxaos[attrib],

2
src/gallium/drivers/llvmpipe/lp_setup_point.c
View File

@ -240,7 +240,7 @@ setup_point_coefficients( struct lp_setup_context *setup,
case LP_INTERP_LINEAR:
/* Sprite tex coords may use linear interpolation someday */
/* fall-through */
FALLTHROUGH;
case LP_INTERP_PERSPECTIVE: {
/* check if the sprite coord flag is set for this attribute.
* If so, set it up so it up so x and y vary from 0 to 1.

4
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
View File

@ -439,7 +439,7 @@ ImmediateValue::applyLog2()
case TYPE_S16:
case TYPE_S32:
assert(!this->isNegative());
// fall through
FALLTHROUGH;
case TYPE_U8:
case TYPE_U16:
case TYPE_U32:
@ -447,7 +447,7 @@ ImmediateValue::applyLog2()
break;
case TYPE_S64:
assert(!this->isNegative());
// fall through
FALLTHROUGH;
case TYPE_U64:
reg.data.u64 = util_logbase2_64(reg.data.u64);
break;

2
src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
View File

@ -590,7 +590,7 @@ BuildUtil::split64BitOpPostRA(Function *fn, Instruction *i,
hTy = TYPE_U32;
break;
}
/* fallthrough */
FALLTHROUGH;
default:
return NULL;
}

6
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
View File

@ -221,9 +221,9 @@ CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
uint8_t n;
switch (rnd) {
case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
case ROUND_MI: rint = true; FALLTHROUGH; case ROUND_M: n = 1; break;
case ROUND_PI: rint = true; FALLTHROUGH; case ROUND_P: n = 2; break;
case ROUND_ZI: rint = true; FALLTHROUGH; case ROUND_Z: n = 3; break;
default:
rint = rnd == ROUND_NI;
n = 0;

2
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
View File

@ -2222,7 +2222,7 @@ Converter::visit(nir_intrinsic_instr *insn)
break;
case nir_intrinsic_bindless_image_samples:
mask = 0x8;
/* fallthrough */
FALLTHROUGH;
case nir_intrinsic_image_samples:
ty = TYPE_U32;
bindless = op == nir_intrinsic_bindless_image_samples;

10
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
View File

@ -1360,7 +1360,7 @@ bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
break;
case TGSI_SEMANTIC_PATCH:
info_out->numPatchConstants = MAX2(info_out->numPatchConstants, si + 1);
/* fallthrough */
FALLTHROUGH;
case TGSI_SEMANTIC_TESSOUTER:
case TGSI_SEMANTIC_TESSINNER:
info_out->out[i].patch = 1;
@ -2066,7 +2066,7 @@ Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
arrayid = code->tempArrayId[idx];
adjustTempIndex(arrayid, idx, idx2d);
}
/* fallthrough */
FALLTHROUGH;
default:
return getArrayForFile(src.getFile(), idx2d)->load(
sub.cur->values, idx, swz, shiftAddress(ptr));
@ -3335,7 +3335,7 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
break;
case TGSI_OPCODE_UCMP:
srcTy = TYPE_U32;
/* fallthrough */
FALLTHROUGH;
case TGSI_OPCODE_CMP:
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
src0 = fetchSrc(0, c);
@ -3411,7 +3411,7 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
mkOp1(OP_BREV, TYPE_U32, val0, val0);
mkOp1(OP_BFIND, TYPE_U32, val0, val0)->subOp = NV50_IR_SUBOP_BFIND_SAMT;
src1 = val0;
/* fallthrough */
FALLTHROUGH;
case TGSI_OPCODE_READ_INVOC:
if (tgsi.getOpcode() == TGSI_OPCODE_READ_INVOC)
src1 = fetchSrc(1, 0);
@ -3542,7 +3542,7 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
/* handle user clip planes for each emitted vertex */
if (info_out->io.genUserClip > 0)
handleUserClipPlanes();
/* fallthrough */
FALLTHROUGH;
case TGSI_OPCODE_ENDPRIM:
{
// get vertex stream (must be immediate)

2
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
View File

@ -2913,7 +2913,7 @@ NVC0LoweringPass::handleRDSV(Instruction *i)
i->setSrc(0, bld.mkImm(sv == SV_GRIDID ? 0 : 1));
return true;
}
// Fallthrough
FALLTHROUGH;
case SV_WORK_DIM:
addr += prog->driver->prop.cp.gridInfoBase;
bld.mkLoad(TYPE_U32, i->getDef(0),

6
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
View File

@ -592,7 +592,7 @@ ConstantFolding::expr(Instruction *i,
res.data.s32 = ((int64_t)a->data.s32 * b->data.s32) >> 32;
break;
}
/* fallthrough */
FALLTHROUGH;
case TYPE_U32:
if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) {
res.data.u32 = ((uint64_t)a->data.u32 * b->data.u32) >> 32;
@ -834,7 +834,7 @@ ConstantFolding::expr(Instruction *i,
res.data.s32 = ((int64_t)a->data.s32 * b->data.s32 >> 32) + c->data.s32;
break;
}
/* fallthrough */
FALLTHROUGH;
case TYPE_U32:
if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) {
res.data.u32 = ((uint64_t)a->data.u32 * b->data.u32 >> 32) + c->data.u32;
@ -1193,7 +1193,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
if (imm0.isInteger(0) && s == 0 && typeSizeof(i->dType) == 8 &&
!isFloatType(i->dType))
break;
/* fallthrough */
FALLTHROUGH;
case OP_ADD:
if (i->usesFlags())
break;

6
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
View File

@ -54,7 +54,7 @@ TargetNVC0::getBuiltinCode(const uint32_t **code, uint32_t *size) const
*size = sizeof(gk104_builtin_code);
break;
}
/* fall-through for GK20A */
FALLTHROUGH; /* for GK20A */
case 0xf0:
case 0x100:
*code = (const uint32_t *)&gk110_builtin_code[0];
@ -76,7 +76,7 @@ TargetNVC0::getBuiltinOffset(int builtin) const
case 0xe0:
if (chipset < NVISA_GK20A_CHIPSET)
return gk104_builtin_offsets[builtin];
/* fall-through for GK20A */
FALLTHROUGH; /* for GK20A */
case 0xf0:
case 0x100:
return gk110_builtin_offsets[builtin];
@ -579,7 +579,7 @@ int TargetNVC0::getLatency(const Instruction *i) const
case OP_LOAD:
if (i->src(0).getFile() == FILE_MEMORY_CONST)
return 9;
// fall through
FALLTHROUGH;
case OP_VFETCH:
return 24;
default:

2
src/gallium/drivers/nouveau/nv30/nv30_texture.c
View File

@ -240,7 +240,7 @@ nv30_sampler_view_create(struct pipe_context *pipe, struct pipe_resource *pt,
break;
case PIPE_TEXTURE_CUBE:
so->fmt |= NV30_3D_TEX_FORMAT_CUBIC;
/* fallthrough */
FALLTHROUGH;
case PIPE_TEXTURE_2D:
case PIPE_TEXTURE_RECT:
so->fmt |= NV30_3D_TEX_FORMAT_DIMS_2D;

4
src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c
View File

@ -100,7 +100,7 @@ emit_src(struct nvfx_fpc *fpc, int pos, struct nvfx_src src)
break;
case NVFXSR_OUTPUT:
sr |= NVFX_FP_REG_SRC_HALF;
/* fall-through */
FALLTHROUGH;
case NVFXSR_TEMP:
sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT);
sr |= (src.reg.index << NVFX_FP_REG_SRC_SHIFT);
@ -173,7 +173,7 @@ emit_dst(struct nvfx_fpc *fpc, struct nvfx_reg dst)
hw[0] |= NVFX_FP_OP_OUT_REG_HALF;
dst.index <<= 1;
}
/* fall-through */
FALLTHROUGH;
case NVFXSR_TEMP:
if (fpc->num_regs < (dst.index + 1))
fpc->num_regs = dst.index + 1;

3
src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
View File

@ -2,6 +2,7 @@
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_state.h"
#include "util/compiler.h"
#include "util/u_dynarray.h"
#include "util/u_debug.h"
#include "util/u_memory.h"
@ -844,7 +845,7 @@ nvfx_vertprog_parse_decl_output(struct nvfx_vpc *vpc,
case TGSI_SEMANTIC_GENERIC:
/* this is really an identifier for VP/FP linkage */
semantic_index += 8;
/* fall through */
FALLTHROUGH;
case TGSI_SEMANTIC_TEXCOORD:
for (i = 0; i < num_texcoords; i++) {
if (vpc->vp->texcoord[i] == semantic_index) {

2
src/gallium/drivers/nouveau/nv50/nv50_miptree.c
View File

@ -99,7 +99,7 @@ nv50_mt_choose_storage_type(struct nv50_miptree *mt, bool compressed)
default:
/* Most color formats don't work with compression. */
compressed = false;
/* fallthrough */
FALLTHROUGH;
case PIPE_FORMAT_R8G8B8A8_UNORM:
case PIPE_FORMAT_R8G8B8A8_SRGB:
case PIPE_FORMAT_R8G8B8X8_UNORM:

2
src/gallium/drivers/nouveau/nv50/nv50_query_hw.c
View File

@ -240,7 +240,7 @@ nv50_hw_end_query(struct nv50_context *nv50, struct nv50_query *q)
break;
case PIPE_QUERY_TIMESTAMP:
hq->sequence++;
/* fall through */
FALLTHROUGH;
case PIPE_QUERY_TIME_ELAPSED:
nv50_hw_query_get(push, q, 0, 0x00005002);
break;

2
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View File

@ -400,7 +400,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
debug_printf("%s: unhandled cap %d\n", __func__, param);
debug_cap_printed[param] = true;
}
/* fallthrough */
FALLTHROUGH;
/* caps where we want the default value */
case PIPE_CAP_DMABUF:
case PIPE_CAP_ESSL_FEATURE_LEVEL:

2
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
View File

@ -466,7 +466,7 @@ nvc0_hw_get_query_result_resource(struct nvc0_context *nvc0,
case PIPE_QUERY_TIME_ELAPSED:
case PIPE_QUERY_TIMESTAMP:
qoffset = 8;
/* fallthrough */
FALLTHROUGH;
default:
assert(index == 0);
stride = 1;

2
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View File

@ -438,7 +438,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
debug_printf("%s: unhandled cap %d\n", __func__, param);
debug_cap_printed[param] = true;
}
/* fallthrough */
FALLTHROUGH;
/* caps where we want the default value */
case PIPE_CAP_DMABUF:
case PIPE_CAP_ESSL_FEATURE_LEVEL:

4
src/gallium/drivers/panfrost/pan_screen.c
View File

@ -429,13 +429,13 @@ panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
switch (param) {
case PIPE_CAPF_MAX_LINE_WIDTH:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
return 255.0; /* arbitrary */
case PIPE_CAPF_MAX_POINT_WIDTH:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
return 1024.0;

10
src/gallium/drivers/r300/compiler/r300_fragprog_emit.c
View File

@ -43,6 +43,8 @@
#include "radeon_program_pair.h"
#include "r300_fragprog_swizzle.h"
#include "util/compiler.h"
struct r300_emit_state {
struct r300_fragment_program_compiler * compiler;
@ -112,9 +114,9 @@ static unsigned int translate_rgb_opcode(struct r300_fragment_program_compiler *
case RC_OPCODE_FRC: return R300_ALU_OUTC_FRC;
default:
error("translate_rgb_opcode: Unknown opcode %s", rc_get_opcode_info(opcode)->Name);
/* fall through */
FALLTHROUGH;
case RC_OPCODE_NOP:
/* fall through */
FALLTHROUGH;
case RC_OPCODE_MAD: return R300_ALU_OUTC_MAD;
case RC_OPCODE_MAX: return R300_ALU_OUTC_MAX;
case RC_OPCODE_MIN: return R300_ALU_OUTC_MIN;
@ -134,9 +136,9 @@ static unsigned int translate_alpha_opcode(struct r300_fragment_program_compiler
case RC_OPCODE_LG2: return R300_ALU_OUTA_LG2;
default:
error("translate_rgb_opcode: Unknown opcode %s", rc_get_opcode_info(opcode)->Name);
/* fall through */
FALLTHROUGH;
case RC_OPCODE_NOP:
/* fall through */
FALLTHROUGH;
case RC_OPCODE_MAD: return R300_ALU_OUTA_MAD;
case RC_OPCODE_MAX: return R300_ALU_OUTA_MAX;
case RC_OPCODE_MIN: return R300_ALU_OUTA_MIN;

6
src/gallium/drivers/r300/compiler/r3xx_vertprog.c
View File

@ -35,6 +35,8 @@
#include "radeon_emulate_loops.h"
#include "radeon_remove_constants.h"
#include "util/compiler.h"
/*
* Take an already-setup and valid source then swizzle it appropriately to
* obtain a constant ZERO or ONE source.
@ -60,7 +62,7 @@ static unsigned long t_dst_class(rc_register_file file)
switch (file) {
default:
fprintf(stderr, "%s: Bad register file %i\n", __FUNCTION__, file);
/* fall-through */
FALLTHROUGH;
case RC_FILE_TEMPORARY:
return PVS_DST_REG_TEMPORARY;
case RC_FILE_OUTPUT:
@ -84,7 +86,7 @@ static unsigned long t_src_class(rc_register_file file)
switch (file) {
default:
fprintf(stderr, "%s: Bad register file %i\n", __FUNCTION__, file);
/* fall-through */
FALLTHROUGH;
case RC_FILE_NONE:
case RC_FILE_TEMPORARY:
return PVS_SRC_REG_TEMPORARY;

6
src/gallium/drivers/r300/compiler/r500_fragprog.c
View File

@ -34,6 +34,8 @@
#include "radeon_variable.h"
#include "r300_reg.h"
#include "util/compiler.h"
/**
* Rewrite IF instructions to use the ALU result special register.
*/
@ -138,13 +140,13 @@ int r500_transform_IF(
break;
case RC_OPCODE_SLE:
reverse_srcs = 1;
/* Fall through */
FALLTHROUGH;
case RC_OPCODE_SGE:
compare_func = RC_COMPARE_FUNC_GEQUAL;
break;
case RC_OPCODE_SGT:
reverse_srcs = 1;
/* Fall through */
FALLTHROUGH;
case RC_OPCODE_SLT:
compare_func = RC_COMPARE_FUNC_LESS;
break;

10
src/gallium/drivers/r300/compiler/r500_fragprog_emit.c
View File

@ -45,6 +45,8 @@
#include "radeon_program_pair.h"
#include "util/compiler.h"
#define PROG_CODE \
struct r500_fragment_program_code *code = &c->code->code.r500
@ -101,9 +103,9 @@ static unsigned int translate_rgb_op(struct r300_fragment_program_compiler *c, r
case RC_OPCODE_FRC: return R500_ALU_RGBA_OP_FRC;
default:
error("translate_rgb_op: unknown opcode %s\n", rc_get_opcode_info(opcode)->Name);
/* fall through */
FALLTHROUGH;
case RC_OPCODE_NOP:
/* fall through */
FALLTHROUGH;
case RC_OPCODE_MAD: return R500_ALU_RGBA_OP_MAD;
case RC_OPCODE_MAX: return R500_ALU_RGBA_OP_MAX;
case RC_OPCODE_MIN: return R500_ALU_RGBA_OP_MIN;
@ -126,9 +128,9 @@ static unsigned int translate_alpha_op(struct r300_fragment_program_compiler *c,
case RC_OPCODE_LG2: return R500_ALPHA_OP_LN2;
default:
error("translate_alpha_op: unknown opcode %s\n", rc_get_opcode_info(opcode)->Name);
/* fall through */
FALLTHROUGH;
case RC_OPCODE_NOP:
/* fall through */
FALLTHROUGH;
case RC_OPCODE_MAD: return R500_ALPHA_OP_MAD;
case RC_OPCODE_MAX: return R500_ALPHA_OP_MAX;
case RC_OPCODE_MIN: return R500_ALPHA_OP_MIN;

8
src/gallium/drivers/r300/compiler/radeon_opcodes.c
View File

@ -30,6 +30,8 @@
#include "radeon_program_constants.h"
#include "util/compiler.h"
struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
{
.Opcode = RC_OPCODE_NOP,
@ -576,7 +578,7 @@ void rc_compute_sources_for_writemask(
case RC_OPCODE_TXP:
case RC_OPCODE_TXL:
srcmasks[0] |= RC_MASK_W;
/* Fall through */
FALLTHROUGH;
case RC_OPCODE_TEX:
switch (inst->U.I.TexSrcTarget) {
case RC_TEXTURE_1D:
@ -598,7 +600,7 @@ void rc_compute_sources_for_writemask(
switch (inst->U.I.TexSrcTarget) {
case RC_TEXTURE_1D_ARRAY:
srcmasks[0] |= RC_MASK_Y;
/* Fall through. */
FALLTHROUGH;
case RC_TEXTURE_1D:
srcmasks[0] |= RC_MASK_X;
srcmasks[1] |= RC_MASK_X;
@ -606,7 +608,7 @@ void rc_compute_sources_for_writemask(
break;
case RC_TEXTURE_2D_ARRAY:
srcmasks[0] |= RC_MASK_Z;
/* Fall through. */
FALLTHROUGH;
case RC_TEXTURE_2D:
case RC_TEXTURE_RECT:
srcmasks[0] |= RC_MASK_XY;

4
src/gallium/drivers/r300/compiler/radeon_pair_translate.c
View File

@ -30,6 +30,8 @@
#include "radeon_compiler.h"
#include "radeon_compiler_util.h"
#include "util/compiler.h"
/**
* Finally rewrite ADD, MOV, MUL as the appropriate native instruction
@ -120,7 +122,7 @@ static void classify_instruction(struct rc_sub_instruction * inst,
break;
case RC_OPCODE_DP4:
*needalpha = 1;
/* fall through */
FALLTHROUGH;
case RC_OPCODE_DP3:
*needrgb = 1;
break;

6
src/gallium/drivers/r300/r300_emit.c
View File

@ -686,13 +686,13 @@ static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 3) * 4);
OUT_CS_RELOC(r300->query_current);
/* fallthrough */
FALLTHROUGH;
case 3:
/* pipe 2 only */
OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 2) * 4);
OUT_CS_RELOC(r300->query_current);
/* fallthrough */
FALLTHROUGH;
case 2:
/* pipe 1 only */
/* As mentioned above, accommodate RV380 and older. */
@ -700,7 +700,7 @@ static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
1 << (caps->high_second_pipe ? 3 : 1));
OUT_CS_REG(R300_ZB_ZPASS_ADDR, (query->num_results + 1) * 4);
OUT_CS_RELOC(r300->query_current);
/* fallthrough */
FALLTHROUGH;
case 1:
/* pipe 0 only */
OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);

2
src/gallium/drivers/r300/r300_state_derived.c
View File

@ -683,7 +683,7 @@ static uint32_t r300_get_border_color(enum pipe_format format,
border_swizzled[0] = border_swizzled[0] < 0 ?
border_swizzled[0]*0.5+1 :
border_swizzled[0]*0.5;
/* fallthrough. */
FALLTHROUGH;
case PIPE_FORMAT_RGTC1_UNORM:
case PIPE_FORMAT_LATC1_UNORM:

4
src/gallium/drivers/r300/r300_texture.c
View File

@ -274,7 +274,7 @@ uint32_t r300_translate_texformat(enum pipe_format format,
case PIPE_FORMAT_RGTC1_SNORM:
case PIPE_FORMAT_LATC1_SNORM:
result |= sign_bit[0];
/* fallthrough */
FALLTHROUGH;
case PIPE_FORMAT_LATC1_UNORM:
case PIPE_FORMAT_RGTC1_UNORM:
return R500_TX_FORMAT_ATI1N | result;
@ -282,7 +282,7 @@ uint32_t r300_translate_texformat(enum pipe_format format,
case PIPE_FORMAT_RGTC2_SNORM:
case PIPE_FORMAT_LATC2_SNORM:
result |= sign_bit[1] | sign_bit[0];
/* fallthrough */
FALLTHROUGH;
case PIPE_FORMAT_RGTC2_UNORM:
case PIPE_FORMAT_LATC2_UNORM:
return R400_TX_FORMAT_ATI2N | result;

4
src/gallium/drivers/r300/r300_tgsi_to_rc.c
View File

@ -30,6 +30,8 @@
#include "tgsi/tgsi_scan.h"
#include "tgsi/tgsi_util.h"
#include "util/compiler.h"
static unsigned translate_opcode(unsigned opcode)
{
switch(opcode) {
@ -135,7 +137,7 @@ static unsigned translate_register_file(unsigned file)
case TGSI_FILE_OUTPUT: return RC_FILE_OUTPUT;
default:
fprintf(stderr, "Unhandled register file: %i\n", file);
/* fall-through */
FALLTHROUGH;
case TGSI_FILE_TEMPORARY: return RC_FILE_TEMPORARY;
case TGSI_FILE_ADDRESS: return RC_FILE_ADDRESS;
}

4
src/gallium/drivers/r600/eg_debug.c
View File

@ -256,7 +256,7 @@ static uint32_t *ac_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
COLOR_RESET "\n");
break;
}
/* fallthrough *//* print all dwords */
FALLTHROUGH; /* print all dwords */
default:
for (i = 0; i < count+1; i++) {
print_spaces(f, INDENT_PKT);
@ -305,7 +305,7 @@ static void eg_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id,
num_dw--;
break;
}
/* fall through */
FALLTHROUGH;
default:
fprintf(f, "Unknown packet type %i\n", type);
return;

4
src/gallium/drivers/r600/r600_buffer_common.c
View File

@ -116,7 +116,7 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
switch (res->b.b.usage) {
case PIPE_USAGE_STREAM:
res->flags = RADEON_FLAG_GTT_WC;
/* fall through */
FALLTHROUGH;
case PIPE_USAGE_STAGING:
/* Transfers are likely to occur more often with these
* resources. */
@ -131,7 +131,7 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
res->flags |= RADEON_FLAG_GTT_WC;
break;
}
/* fall through */
FALLTHROUGH;
case PIPE_USAGE_DEFAULT:
case PIPE_USAGE_IMMUTABLE:
default:

2
src/gallium/drivers/r600/r600_pipe.c
View File

@ -571,7 +571,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_COMPUTE:
if (rscreen->b.family >= CHIP_CEDAR)
break;
/* fallthrough */
FALLTHROUGH;
default:
return 0;
}

4
src/gallium/drivers/r600/r600_query.c
View File

@ -837,7 +837,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
break;
case PIPE_QUERY_TIME_ELAPSED:
va += 8;
/* fall through */
FALLTHROUGH;
case PIPE_QUERY_TIMESTAMP:
r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS,
0, EOP_DATA_SEL_TIMESTAMP, NULL, va,
@ -1125,7 +1125,7 @@ static void r600_get_hw_query_params(struct r600_common_context *rctx,
case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
params->pair_count = R600_MAX_STREAMS;
params->pair_stride = 32;
/* fallthrough */
FALLTHROUGH;
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
params->start_offset = 0;
params->end_offset = 16;

14
src/gallium/drivers/r600/r600_shader.c
View File

@ -524,11 +524,11 @@ static int tgsi_is_supported(struct r600_shader_ctx *ctx)
ctx->type == PIPE_SHADER_TESS_CTRL ||
ctx->type == PIPE_SHADER_TESS_EVAL)
break;
/* fallthrough */
FALLTHROUGH;
case TGSI_FILE_OUTPUT:
if (ctx->type == PIPE_SHADER_TESS_CTRL)
break;
/* fallthrough */
FALLTHROUGH;
default:
R600_ERR("unsupported src %d (file %d, dimension %d)\n", j,
i->Src[j].Register.File,
@ -8188,7 +8188,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
/* fall through */
FALLTHROUGH;
case TGSI_TEXTURE_2D:
case TGSI_TEXTURE_SHADOW2D:
@ -8209,7 +8209,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
/* fall through */
FALLTHROUGH;
case TGSI_TEXTURE_1D:
case TGSI_TEXTURE_SHADOW1D:
@ -8233,7 +8233,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
switch (inst->Texture.Texture) {
case TGSI_TEXTURE_3D:
offset_z = ctx->literals[4 * inst->TexOffsets[0].Index + inst->TexOffsets[0].SwizzleZ] << 1;
/* fallthrough */
FALLTHROUGH;
case TGSI_TEXTURE_2D:
case TGSI_TEXTURE_SHADOW2D:
case TGSI_TEXTURE_RECT:
@ -8241,7 +8241,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
case TGSI_TEXTURE_2D_ARRAY:
case TGSI_TEXTURE_SHADOW2D_ARRAY:
offset_y = ctx->literals[4 * inst->TexOffsets[0].Index + inst->TexOffsets[0].SwizzleY] << 1;
/* fallthrough */
FALLTHROUGH;
case TGSI_TEXTURE_1D:
case TGSI_TEXTURE_SHADOW1D:
case TGSI_TEXTURE_1D_ARRAY:
@ -10444,7 +10444,7 @@ static inline int callstack_update_max_depth(struct r600_shader_ctx *ctx,
* elements */
elements += 2;
/* fallthrough */
FALLTHROUGH;
/* FIXME: do the two elements added above cover the cases for the
* r8xx+ below? */

6
src/gallium/drivers/r600/r600_state_common.c
View File

@ -2822,7 +2822,7 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
case PIPE_FORMAT_RGTC1_SNORM:
case PIPE_FORMAT_LATC1_SNORM:
word4 |= sign_bit[0];
/* fallthrough */
FALLTHROUGH;
case PIPE_FORMAT_RGTC1_UNORM:
case PIPE_FORMAT_LATC1_UNORM:
result = FMT_BC4;
@ -2830,7 +2830,7 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
case PIPE_FORMAT_RGTC2_SNORM:
case PIPE_FORMAT_LATC2_SNORM:
word4 |= sign_bit[0] | sign_bit[1];
/* fallthrough */
FALLTHROUGH;
case PIPE_FORMAT_RGTC2_UNORM:
case PIPE_FORMAT_LATC2_UNORM:
result = FMT_BC5;
@ -2876,7 +2876,7 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
goto out_word4;
case PIPE_FORMAT_BPTC_RGB_FLOAT:
word4 |= sign_bit[0] | sign_bit[1] | sign_bit[2];
/* fall through */
FALLTHROUGH;
case PIPE_FORMAT_BPTC_RGB_UFLOAT:
result = FMT_BC6;
goto out_word4;

2
src/gallium/drivers/r600/radeon_uvd.c
View File

@ -1051,7 +1051,7 @@ struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
return vl_create_mpeg12_decoder(context, templ);
/* fall through */
FALLTHROUGH;
case PIPE_VIDEO_FORMAT_MPEG4:
width = align(width, VL_MACROBLOCK_WIDTH);
height = align(height, VL_MACROBLOCK_HEIGHT);

2
src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp
View File

@ -933,7 +933,7 @@ r600_nir_64_to_vec2(nir_shader *sh)
swizzle[2 * k] = swizzle[2 * k + 1] = alu->src[i].swizzle[k] * 2;
break;
}
/* fallthrough */
FALLTHROUGH;
default:
swizzle[2 * k] = alu->src[i].swizzle[k] * 2;
swizzle[2 * k + 1] = alu->src[i].swizzle[k] * 2 + 1;

2
src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp
View File

@ -367,7 +367,7 @@ r600_lower_tess_io_impl(nir_builder *b, nir_instr *instr, enum pipe_prim_type pr
case nir_intrinsic_load_tess_level_inner:
tf_inner_address_offset = 4;
ncomps_correct = 2;
/* fallthrough */
FALLTHROUGH;
case nir_intrinsic_load_tess_level_outer: {
auto ncomps = outer_tf_components(prim_type);
if (!ncomps)

2
src/gallium/drivers/r600/sfn/sfn_shader_base.cpp
View File

@ -124,7 +124,7 @@ bool ShaderFromNirProcessor::scan_instruction(nir_instr *instr)
case nir_intrinsic_image_atomic_comp_swap:
case nir_intrinsic_ssbo_atomic_comp_swap:
m_sel.info.writes_memory = 1;
/* fallthrough */
FALLTHROUGH;
case nir_intrinsic_image_load:
m_ssbo_instr.set_require_rat_return_address();
break;

6
src/gallium/drivers/r600/sfn/sfn_shader_fragment.cpp
View File

@ -161,7 +161,7 @@ bool FragmentShaderFromNir::process_load_input(nir_intrinsic_instr *instr,
tgsi_interpolate = TGSI_INTERPOLATE_COLOR;
break;
}
/* fallthrough */
FALLTHROUGH;
case INTERP_MODE_SMOOTH:
tgsi_interpolate = TGSI_INTERPOLATE_PERSPECTIVE;
break;
@ -206,7 +206,7 @@ bool FragmentShaderFromNir::process_load_input(nir_intrinsic_instr *instr,
case TGSI_SEMANTIC_PRIMID:
sh_info().gs_prim_id_input = true;
sh_info().ps_prim_id_input = m_shaderio.inputs().size();
/* fallthrough */
FALLTHROUGH;
case TGSI_SEMANTIC_FOG:
case TGSI_SEMANTIC_GENERIC:
case TGSI_SEMANTIC_TEXCOORD:
@ -252,7 +252,7 @@ bool FragmentShaderFromNir::scan_sysvalue_access(nir_instr *instr)
break;
case nir_intrinsic_load_sample_pos:
m_sv_values.set(es_sample_pos);
/* fallthrough */
FALLTHROUGH;
case nir_intrinsic_load_sample_id:
m_sv_values.set(es_sample_id);
break;

2
src/gallium/drivers/r600/sfn/sfn_shaderio.cpp
View File

@ -165,7 +165,7 @@ ShaderInputVarying::ShaderInputVarying(tgsi_semantic _name, int sid, nir_variabl
m_ij_index = 0;
break;
}
/* fall-through */
FALLTHROUGH;
case INTERP_MODE_SMOOTH:
assert(!glsl_base_type_is_integer(base_type));

4
src/gallium/drivers/r600/sfn/sfn_vertexstageexport.cpp
View File

@ -115,7 +115,7 @@ bool VertexStageExportForFS::do_store_output(const store_loc& store_info, nir_in
case VARYING_SLOT_PSIZ:
m_proc.sh_info().vs_out_point_size = 1;
m_proc.sh_info().vs_out_misc_write = 1;
/* fallthrough */
FALLTHROUGH;
case VARYING_SLOT_POS:
return emit_varying_pos(store_info, instr);
case VARYING_SLOT_EDGE: {
@ -186,7 +186,7 @@ bool VertexStageExportForFS::emit_varying_pos(const store_loc &store_info, nir_i
m_proc.emit_instruction(op1_flt_to_int, value.reg_i(1), {value.reg_i(1)}, {alu_write, alu_last_instr});
m_proc.sh_info().output[store_info.driver_location].write_mask = 0xf;
}
/* fallthrough */
FALLTHROUGH;
case VARYING_SLOT_PSIZ:
case VARYING_SLOT_LAYER:
export_slot = 1;

32
src/gallium/drivers/softpipe/sp_quad_blend.c
View File

@ -453,7 +453,7 @@ blend_quad(struct quad_stage *qs,
VEC4_COPY(source[3], quadColor[3]); /* A */
break;
case PIPE_BLENDFACTOR_SRC_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_SRC_ALPHA:
{
const float *alpha = quadColor[3];
@ -461,7 +461,7 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_DST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_DST_ALPHA:
VEC4_MUL(source[3], quadColor[3], dest[3]); /* A */
break;
@ -470,7 +470,7 @@ blend_quad(struct quad_stage *qs,
VEC4_COPY(source[3], quadColor[3]); /* A */
break;
case PIPE_BLENDFACTOR_CONST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_CONST_ALPHA:
{
float comp[4];
@ -482,7 +482,7 @@ blend_quad(struct quad_stage *qs,
VEC4_COPY(source[3], zero); /* A */
break;
case PIPE_BLENDFACTOR_INV_SRC_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
{
float inv_alpha[4];
@ -491,7 +491,7 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_INV_DST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_DST_ALPHA:
{
float inv_alpha[4];
@ -500,7 +500,7 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_INV_CONST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
{
float inv_comp[4];
@ -510,7 +510,7 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_SRC1_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_SRC1_ALPHA:
{
const float *alpha = quadColor2[3];
@ -518,7 +518,7 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
{
float inv_alpha[4];
@ -705,12 +705,12 @@ blend_quad(struct quad_stage *qs,
/* blend_dest = blend_dest * 1 NO-OP, leave blend_dest as-is */
break;
case PIPE_BLENDFACTOR_SRC_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_SRC_ALPHA:
VEC4_MUL(blend_dest[3], blend_dest[3], quadColor[3]); /* A * A */
break;
case PIPE_BLENDFACTOR_DST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_DST_ALPHA:
VEC4_MUL(blend_dest[3], blend_dest[3], blend_dest[3]); /* A */
break;
@ -718,7 +718,7 @@ blend_quad(struct quad_stage *qs,
/* blend_dest = blend_dest * 1 NO-OP, leave blend_dest as-is */
break;
case PIPE_BLENDFACTOR_CONST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_CONST_ALPHA:
{
float comp[4];
@ -730,7 +730,7 @@ blend_quad(struct quad_stage *qs,
VEC4_COPY(blend_dest[3], zero); /* A */
break;
case PIPE_BLENDFACTOR_INV_SRC_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
{
float one_minus_alpha[TGSI_QUAD_SIZE];
@ -739,7 +739,7 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_INV_DST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_DST_ALPHA:
{
float inv_comp[4];
@ -748,7 +748,7 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_INV_CONST_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
{
float inv_comp[4];
@ -757,12 +757,12 @@ blend_quad(struct quad_stage *qs,
}
break;
case PIPE_BLENDFACTOR_SRC1_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_SRC1_ALPHA:
VEC4_MUL(blend_dest[3], blend_dest[3], quadColor2[3]); /* A * A */
break;
case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
/* fall-through */
FALLTHROUGH;
case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
{
float one_minus_alpha[TGSI_QUAD_SIZE];

2
src/gallium/drivers/softpipe/sp_query.c
View File

@ -155,7 +155,7 @@ softpipe_end_query(struct pipe_context *pipe, struct pipe_query *q)
break;
case PIPE_QUERY_TIMESTAMP:
sq->start = 0;
/* fall through */
FALLTHROUGH;
case PIPE_QUERY_TIME_ELAPSED:
sq->end = os_time_get_nano();
break;

4
src/gallium/drivers/softpipe/sp_screen.c
View File

@ -346,11 +346,11 @@ softpipe_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
{
switch (param) {
case PIPE_CAPF_MAX_LINE_WIDTH:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
return 255.0; /* arbitrary */
case PIPE_CAPF_MAX_POINT_WIDTH:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
return 255.0; /* arbitrary */
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:

2
src/gallium/drivers/softpipe/sp_setup.c
View File

@ -1289,7 +1289,7 @@ sp_setup_point(struct setup_context *setup,
switch (sinfo->attrib[fragSlot].interp) {
case SP_INTERP_CONSTANT:
/* fall-through */
FALLTHROUGH;
case SP_INTERP_LINEAR:
for (j = 0; j < TGSI_NUM_CHANNELS; j++)
const_coeff(setup, &setup->coef[fragSlot], vertSlot, j);

2
src/gallium/drivers/svga/svga_format.c
View File

@ -369,7 +369,7 @@ svga_translate_format(const struct svga_screen *ss,
case PIPE_FORMAT_Z32_UNORM:
/* SVGA3D_Z_D32 is not yet unsupported */
/* fall-through */
FALLTHROUGH;
default:
return SVGA3D_FORMAT_INVALID;
}

2
src/gallium/drivers/svga/svga_resource_texture.c
View File

@ -983,7 +983,7 @@ svga_texture_create(struct pipe_screen *screen,
break;
case PIPE_TEXTURE_1D_ARRAY:
tex->key.flags |= SVGA3D_SURFACE_1D;
/* fall-through */
FALLTHROUGH;
case PIPE_TEXTURE_2D_ARRAY:
tex->key.flags |= SVGA3D_SURFACE_ARRAY;
tex->key.arraySize = template->array_size;

6
src/gallium/drivers/svga/svga_screen.c
View File

@ -159,7 +159,7 @@ svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
return svgascreen->maxLineWidthAA;
case PIPE_CAPF_MAX_POINT_WIDTH:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
return svgascreen->maxPointSize;
@ -170,9 +170,9 @@ svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
return 15.0;
case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
/* fall-through */
FALLTHROUGH;
case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
return 0.0f;

12
src/gallium/drivers/svga/svga_tgsi_vgpu10.c
View File

@ -981,13 +981,13 @@ translate_opcode(enum tgsi_opcode opcode)
* only the TGSI_SEMANTIC_SAMPLEPOS system value which contains the
* position of the current sample in the render target.
*/
/* FALL-THROUGH */
FALLTHROUGH;
case TGSI_OPCODE_SAMPLE_INFO:
/* NOTE: we never actually get this opcode because the GLSL compiler
* implements the gl_NumSamples variable with a simple constant in the
* constant buffer.
*/
/* FALL-THROUGH */
FALLTHROUGH;
default:
assert(!"Unexpected TGSI opcode in translate_opcode()");
return VGPU10_OPCODE_NOP;
@ -9321,7 +9321,7 @@ emit_vgpu10_instruction(struct svga_shader_emitter_v10 *emit,
case TGSI_OPCODE_IABS:
return emit_iabs(emit, inst);
case TGSI_OPCODE_ARL:
/* fall-through */
FALLTHROUGH;
case TGSI_OPCODE_UARL:
return emit_arl_uarl(emit, inst);
case TGSI_OPCODE_BGNSUB:
@ -10246,7 +10246,7 @@ emit_temp_tessfactor_instructions(struct svga_shader_emitter_v10 *emit)
emit->tes.inner.in_index + 1, TGSI_SWIZZLE_X);
dst = writemask_dst(&dst, TGSI_WRITEMASK_Y);
emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &dst, &src);
/* fallthrough */
FALLTHROUGH;
case PIPE_PRIM_TRIANGLES:
src = make_src_scalar_reg(TGSI_FILE_INPUT,
emit->tes.inner.in_index, TGSI_SWIZZLE_X);
@ -10278,13 +10278,13 @@ emit_temp_tessfactor_instructions(struct svga_shader_emitter_v10 *emit)
emit->tes.outer.in_index + 3, TGSI_SWIZZLE_X);
dst = writemask_dst(&dst, TGSI_WRITEMASK_W);
emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &dst, &src);
/* fallthrough */
FALLTHROUGH;
case PIPE_PRIM_TRIANGLES:
src = make_src_scalar_reg(TGSI_FILE_INPUT,
emit->tes.outer.in_index + 2, TGSI_SWIZZLE_X);
dst = writemask_dst(&dst, TGSI_WRITEMASK_Z);
emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &dst, &src);
/* fallthrough */
FALLTHROUGH;
case PIPE_PRIM_LINES:
src = make_src_scalar_reg(TGSI_FILE_INPUT,
emit->tes.outer.in_index + 1, TGSI_SWIZZLE_X);

6
src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp
View File

@ -34,6 +34,8 @@
#include "gen_state_llvm.h"
#include "functionpasses/passes.h"
#include "util/compiler.h"
// components with bit-widths <= the QUANTIZE_THRESHOLD will be quantized
#define QUANTIZE_THRESHOLD 2
@ -771,7 +773,7 @@ struct BlendJit : public Builder
case SWR_TYPE_UNKNOWN:
case SWR_TYPE_UNUSED:
// fallthrough
FALLTHROUGH;
case SWR_TYPE_UINT:
case SWR_TYPE_SINT:
@ -810,7 +812,7 @@ struct BlendJit : public Builder
case SWR_TYPE_UNKNOWN:
case SWR_TYPE_UNUSED:
// fallthrough
FALLTHROUGH;
case SWR_TYPE_UINT:
case SWR_TYPE_SINT:

2
src/gallium/drivers/vc4/vc4_nir_lower_blend.c
View File

@ -406,7 +406,7 @@ vc4_logicop(nir_builder *b, int logicop_func,
return nir_imm_int(b, ~0);
default:
fprintf(stderr, "Unknown logic op %d\n", logicop_func);
/* FALLTHROUGH */
FALLTHROUGH;
case PIPE_LOGICOP_COPY:
return src;
}

2
src/gallium/drivers/vc4/vc4_program.c
View File

@ -144,7 +144,7 @@ vc4_nir_get_swizzled_channel(nir_builder *b, nir_ssa_def **srcs, int swiz)
default:
case PIPE_SWIZZLE_NONE:
fprintf(stderr, "warning: unknown swizzle\n");
/* FALLTHROUGH */
FALLTHROUGH;
case PIPE_SWIZZLE_0:
return nir_imm_float(b, 0.0);
case PIPE_SWIZZLE_1:

2
src/gallium/drivers/virgl/virgl_resource.c
View File

@ -400,7 +400,7 @@ virgl_resource_transfer_map(struct pipe_context *ctx,
break;
}
vws->resource_reference(vws, &trans->hw_res, vres->hw_res);
/* fall through */
FALLTHROUGH;
case VIRGL_TRANSFER_MAP_HW_RES:
trans->hw_res_map = vws->resource_map(vws, vres->hw_res);
if (trans->hw_res_map)

2
src/gallium/drivers/zink/zink_query.c
View File

@ -127,7 +127,7 @@ convert_query_type(unsigned query_type, bool *precise)
switch (query_type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
*precise = true;
/* fallthrough */
FALLTHROUGH;
case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
return VK_QUERY_TYPE_OCCLUSION;

2
src/gallium/drivers/zink/zink_resource.c
View File

@ -311,7 +311,7 @@ create_ici(struct zink_screen *screen, const struct pipe_resource *templ, unsign
case PIPE_TEXTURE_CUBE:
case PIPE_TEXTURE_CUBE_ARRAY:
ici.flags |= VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT;
/* fall-through */
FALLTHROUGH;
case PIPE_TEXTURE_2D:
case PIPE_TEXTURE_2D_ARRAY:
case PIPE_TEXTURE_RECT:

2
src/gallium/frontends/glx/xlib/xm_api.c
View File

@ -989,7 +989,7 @@ XMesaContext XMesaCreateContext( XMesaVisual v, XMesaContext share_list,
attribs.profile = ST_PROFILE_OPENGL_CORE;
break;
}
/* fall-through */
FALLTHROUGH;
case GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB:
/*
* The spec also says:

2
src/gallium/frontends/nine/nine_shader.c
View File

@ -1242,7 +1242,7 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
ureg_ADD(ureg, tmp, ureg_imm1f(ureg, 1.0f), ureg_negate(src));
src = ureg_src(tmp);
}
/* fall through */
FALLTHROUGH;
case NINED3DSPSM_COMP:
tmp = tx_scratch(tx);
ureg_ADD(ureg, tmp, ureg_imm1f(ureg, 1.0f), ureg_negate(src));

4
src/gallium/frontends/osmesa/osmesa.c
View File

@ -313,7 +313,7 @@ osmesa_choose_format(GLenum format, GLenum type)
return PIPE_FORMAT_NONE;
return PIPE_FORMAT_B5G6R5_UNORM;
default:
; /* fall-through */
FALLTHROUGH;
}
return PIPE_FORMAT_NONE;
}
@ -890,7 +890,7 @@ OSMesaGetIntegerv(GLint pname, GLint *value)
*value = osmesa->y_up;
return;
case OSMESA_MAX_WIDTH:
/* fall-through */
FALLTHROUGH;
case OSMESA_MAX_HEIGHT:
{
struct pipe_screen *screen = get_st_manager()->screen;

2
src/gallium/frontends/vdpau/vdpau_private.h
View File

@ -145,7 +145,7 @@ FormatYCBCRToPipe(VdpYCbCrFormat vdpau_format)
default:
/* NOTE: Can't be "unreachable", as it's quite reachable. */
assert(!"unexpected VdpYCbCrFormat");
/* fallthrough */
FALLTHROUGH;
#ifdef VDP_YCBCR_FORMAT_Y_UV_444
case VDP_YCBCR_FORMAT_Y_UV_444:
#endif

3
src/gallium/frontends/wgl/stw_context.c
View File

@ -35,6 +35,7 @@
#include "pipe/p_compiler.h"
#include "pipe/p_context.h"
#include "pipe/p_state.h"
#include "util/compiler.h"
#include "util/u_memory.h"
#include "util/u_atomic.h"
#include "frontend/api.h"
@ -238,7 +239,7 @@ stw_create_context_attribs(HDC hdc, INT iLayerPlane, DHGLRC hShareContext,
attribs.profile = ST_PROFILE_OPENGL_CORE;
break;
}
/* fall-through */
FALLTHROUGH;
case WGL_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB:
/*
* The spec also says:

6
src/intel/compiler/brw_compile_sf.c
View File

@ -167,9 +167,9 @@ static void do_twoside_color( struct brw_sf_compile *c )
brw_IF(p, BRW_EXECUTE_4);
{
switch (c->nr_verts) {
case 3: copy_bfc(c, c->vert[2]); /* fallthrough */
case 2: copy_bfc(c, c->vert[1]); /* fallthrough */
case 1: copy_bfc(c, c->vert[0]); /* fallthrough */
case 3: copy_bfc(c, c->vert[2]); FALLTHROUGH;
case 2: copy_bfc(c, c->vert[1]); FALLTHROUGH;
case 1: copy_bfc(c, c->vert[0]);
}
}
brw_ENDIF(p);

2
src/intel/compiler/brw_disasm.c
View File

@ -2066,7 +2066,7 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:
case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:
format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);
/* fallthrough */
FALLTHROUGH;
case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:
case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:
case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:

2
src/intel/compiler/brw_eu_emit.c
View File

@ -2909,7 +2909,7 @@ brw_find_next_block_end(struct brw_codegen *p, int start_offset)
*/
if (!while_jumps_before_offset(devinfo, insn, offset, start_offset))
continue;
/* fallthrough */
FALLTHROUGH;
case BRW_OPCODE_ELSE:
case BRW_OPCODE_HALT:
if (depth == 0)

2
src/intel/compiler/brw_fs_builder.h
View File

@ -822,7 +822,7 @@ namespace brw {
src.width != BRW_WIDTH_8 ||
src.hstride != BRW_HORIZONTAL_STRIDE_1)
break;
/* fallthrough */
FALLTHROUGH;
case ATTR:
case VGRF:
case UNIFORM:

4
src/intel/compiler/brw_fs_copy_propagation.cpp
View File

@ -778,7 +778,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
/* FINISHME: Promote non-float constants and remove this. */
if (devinfo->ver < 8)
break;
/* fallthrough */
FALLTHROUGH;
case SHADER_OPCODE_POW:
/* Allow constant propagation into src1 (except on Gen 6 which
* doesn't support scalar source math), and let constant combining
@ -786,7 +786,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
*/
if (devinfo->ver == 6)
break;
/* fallthrough */
FALLTHROUGH;
case BRW_OPCODE_BFI1:
case BRW_OPCODE_ASR:
case BRW_OPCODE_SHL:

2
src/intel/compiler/brw_fs_generator.cpp
View File

@ -62,7 +62,7 @@ brw_reg_from_fs_reg(const struct gen_device_info *devinfo, fs_inst *inst,
switch (reg->file) {
case MRF:
assert((reg->nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->ver));
/* Fallthrough */
FALLTHROUGH;
case VGRF:
if (reg->stride == 0) {
brw_reg = brw_vec1_reg(brw_file_from_reg(reg), reg->nr, 0);

10
src/intel/compiler/brw_fs_nir.cpp
View File

@ -1049,7 +1049,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
break;
op[0].type = BRW_REGISTER_TYPE_D;
op[0].negate = !op[0].negate;
/* fallthrough */
FALLTHROUGH;
case nir_op_i2f64:
case nir_op_i2i64:
case nir_op_u2f64:
@ -1174,7 +1174,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
bld.emit(SHADER_OPCODE_RND_MODE, bld.null_reg_ud(),
brw_imm_d(rnd));
}
/* fallthrough */
FALLTHROUGH;
case nir_op_iadd:
inst = bld.ADD(result, op[0], op[1]);
break;
@ -1624,7 +1624,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
case nir_op_unpack_half_2x16_split_x_flush_to_zero:
assert(FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16 & execution_mode);
/* Fall-through */
FALLTHROUGH;
case nir_op_unpack_half_2x16_split_x:
inst = bld.emit(BRW_OPCODE_F16TO32, result,
subscript(op[0], BRW_REGISTER_TYPE_UW, 0));
@ -1632,7 +1632,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
case nir_op_unpack_half_2x16_split_y_flush_to_zero:
assert(FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16 & execution_mode);
/* Fall-through */
FALLTHROUGH;
case nir_op_unpack_half_2x16_split_y:
inst = bld.emit(BRW_OPCODE_F16TO32, result,
subscript(op[0], BRW_REGISTER_TYPE_UW, 1));
@ -4255,7 +4255,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
case nir_intrinsic_scoped_barrier:
assert(nir_intrinsic_execution_scope(instr) == NIR_SCOPE_NONE);
/* Fall through. */
FALLTHROUGH;
case nir_intrinsic_group_memory_barrier:
case nir_intrinsic_memory_barrier_shared:
case nir_intrinsic_memory_barrier_buffer:

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