Commit Graph

246 Commits

Author SHA1 Message Date
Gert Wollny 843723e2f7 gallium: Add CAP for opcode DIV
Not all drivers support TGSI_OPCODE_DIV, so we should have a cap to be able
to check this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-30 18:41:35 +02:00
Caio Marcelo de Oliveira Filho 81835f87a4 gallium: Add PIPE_CAP_ATOMIC_FLOAT_MINMAX
Used to enable INTEL_shader_atomic_float_minmax.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2019-06-13 09:03:58 -07:00
Caio Marcelo de Oliveira Filho 46de3beab1 gallium: Add PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED
Tells whether or not the driver can handle gl_LocalInvocationIndex and
gl_GlobalInvocationID.  If not supported (the default), state tracker
will lower those on behalf of the driver.

v2: Add case to u_screen.c.  (Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-11 15:12:17 -07:00
Kenneth Graunke cca8af0c7d gallium: Add PIPE_CAP_FBFETCH_COHERENT and expose extensions
st/mesa now exposes KHR_blend_equation_advanced_coherent and
EXT_shader_framebuffer_fetch if the new capability is supported.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-05-23 08:13:09 -07:00
Kenneth Graunke a2d7834457 gallium: Change PIPE_CAP_TGSI_FS_FBFETCH bool to PIPE_CAP_FBFETCH count
TGSI's FBFETCH instruction currently only supports reading from a single
render target, but NIR intrinsics can support multiple render targets.

radeonsi can only support fetching from RT 0, but other drivers may be
able to support fetching from any render target.

To express this, this patch renames PIPE_CAP_TGSI_FS_FBFETCH to simply
PIPE_CAP_FBFETCH, and converts it from a boolean "is FBFETCH supported?"
to an integer number of render targets which can be fetched.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-05-23 08:13:07 -07:00
Kenneth Graunke c704c0226c gallium: Add a PIPE_CAP_FRAGMENT_SHADER_INTERLOCK.
Corresponding to GL_ARB_fragment_shader_interlock and
GL_NV_fragment_shader_interlock.  Currently, only the NIR paths
support this functionality, but someone could conceivably add it
to TGSI too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-05-14 19:34:29 -07:00
Eric Anholt 0c31fe9ee7 gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.
The _LEVELS assumes that the max is always power of two.  For V3D 4.2, we
can support up to 7680 non-power-of-two MSAA textures, which will let X11
support dual 4k displays on newer hardware.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-05-13 12:03:08 -07:00
Marek Olšák 7fc3d21646 gallium: add PIPE_CAP_PREFER_COMPUTE_BLIT_FOR_MULTIMEDIA 2019-04-24 15:47:41 -04:00
Marek Olšák 8ae50e6004 gallium: replace DRM_CONF_SHARE_FD with PIPE_CAP_DMABUF
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-23 21:20:26 -04:00
Marek Olšák e3841368f3 gallium: replace DRM_CONF_THROTTLE with PIPE_CAP_MAX_FRAMES_IN_FLIGHT
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-23 21:20:24 -04:00
Marek Olšák d9838f653a gallium: document conservative rasterization flags
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-23 21:19:48 -04:00
Mike Blumenkrantz 1b9041c76a gallium: add pipe cap for inner_coverage conservative raster mode
this can be used by drivers which support the extension to indicate support

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-23 16:36:00 -07:00
Rhys Perry 5131b7a43f gallium: add support for formatted image loads
v3: rebase
v3: make use of u_pipe_screen_get_param_defaults

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-04-15 16:18:07 -04:00
Gert Wollny 872519c663 Gallium: Add new CAP that indicated whether IO array definitions can be shriked
PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS is added to indicate whether the TGSI
pass to shrink IO arrays should be skipped to enforce the originally declared array
sizes and locations instead.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-04-10 11:09:40 +02:00
Caio Marcelo de Oliveira Filho f9b29c4a58 gallium: Add PIPE_CAP_COMPUTE_SHADER_DERIVATIVES
To enable NV_compute_shader_derivatives, which allows derivatives (and
texture lookups with implicit derivatives) in compute shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2019-04-08 19:29:33 -07:00
Rob Clark de481947d9 gallium: add PIPE_CAP_ESSL_FEATURE_LEVEL
Adds a new cap to allow drivers to expose higher shading language
versions in GLES contexts, to avoid having to report an artificially
low version for the benefit of GL contexts.

The motivation is to expose EXT_gpu_shader5 even though a driver may
not support all the features needed for the corresponding GL extension
(ARB_gpu_shader5).

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2019-03-22 16:39:13 -04:00
Marek Olšák b9e02fe138 gallium: add pipe_grid_info::last_block
The OpenMAX state tracker will use this.

RadeonSI is adapted to use pipe_grid_info::last_block instead of its
internal state.

Acked-by: Leo Liu <leo.liu@amd.com>
2019-03-15 11:53:08 -04:00
Karol Herbst 6010d7b8e8 gallium: add PIPE_CAP_MAX_VARYINGS
Some NVIDIA hardware can accept 128 fragment shader input components,
but only have up to 124 varying-interpolated input components. We add a
new cap to express this cleanly. For most drivers, this will have the
same value as PIPE_SHADER_CAP_MAX_INPUTS for the fragment shader.

Fixes KHR-GL45.limits.max_fragment_input_components

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
[imirkin: rebased, improved docs/commit message]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
2019-02-07 21:51:45 -05:00
Kenneth Graunke 8fa54bc549 gallium: Add a PIPE_CAP_NIR_COMPACT_ARRAYS capability bit.
Iris would like to use compact arrays for tesslevels and clip/cull
distances.  radeonsi will likely want to switch to these at some point,
since it'll be necessary for GL_ARB_gl_spirv support, but it's not ready
for them just yet.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-02-05 13:58:46 -08:00
Gert Wollny 8021f1875e Gallium: Add new CAPS to indicate whether a driver can switch SRGB write
Add a new cap that indicates whether the drivers supports
enabling/disabling the conversion from linear space to sRGB
for a framebuffer attachment. In Driver terms that this CAP indicates
whether the driver can switcht between a linear and and a sRGB surface
format for draw destinations witout changing the sourface itself.

v2: rename CAP to DEST_SURFACE_SRGB_CONTROL to reflect its
    purpouse better (pointed out by Ilia Mirkin)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-01-28 12:18:40 +01:00
Kenneth Graunke 74c9c906f9 gallium: Add forgotten docs for PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS.
Thanks to Ilia for catching this.
2019-01-23 17:16:22 -08:00
Kenneth Graunke 5b51d754d0 st/mesa: Optionally override RGB/RGBX dst alpha blend factors
Intel's blending hardware does not properly return 1.0 for destination
alpha for RGBX formats; it requires the factors to be overridden to
either zero or one.  Broadcom vc4 and v3d also could use this override.
While overriding these factors is safe in general, Nouveau and Radeon
would prefer not to.  Their blending hardware already returns correct
values for RGB/RGBX formats, and would like to avoid the resulting
per-buffer blending and independent blend factors (rgb != a) since it
can cause additional overhead.

I considered simply handling this in the driver, but it's not as nice.
pipe_blend_state doesn't have any format information, so we'd need the
hardware blend state to depend on both pipe_blend_state and
pipe_framebuffer_state.  Furthermore, Intel GPUs don't have a native
RGBX_SNORM format, so I avoid exposing one, which makes Gallium fall
back to RGBA_SNORM.  The pipe_surfaces we get in the driver have an RGBA
format, making it impossible to tell that there shouldn't be an alpha
channel.  One could argue that st not handling it in that case is a bug.
To work around this, we'd have to expose RGBX pipe formats, mapped to
RGBA hardware formats, and add format swizzling special cases.  All
doable, but it ends up being more code than I'd like.

st_atom_blend already has access to the right information and it's
trivial to accomplish there, so we just add a cap bit and do that.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-01-15 20:53:44 -08:00
Ilia Mirkin 2165636e9c docs: fix gallium screen cap docs
Make sure that the next line starts with spaces so that bullets are
maintained throughout, add `` around a few more special tokens, and fix
SAMPLE_COUNT_TEXTURE -> SAMPLE_COUNT.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-01-10 21:44:09 -05:00
Ilia Mirkin d139231b32 gallium: add PIPE_CAP_TGSI_ATOMFADD to indicate support
ATOMFADD is a little special -- make drivers have to specify it
explicitly.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-12-26 20:04:57 -05:00
Kristian H. Kristensen 2710c40e3c gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNT
This new pipe cap and the new nr_samples field in pipe_surface lets a
state tracker bind a render target with a different sample count than
the resource. This allows for implementing
EXT_multisampled_render_to_texture and
EXT_multisampled_render_to_texture2.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2018-12-06 16:55:43 -08:00
Mathias Fröhlich 4569bc6ad0 gallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.
Introduce a new capability for the maximum value of
pipe_vertex_element::src_offset. Initially just every driver
backend returns the value previously set from _mesa_init_constants.
So this shall end up in no functional change.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-09-10 07:59:31 +02:00
Marek Olšák 9ce2cef68f gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET 2018-09-07 17:59:02 -04:00
Marek Olšák fda7683726 gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsi 2018-09-06 21:53:00 -04:00
Marek Olšák 1285f71d3e gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITS
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-09-06 16:07:40 -04:00
Erik Faye-Lund 5a587d18d5 gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S,_BUFFERS}
This moves the evergreen-specific max-sizes out as a driver-cap, so
other drivers with less strict requirements also can use hw-atomics.

Remove ssbo_atomic as it's no longer needed.

We should now be able to use hw-atomics for some stages and not for
other, if needed.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2018-09-05 05:46:46 +01:00
Erik Faye-Lund d641d3f48b gallium: add PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS
This gets rid of a r600 specific hack in the state-tracker, and prepares
for other drivers to be able to use hw-atomics.

While we're at it, clean up some indentation in the various drivers.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2018-09-05 05:46:37 +01:00
Kenneth Graunke 1281608849 gallium: Split out PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE.
Some hardware can do PIPE_TEX_WRAP_MIRROR_REPEAT but not
PIPE_TEX_WRAP_MIRROR_CLAMP and PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER.

Drivers for such hardware would like to advertise support for
ARB_texture_mirror_clamp_to_edge but not EXT_texture_mirror_clamp.

This commit adds a new PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE bit,
changes the extension enable to be based on that, and enables it
in all upstream drivers which supported PIPE_CAP_TEXTURE_MIRROR_CLAMP
(so they continue supporting this mode).
2018-08-24 17:25:36 -07:00
Marek Olšák d3c1b212bc gallium: add PIPE_CAP_MAX_SHADER_BUFFER_SIZE
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-08-23 16:56:17 -04:00
Marek Olšák f6ccd594e7 gallium: add PIPE_CAP_MAX_GS_INVOCATIONS
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-08-23 16:56:17 -04:00
Marek Olšák 966f155623 gallium: add storage_sample_count parameter into is_format_supported
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-07-31 18:28:41 -04:00
Marek Olšák 8632626c81 gallium: add pipe_resource::nr_storage_samples, and set it same as nr_samples
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-07-31 18:28:41 -04:00
Marek Olšák 0caf74bbcd gallium: add PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-07-31 18:28:41 -04:00
Christian Gmeiner f485e5671c gallium: add scalar isa shader cap
v1 -> v2:
 - nv30 is _NOT_ scalar as suggested by Ilia Mirkin.
 - Change from a screen cap to a shader cap as suggested
   by Eric Anholt.
 - radeonsi is scalar as suggested by Marek Olšák.
 - Change missing ones to be scalar.

v2 -> v3:
 - r600 prefers vec4 as suggested by Marek Olšák.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-20 17:55:39 +02:00
Rhys Perry 51a221e378 gallium: add support for programmable sample locations
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v2)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
2018-06-14 20:09:45 -06:00
Marek Olšák 34ea55d820 gallium: add PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-05-29 20:13:24 -04:00
Rhys Perry fffe5e2d14 gallium: add initial support for conservative rasterization
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-04-30 21:13:53 -06:00
Timothy Arceri 9c51a7ea29 gallium: add packed uniform CAP
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-03-20 14:17:34 +11:00
Marek Olšák 8e7222f4e5 gallium: allow drivers to impose BO flags restrictions on constant buffer 0
Required by radeonsi for optimal behavior.
2018-02-17 04:20:55 +01:00
Dave Airlie 9ddacd9af4 gallium: drop all the guard band float caps.
Nobody queries these and nobody sets them to anything useful,
the docs say TODO.

Drop them until a use appears.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-14 08:50:08 +10:00
Timothy Arceri 4d982ae2c7 gallium/st/clover: remove unused PIPE_SHADER_IR_LLVM
This has been unused since 100796c15c.

Acked-by: Marek Olšák <marek.olsak@amd.com>
2018-02-01 13:56:34 +11:00
Andres Rodriguez 2ab405d254 gallium: introduce PIPE_CAP_FENCE_SIGNAL v2
Protects semaphore signaling functionality required by GL_EXT_semaphore.

v2: s/semaphore/fence

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 15:13:49 -05:00
Marek Olšák 63b231309e gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERS
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-01-17 20:18:00 +01:00
Marek Olšák e871abe452 gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-01-17 20:17:59 +01:00
Marek Olšák 3778a0a533 gallium: remove PIPE_CAP_TWO_SIDED_STENCIL
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-01-17 20:17:59 +01:00
Rob Clark 0015217c1e gallium: plumb context priority through to driver
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-12-19 16:36:10 -05:00