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gallium: plumb context priority through to driver 

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
This commit is contained in:
Rob Clark 2017-08-23 14:39:55 -04:00
parent 85789831b4
commit 0015217c1e
22 changed files with 71 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/docs/source/screen.rst
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@ -417,6 +417,10 @@ The integer capabilities:
* ``PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET``:
Whether pipe_vertex_buffer::buffer_offset is treated as signed. The u_vbuf
module needs this for optimal performance in workstation applications.
* ``PIPE_CAP_CONTEXT_PRIORITY_MASK``: For drivers that support per-context
priorities, this returns a bitmask of PIPE_CONTEXT_PRIORITY_x for the
supported priority levels. A driver that does not support prioritized
contexts can return 0.
.. _pipe_capf:

1
src/gallium/drivers/etnaviv/etnaviv_screen.c
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@ -268,6 +268,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
/* Stream output. */

1
src/gallium/drivers/freedreno/freedreno_screen.c
View File

@ -339,6 +339,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_DRAW_INDIRECT:

1
src/gallium/drivers/i915/i915_screen.c
View File

@ -326,6 +326,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_MAX_VIEWPORTS:

1
src/gallium/drivers/llvmpipe/lp_screen.c
View File

@ -364,6 +364,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
}
/* should only get here on unhandled cases */

1
src/gallium/drivers/nouveau/nv30/nv30_screen.c
View File

@ -228,6 +228,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_VENDOR_ID:

1
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View File

@ -280,6 +280,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_VENDOR_ID:

1
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View File

@ -309,6 +309,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_VENDOR_ID:

1
src/gallium/drivers/r300/r300_screen.c
View File

@ -250,6 +250,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
/* SWTCL-only features. */

1
src/gallium/drivers/r600/r600_pipe.c
View File

@ -411,6 +411,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_DOUBLES:

1
src/gallium/drivers/radeonsi/si_get.c
View File

@ -274,6 +274,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_POST_DEPTH_COVERAGE:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_NATIVE_FENCE_FD:

1
src/gallium/drivers/softpipe/sp_screen.c
View File

@ -315,6 +315,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return 4;

1
src/gallium/drivers/svga/svga_screen.c
View File

@ -459,6 +459,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
}

1
src/gallium/drivers/swr/swr_screen.cpp
View File

@ -346,6 +346,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_VENDOR_ID:

1
src/gallium/drivers/vc4/vc4_screen.c
View File

@ -288,6 +288,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
/* Stream output. */

1
src/gallium/drivers/vc5/vc5_screen.c
View File

@ -248,6 +248,7 @@ vc5_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
/* Geometry shader output, unsupported. */

1
src/gallium/drivers/virgl/virgl_screen.c
View File

@ -273,6 +273,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 0;
case PIPE_CAP_VENDOR_ID:
return 0x1af4;

21
src/gallium/include/pipe/p_defines.h
View File

@ -391,6 +391,15 @@ enum pipe_flush_flags
*/
#define PIPE_CONTEXT_PREFER_THREADED (1 << 3)
/**
* Create a high priority context.
*/
#define PIPE_CONTEXT_HIGH_PRIORITY (1 << 4)
/**
* Create a low priority context.
*/
#define PIPE_CONTEXT_LOW_PRIORITY (1 << 5)
/**
* Flags for pipe_context::memory_barrier.
@ -785,8 +794,20 @@ enum pipe_cap
PIPE_CAP_TILE_RASTER_ORDER,
PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES,
PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET,
PIPE_CAP_CONTEXT_PRIORITY_MASK,
};
/**
* Possible bits for PIPE_CAP_CONTEXT_PRIORITY_MASK param, which should
* return a bitmask of the supported priorities. If the driver does not
* support prioritized contexts, it can return 0.
*
* Note that these match __DRI2_RENDER_HAS_CONTEXT_PRIORITY_*
*/
#define PIPE_CONTEXT_PRIORITY_LOW (1 << 0)
#define PIPE_CONTEXT_PRIORITY_MEDIUM (1 << 1)
#define PIPE_CONTEXT_PRIORITY_HIGH (1 << 2)
#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1)

2
src/gallium/include/state_tracker/st_api.h
View File

@ -92,6 +92,8 @@ enum st_api_feature
#define ST_CONTEXT_FLAG_RESET_NOTIFICATION_ENABLED (1 << 3)
#define ST_CONTEXT_FLAG_NO_ERROR (1 << 4)
#define ST_CONTEXT_FLAG_RELEASE_NONE (1 << 5)
#define ST_CONTEXT_FLAG_HIGH_PRIORITY (1 << 6)
#define ST_CONTEXT_FLAG_LOW_PRIORITY (1 << 7)
/**
* Reasons that context creation might fail.

17
src/gallium/state_trackers/dri/dri_context.c
View File

@ -57,7 +57,9 @@ dri_create_context(gl_api api, const struct gl_config * visual,
unsigned allowed_flags = __DRI_CTX_FLAG_DEBUG |
__DRI_CTX_FLAG_FORWARD_COMPATIBLE |
__DRI_CTX_FLAG_NO_ERROR;
unsigned allowed_attribs = __DRIVER_CONTEXT_ATTRIB_RELEASE_BEHAVIOR;
unsigned allowed_attribs =
__DRIVER_CONTEXT_ATTRIB_PRIORITY |
__DRIVER_CONTEXT_ATTRIB_RELEASE_BEHAVIOR;
const __DRIbackgroundCallableExtension *backgroundCallable =
screen->sPriv->dri2.backgroundCallable;
@ -112,6 +114,19 @@ dri_create_context(gl_api api, const struct gl_config * visual,
if (ctx_config->flags & __DRI_CTX_FLAG_NO_ERROR)
attribs.flags |= ST_CONTEXT_FLAG_NO_ERROR;
if (ctx_config->attribute_mask & __DRIVER_CONTEXT_ATTRIB_PRIORITY) {
switch (ctx_config->priority) {
case __DRI_CTX_PRIORITY_LOW:
attribs.flags |= ST_CONTEXT_FLAG_LOW_PRIORITY;
break;
case __DRI_CTX_PRIORITY_HIGH:
attribs.flags |= ST_CONTEXT_FLAG_HIGH_PRIORITY;
break;
default:
break;
}
}
if ((ctx_config->attribute_mask & __DRIVER_CONTEXT_ATTRIB_RELEASE_BEHAVIOR)
&& (ctx_config->release_behavior == __DRI_CTX_RELEASE_BEHAVIOR_NONE))
attribs.flags |= ST_CONTEXT_FLAG_RELEASE_NONE;

8
src/gallium/state_trackers/dri/dri_query_renderer.c
View File

@ -55,7 +55,13 @@ dri2_query_renderer_integer(__DRIscreen *_screen, int param,
PIPE_TEXTURE_2D, 0,
PIPE_BIND_RENDER_TARGET);
return 0;
case __DRI2_RENDERER_HAS_CONTEXT_PRIORITY:
value[0] =
screen->base.screen->get_param(screen->base.screen,
PIPE_CAP_CONTEXT_PRIORITY_MASK);
if (!value[0])
return -1;
return 0;
default:
return driQueryRendererIntegerCommon(_screen, param, value);
}

5
src/mesa/state_tracker/st_manager.c
View File

@ -880,6 +880,11 @@ st_api_create_context(struct st_api *stapi, struct st_manager *smapi,
if (attribs->flags & ST_CONTEXT_FLAG_NO_ERROR)
no_error = true;
if (attribs->flags & ST_CONTEXT_FLAG_LOW_PRIORITY)
ctx_flags |= PIPE_CONTEXT_LOW_PRIORITY;
else if (attribs->flags & ST_CONTEXT_FLAG_HIGH_PRIORITY)
ctx_flags |= PIPE_CONTEXT_HIGH_PRIORITY;
pipe = smapi->screen->context_create(smapi->screen, NULL, ctx_flags);
if (!pipe) {
*error = ST_CONTEXT_ERROR_NO_MEMORY;