After a7c0cf500b ("radv: Enable DCC for image stores on GFX10.")
some checksums for the radv driver remained to be updated.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10856>
After 524848707b ("radv: don't set sx_blend_opt_epsilon for V_028C70_COLOR_10_11_11")
some checksums for the radv driver remained to be updated.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10856>
Removing the directory itself can be problematic with certain runner
strategies (B2C).
v2:
- Better deleting pattern matching since the previously used one was
problematic and not pointed out by /bin/sh, as noticed by Emma.
v3:
- Check that the results directory exists before attempting to
delete its content.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10856>
And enable it in the radv's Raven traces job.
v2:
- Adapt to changes in the start-x.sh script.
v3:
- Not deleting any more the non-existent by now
".gitlab-ci/common/start-x.sh" script (Martin).
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10856>
Only the AMD video drivers for xorg are added since there are no other
expected users by now.
v2:
- Remove the start/stop logic from the x.sh script. We don't care
about stopping since that's already managed by gitlab-ci (Emma).
v3:
- Remove mistakenly added ".gitlab-ci/common/start-x.sh"
script (Martin).
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10856>
Fixes perf regression introduced from tileY LID order for CS
shaders that access both textures and buffers. Walks LIDs in
X-major fashion, but with blocks of height 4. This maps LIDs per
HW thread for SIMD8/16/32 as (2x4/4x4/8x4), which is always good
for tileY resources and usually good for linear resources.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10733>
Computer shaders that access tileY resources (textures) benefit
from Y-locality accesses. Easiest way to implement this is walk
local ids in Y-major fashion, instead of X-major fashion. Y-major
local ids will reduce partial writes and increase cache locality
for tileY accesses since tileY resources cachelines progress in
Y direction.
Improves performance on TGL:
Borderlands3.dxvk-g2 +1.5%
Y-major can introduce a performance drop on CS that use mixture
of buffers and images. This should be fixed in next commit.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10733>
In file included from ../src/intel/ds/intel_pps_perf.cc:8:
../src/intel/ds/intel_pps_perf.h:34:78: error: ‘string’ in namespace ‘std’ does not name a type
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10934>
I forgot that after rebasing on large_consts support that this is now
called after the first time nir_lower_wrmask is called and can generate
partial writemasks that need to be lowered. While we're here, also call
the main optimization loop if things are lowered to scratch because it
generates address arithmetic that may need to be cleaned up.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10922>
There's a bug in ATEST (and LD_TILE?) handling affecting v6, manifesting
as gpu sched timeouts in dmesg and ultimately as random dEQP flakes.
Until this can be sorted out and the G72 jobs are proven to be stable,
we can't have them in the critical merge path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10923>
I've been meaning to make this change for a while, but I've been holding
out in case dEQP-GLES2 on T860/Bifrost catches a driver issue missed by
dEQP-GLES3 and also missed by T720's dEQP-GLES2 job. Given that hasn't
happened (indeed, dEQP-GLES3 is an effective super set of dEQP-GLES2),
let's save the cycles and skip the redundant jobs.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10923>
The u_resource_vtbl indirection is going to be removed.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
It's only used by buffers and only zink uses it privately for textures too.
This is part of removing u_resource_vtbl.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
This is the initial step towards removing u_resource_vtbl.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
State uploads are bound to the batch, so if the batch changes, we
invalidate all state. Theoretically this isn't totally optimal but in
practice it should be good enough.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10888>
This patch will avoid reallocation,if surface is already protected.
Fixing the comparision logic of boolean value(true \ flase) with
PIPE_BIND_PROTECTED.
Fixes: 81be8b3c2f ("va/picture: make sure destination buffer is protected if needed")
Signed-off-by: SureshGuttula <suresh.guttula@amd.corp-partner.google.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10916>
this was broken for the indirect case if the indirect draw count or
firstIndex was nonzero and also would rewrite the index buffer onto the
wrong offset of the dst buffer
Fixes: 0c85d6c523 ("gallium/util: factor out primitive-restart rewriting logic")
Fixes: 330d0607ed ("gallium: remove pipe_index_buffer and set_index_buffer")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10909>
Andres Gomez
Felix DeGrood
Robert Tarasov
Mike Blumenkrantz
Chia-I Wu
Connor Abbott
Alyssa Rosenzweig
Vasily Khoruzhick
Samuel Pitoiset
Ezequiel Garcia
Marek Olšák
Rob Clark
Juan A. Suarez Romero
SureshGuttula