Commit Graph

848 Commits

Author SHA1 Message Date
Mauro Rossi b9e639589d intel/genxml: fix building rules for aubinator required headers
New generated headers were introduced by commit 63a366a
"intel: aubinator: generate a standalone binary"

Android does not need aubinator yet, so in order to avoid building error,
aubinator required new genxml headers are defined in a separate list.

If required, building rules for Android will be added later.
[Emil Velikov: don't use a _HEADERS variable name (causes warnings)]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-10-11 13:53:19 +01:00
Eric Anholt 0f99c0686e intel: Fix bash-specific redirection.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-10-10 09:50:05 -07:00
Lionel Landwerlin 014bd4acb8 anv: turn on samplerAnisotropy in VkPhysicalDeviceFeatures
According to the Vulkan spec 5.63.4 :

  samplerAnisotropy indicates whether anisotropic filtering is supported. If
  this feature is not enabled, the maxAnisotropy member of the
  VkSamplerCreateInfo structure must be 1.0.

Since we already set maxAnisotropy to 16 and program the hardware according
to the VkSamplerCreateInfo.maxAnisotropy, it seems we can turn this on.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-10 09:25:38 +01:00
Lionel Landwerlin 4682abdaa8 intel: aubinator: enable loading dumps from standard input
In conjuction with an intel_aubdump change, you can now look at your
application's output like this :

$ intel_aubdump -c '/path/to/aubinator --gen=hsw' my_gl_app

v2: Add print_help() comment about standard input handling (Eero)
    Remove shrinked gtt space debug workaround (Eero)

v3: Use realloc rather than memcpy/free (Ben)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
2016-10-08 02:18:47 +01:00
Lionel Landwerlin 619c8de522 intel: aubinator: enable loading xml files from a given directory
This might be useful for people who debug with out of tree descriptions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
2016-10-08 02:17:35 +01:00
Lionel Landwerlin 63a366a881 intel: aubinator: generate a standalone binary
Embed the xml files into the binary, so aubinator can be used from any
location.

v2: Split generation packing into another patch (Jason)
    Check for xxd (Jason)

v3: Fix out of tree builds (Jason)
    Generate custom variable name rather than names generated by xxd
    (Lionel)

v4: Move generated _xml.h files to genxml/ (Sirisha)

v5: Remove newline from makefile (Jason)

v6: Add comment on gen*_xml.h creation (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-08 02:17:03 +01:00
Nanley Chery 4d7d9825f3 anv/TODO: Update the HiZ task
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-10-07 12:54:18 -07:00
Nanley Chery d8aacc24cc anv: Enable fast depth clears
Provides an FPS increase of ~30% on the Sascha triangle and multisampling
demos.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-10-07 12:54:18 -07:00
Chad Versace 78d074b87a anv/cmd_buffer: Enable rendering to HiZ
Nanley Chery:
(rebase)
 - Resolve conflicts with new anv_batch_emit macro
(amend)
 - Handle a QPitch TODO
 - Emit 3DSTATE_HIER_DEPTH_BUFFER on pre-BDW systems
 - Only use HiZ for single-subpass renderpasses
 - Emit the HiZ instruction before the stencil instruction to follow the
   optimized clear sequence specified in the PRMs
 - Don't modify clear params
 - Enable resolves when a HiZ buffer is used to ensure depth buffer validity

Provides an FPS increase of ~15% on the Sascha triangle and multisampling
demos.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07 12:54:18 -07:00
Nanley Chery 134d181be1 anv/cmd_buffer: Add code for performing HZ operations
Create a function that performs one of three HiZ operations -
depth/stencil clears, HiZ resolve, and depth resolves.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-10-07 12:54:18 -07:00
Jason Ekstrand 9919a2d34d anv/image: Memset hiz surfaces to 0 when binding memory
Nanley Chery (amend):
 - Change memset value from 0xff to 0 (a defined value for HiZ).

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07 12:54:18 -07:00
Jason Ekstrand b4bbabf21b anv: Move BindImageMemory to anv_image.c
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07 12:54:18 -07:00
Chad Versace 917814dccd anv: Allocate hiz surface
Nanley Chery:
(rebase)
 - Use isl_surf_get_hiz_surf()
(amend)
 - Only add a HiZ surface onto a depth/stencil attachment
 - Add comment above HiZ surface addition
 - Hide HiZ behind INTEL_VK_HIZ prior to BDW
 - Disable HiZ for untested cases
 - Remove DISABLE_AUX_BIT instead of preventing it from being added

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-10-07 12:54:18 -07:00
Chad Versace 3aec432ed3 anv: Add func anv_image_has_hiz()
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07 12:54:17 -07:00
Chad Versace fe40d026a1 anv: Add anv_image::hiz_surface
Unused.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07 12:54:17 -07:00
Nanley Chery 814fa12379 isl: Correct a comment in the isl_format enum
HiZ is not a color surface, but an auxiliary depth surface.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07 12:54:17 -07:00
Lionel Landwerlin eb23de6116 anv: pipeline cache: fix return value of vkGetPipelineCacheData
According to the spec - 9.6. Pipeline Cache :

  If pDataSize is less than the maximum size that can be retrieved by the
  pipeline cache, at most pDataSize bytes will be written to pData, and
  vkGetPipelineCacheData will return VK_INCOMPLETE.

Fixes the following test from Vulkan CTS :

  dEQP-VK.pipeline.cache.pipeline_from_incomplete_get_data.vertex_stage_fragment_stage
  dEQP-VK.pipeline.cache.pipeline_from_incomplete_get_data.vertex_stage_geometry_stage_fragment_stage
  dEQP-VK.pipeline.cache.misc_tests.invalid_size_test

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07 18:46:12 +01:00
Jason Ekstrand 82b4f1c47b anv/entrypoints: Save off the entire devinfo rather than a pointer
Since the gen_device_info structs are no longer just constant memory, a
pointer to one is not a pointer to something in the .data section so we
shouldn't be storing it in a static variable.  Instead, we should just
store the entire device_info structure.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-06 21:13:52 -07:00
Jason Ekstrand c81ec84c1e anv/cmd_buffer: Move the clear_subpasses calls to set_subpass
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-06 16:52:31 -07:00
Jason Ekstrand b548fdbed5 anv/cmd_buffer: Don't call set_subpass in a secondary
Initially, we had intended set_subpass to be an interesting function that
did whatever (presumably a lot) setup we needed for a subpass.  In reality,
it just sets a pointer and a dirty bit and then emits depth and stencil
state.  When we call BeginCommandBuffer on a secondary, there's no point in
setting depth and stencil state since it will already be set by the
primary.  Instead, the only thing we need to do at the start of a secondary
is set the subpass pointer and the dirty bit.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-06 16:52:31 -07:00
Jason Ekstrand fe4e276b02 anv/cmd_buffer: Rework descriptor dirtying in set_subpass
We have a DIRTY_RENDER_TARGETS flag and that makes a lot more sense than
just dirtying fragment descriptors.  We're checking for it in some of the
gen7 code but unfortunately, nothing was setting it and it didn't do what
it was supposed to do in cmd_buffer_flush_state.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-06 16:52:31 -07:00
Jason Ekstrand a1db0e87ff anv/wsi: Advertise UNORM formats as well as sRGB
Because WSI images are created with VkImageCreateInfo::flags explicitly set
to 0, they don't ever have the VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT set.
This means that you can't create an image view of it with a different
format so applications can't render directly in sRGB (without automatic
encoding) unless we actually advertise UNORM formats.  There are a lot of
applications that want to do their own sRGB conversion, so we should allow
for that.  We do, however, make UNORM come after sRGB in the list so that
the default for dumb apps that just grab the first thing is to render in
linear and let the sRGB conversion happen automatically.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-06 16:52:31 -07:00
Lionel Landwerlin 0b10152b80 intel: aubinator: use getopt to parse arguments
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota <sirisha.gandikota@intel.com>
2016-10-07 00:05:56 +01:00
Emil Velikov 0b6837a643 anv: automake: ship intel_icd.json.in in the tarball
Otherwise we'll fail to (re)generate intel_icd.json.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-10-06 15:03:46 +01:00
Emil Velikov a42115d6e2 intel: automake: reference the correct header
The header was renamed with earlier commit, so update the
Makefile.sources respectively.

{vulkan/genX_multisample.h => common/gen_sample_positions.h}

Fixes: c779ad3e661("intel: Move Vulkan sample positions to common code")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-10-06 15:03:46 +01:00
Lionel Landwerlin b84234fd28 intel: aubinator: add missing return characters
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-06 10:39:53 +01:00
Philipp Zabel 0408d50f43 anv: fix GetPhysicalDeviceProperties to return timestampPeriod in ns
According to chapters 16.5. (Timestamp Queries) and 30.2 (Limits) of the
Vulkan Specification 1.0.29, the .limits.timestampPeriod field returned
by vkGetPhysicalDeviceProperties is measured in nanoseconds, not in
seconds.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-06 02:02:35 -07:00
Nanley Chery f315c4f189 intel/blorp: Use documented RECTLIST vertex positions
Use the vertex positions described in the PRMs. This has no effect on
rendering but quiets the simulator warnings seen when the vertices
appear out of order.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2016-10-05 09:41:21 -07:00
Jason Ekstrand e3a1d33077 anv/meta: Roll clear_image into CmdClearDepthStencilImage
It is now the only caller so there's no sense in keeping things split out.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-05 09:33:44 -07:00
Jason Ekstrand f027609a64 anv: Use blorp for VkCmdFillBuffer
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-05 09:33:44 -07:00
Lionel Landwerlin f8b861a867 intel: aubinator: pack supported generations into an array
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-05 16:23:28 +01:00
Ben Widawsky 2dc06e2324 i965/l3: Add explicit way size calculation for bxt
There should be no functional change here because Broxton and CHV are
both gt1. Without this code however, it might seem like broxton support
is missing.

While here, put the gt1 check in front to hopefully short-circuit the
condition for the mobile cases.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-10-05 07:57:58 -07:00
Kenneth Graunke 53b8f6374f aubinator: use the correct format specifier for printing ptrdiff_t.
Fixes more warnings in 32-bit builds.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-10-04 17:28:01 -07:00
Kenneth Graunke af41e1a500 aubinator: Use less -RS instead of -r for the implicit pager.
From the less man page:

   "Warning: when the -r option is used, less cannot keep track of the
    actual appearance  of  the screen (since this depends  on  how the
    screen responds to each type of control character).  Thus, various
    display problems may result, such as long lines being split in the
    wrong place."

Lines which are too long to fit in the terminal would be word wrapped,
but unfortunately less would get confused about which line it was on,
and text would be drawn on top of other text.  The most noticable case
was shader assembly, which is frequently too wide for an 80 character
terminal, and thus would be drawn on top of the following state packets,
making them completely unreadable.

Using -R instead of -r fixes this problem by only allowing color escape
sequences.  (Notably, Git's implicit pager invocation uses -R.)
Unfortunately, it means our "clear to the end of the line" hack for
extending the blue bar headers won't work anymore.

Word wrapping usually isn't terribly readable, anyway, so we also add
the -S option (chop long lines) to restrict it to the terminal width.
(You can hit the left and right arrow keys to scroll sideways.)

Then, for a new blue bar hack, we can use a printf specifier to pad
the command packet names to be 80 characters long (arbitrarily), which
extends them "far enough" to look good, and doesn't require us to use
ioctls to determine the terminal width.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Sirisha Gandikota <sirisha.gandikota@intel.com>
2016-10-04 17:25:46 -07:00
Anuj Phogat d2112fc8d9 anv/gen7_pipeline: Fix typo in semicolon
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:35 -07:00
Anuj Phogat 1ffcf95fc4 anv/gen7_pipeline: Set sample mask field in 3DSTATE_PS
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:35 -07:00
Anuj Phogat deeb1e95d0 anv/gen7_pipeline: Move ksp{1,2} state setting next to ksp0
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:35 -07:00
Anuj Phogat 2abb7486f5 anv/gen8_pipeline: Add an assert to ensure use_alt_mode is not set in prog_data
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-04 13:20:34 -07:00
Anuj Phogat fa04b57c15 anv/gen8_pipeline: Fix typo in semicolon
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:34 -07:00
Anuj Phogat 7daafad9ac intel/genxml: Keep the value name 'Alternate' uniform across gen75.xml
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:34 -07:00
Anuj Phogat c0f02bbc57 intel/genxml: Fix typo in gen75.xml
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:34 -07:00
Anuj Phogat 2c7e1165fa anv/gen7_pipeline: Use MSDISPMODE_PERSAMPLE for non-multisampled fbo
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:34 -07:00
Anuj Phogat f75a93f610 anv/blorp: Handle zero width/height blits in blorp_copy()
V2: Move the check from copy_buffer_to_image() to blorp_copy(). (Nanley)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-04 13:20:34 -07:00
Anuj Phogat 2c78b2ec90 intel/isl: Add an assert to check zero width/height surface
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-04 13:20:34 -07:00
Timothy Arceri 298c2e03d7 intel: use the correct format specifier for printing uint64_t
Fixes a bunch of warnings in 32-bit builds.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-10-04 22:32:57 +11:00
Tapani Pälli 387e0af0b4 intel: fix compilation warning on gen_get_device_info
(warning: 'const' type qualifier on return type has no effect)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-10-04 07:38:45 +03:00
Jason Ekstrand 0176c6a692 intel/isl: Allow non-2D HiZ surfaces
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Jason Ekstrand 4e397c6c75 intel/isl: Add a detailed comment about multisampling with HiZ
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Jason Ekstrand c3bd711411 intel/isl: Remove tiling checks from choose_msaa_layout
We already do those checks in filter_tiling.  There's no good reason to
repeat them in choose_msaa_layout.  If anything they should have been
asserts and not "return false" checks.  Also, this check was causing us to
outright reject multisampled HiZ surfaces which wasn't intended.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Jason Ekstrand 69d3bb9915 intel/isl: Handle HiZ and CCS tiling more directly
The HiZ and CCS tiling formats are always used for HiZ and CCS surfaces
respectively.  There's no reason why we should go through filter_tiling and
it's much easier to always get HiZ and CCS right if we just handle them
directly.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Jason Ekstrand b1311a48e0 intel/isl: Allow multisampling with ISL_FORMAT_HiZ
HiZ buffers can be multisampled and, on Broadwell and earlier, simply using
interleaved multisampling with a compression block size of 8x4 samples
yields the correct HiZ surface size calculations.  Unfortunately,
choose_msaa_layout was rejecting multisampled HiZ buffers because of format
checks.  Now that we have a simple helper for determining if a format
supports multisampling, that's an easy enough issue to fix.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Jason Ekstrand baade41a5c intel/isl: Allow creation of 1-D compressed textures
Compressed 1-D textures are not well-defined thing in either GL or Vulkan.
However, auxiliary surfaces are treated as compressed textures in ISL and
we can do HiZ and CCS with 1-D so we need to be able to create them.  In
order to prevent actually using them (the docs say no), we assert in the
state setup code.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Jason Ekstrand f82166578f intel/isl: Fix up asserts in calc_phys_level0_extent_sa
The assertion that a format is uncompressed in the multisample layouts
isn't quite right.  What we really want to assert is that the format
supports multisampling which is a bit more complicated query.  We also want
to assert that it has a block size of 1x1 since we do nothing with the
block size in the phys_level0_sa assignment.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Jason Ekstrand 5637f3f120 intel/isl: Add a format_supports_multisampling helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-03 14:53:01 -07:00
Ville Syrjälä 2fef0d108a anv/formats: Fix build on gcc-4 and earlier
gcc-4 and earlier don't allow compound literals where a constant
is required in -std=c99/gnu99 mode, so we can't use ISL_SWIZZLE()
when populating the anv_formats[] array. There are a few ways around
it: First one would be -std=c89/gnu89, but the rest of the code
depends on c99 so it's not really an option. The second option
would be to upgrade to gcc-5+ where the compiler behaviour was relaxed
a bit [1]. And the third option is just to avoid using compound
literals. I chose the last option since it keeps gcc-4 and earlier
working.

[1] https://gcc.gnu.org/gcc-5/porting_to.html

Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Topi Pohjolainen <topi.pohjolainen@intel.com>
Fixes: 7ddb21708c ("intel/isl: Add an isl_swizzle structure and use it for isl_view swizzles")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-03 15:45:28 +03:00
Timothy Arceri eaf147cb46 i965: rename max_ds_* variable to max_tes_*
Using consistent naming allows us to create macros more easily.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-03 15:29:58 +11:00
Timothy Arceri b67633ce5e i965: rename max_hs_* variables to max_tcs_*
Using consistent naming allows us to create macros more easily.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-03 15:29:51 +11:00
Sirisha Gandikota 8e3e9d74b5 aubinator: Fix the decoding of values that span two Dwords
Fixed the way the values that span two Dwords are decoded.
Based on the start and end indices of the field, the Dwords
are fetched and decoded accordingly.

v2: rename dw to qw in gen_field_iterator_next
and remove extra white space (Anuj)

v3: change all instances of dw to qw (Anuj)

Earlier, 64-bit fields (such as most pointers on Gen8+)
weren't decoded correctly.  gen_field_iterator_next seemed
to walk one DWord at a time, sets v.dw, and then passes it
to field(). So, even though field() takes a uint64_t, we're
passing it a uint32_t (which gets promoted, so the top 32
bits will always be zero). This seems pretty bogus... (Ken)

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-26 11:18:52 -07:00
Nayan Deshmukh b3827819aa aubinator: fix resource leak
CovID: 1373370

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-25 12:32:48 -07:00
Nicolas Koch f17948a30a anv: Check for VK_WHOLE_SIZE in anv_CmdFillBuffer
From the Vulkan spec:

   Size is the number of bytes to fill, and must be either a multiple of 4,
   or VK_WHOLE_SIZE to fill the range from offset to the end of the buffer.
   If VK_WHOLE_SIZE is used and the remaining size of the buffer is not a
   multiple of 4, then the nearest smaller multiple is used.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-23 00:20:16 -07:00
Lionel Landwerlin 6b21728c4a anv: get rid of duplicated values from gen_device_info
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-23 10:12:06 +03:00
Lionel Landwerlin bc24590f0c intel/i965: make gen_device_info mutable
Make gen_device_info a mutable structure so we can update the fields that
can be refined by querying the kernel (like subslices and EU numbers).

This patch does not make any functional change, it just makes
gen_get_device_info() fill a structure rather than returning a const
pointer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-23 10:11:59 +03:00
Lionel Landwerlin b8162d6b6e anv: pipeline: use correct number of thread for compute
Reproduces this commit :

commit 0fb85ac08d
Author: Kenneth Graunke <kenneth@whitecape.org>
Date:   Mon Jun 6 21:37:34 2016 -0700

    i965: Use the correct number of threads for compute shaders.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-21 12:01:06 +03:00
Lionel Landwerlin f2d43b44d7 anv: allocator: correct scratch space for haswell
This reproduces this commit :

commit 2213ffdb4b
Author: Kenneth Graunke <kenneth@whitecape.org>
Date:   Mon Jun 6 21:37:34 2016 -0700

    i965: Allocate scratch space for the maximum number of compute threads.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-21 12:01:06 +03:00
Lionel Landwerlin 09394ee6cf anv: device: calculate compute thread numbers using subslices numbers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-21 12:01:06 +03:00
Lionel Landwerlin 792d77165b aubinator: add a custom handler for immediate register load
Transforming this :

0x00c77084:  0x11000001:  MI_LOAD_REGISTER_IMM
0x00c77088:  0x0000b020 : Dword 1
    Register Offset: 0x0000b020
    0x00c7708c:  0x00880038 : Dword 2
    Data DWord: 8912952

Into this:

0x007880f0:  0x11000001:  MI_LOAD_REGISTER_IMM
0x007880f4:  0x0000b020 : Dword 1
    Register Offset: 0x0000b020
    0x007880f8:  0x00080040 : Dword 2
    Data DWord: 524352
register L3CNTLREG2 (0xb020) : 0x80040
    SLM Enable: 0
    URB Allocation: 32
    URB Low Bandwidth: 0
    RO Allocation: 32
    RO Low Bandwidth: 0
    DC Allocation: 0
    DC Low Bandwidth: 0

v2: Drop unused arguments (Sirisha)
    Print out register name

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-09-20 10:47:21 +01:00
Kenneth Graunke 081f21f29b isl: Finish tiling filtering for Gen6.
Gen6 only has one additional restriction over Gen7+, so we just add it
to the existing gen7 function (which actually covers later gens too).

This should stop FINISHME spew when running GL on Sandybridge.

v2: Fix bytes per block vs. bits per block confusion (Jason) and
    rename function to gen6_filter_tiling (Jason and Chad).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-15 21:21:50 -07:00
Jason Ekstrand ed65e6ef49 nir: Add a flag to lower_io to force "sample" interpolation
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-15 13:31:43 -07:00
Jason Ekstrand 89a96c8f43 anv/cmd_buffer: Set the L3 atomic disable mask bit in CHICKEN3 on HSW
Without this bit set, the value in "L3 Atomic Disable" won't get applied by
the hardware so we won't properly get L3 atomic caching.

Fixes dEQP-VK.spirv_assembly.instruction.compute.opatomic.compex and 198 of
the dEQP-VK.image.atomic_operations.* tests on HSW

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-09-14 17:53:16 -07:00
Jason Ekstrand a814e18c96 intel/blorp: Stop setting 3DSTATE_DRAWING_RECTANGLE
The Vulkan driver sets 3DSTATE_DRAWING_RECTANGLE once to MAX_INT x MAX_INT
at the GPU initialization time and never sets it again.  The GL driver sets
it every time the framebuffer changes.  Originally, blorp set it to the
size of the drawing area but meant we had to set it back in the Vulkan
driver.  Instead, we can easily just do that in the GL driver's blorp_exec
implementation and not set it in blorp core.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-14 17:51:16 -07:00
Jason Ekstrand b56f509ee0 intel/blorp: Emit 3DSTATE_MULTISAMPLE directly
Previously, we relied on a driver hook for 3DSTATE_MULTISAMPLE.  However,
now that Vulkan and GL use the same sample positions, we can set up
3DSTATE_MULTISAMPLE directly in blorp and delete the driver hook.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-14 17:51:16 -07:00
Jason Ekstrand c779ad3e66 intel: Move Vulkan sample positions to common code
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-14 17:51:16 -07:00
Sirisha Gandikota aa7b410592 aubinator: Remove bogus "end" parameter in gen_disasm_disassemble()
Earlier, the loop pretends to loop over instructions from "start" to "end",
but the callers always pass 8192 for end, which is some huge bogus
value. The real loop termination condition is send-with-EOT or 0. (Ken)

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-13 16:32:42 -07:00
Sirisha Gandikota 1ab92d80a8 aubinator: Make gen_disasm_disassemble handle split sends
Skylake adds new SENDS and SENDSC opcodes, which should be
handled in the send-with-EOT check. Make an is_send() helper
that checks if the opcode is SEND/SENDC/SENDS/SENDSC (Ken)

v2: Make is_send() much more crispier, Mix declaration and
code to make the code compact (Ken)

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-13 16:32:39 -07:00
Sirisha Gandikota 5d2440532f aubinator: Simplify print_dword_val() method
Remove the float/dword union and use the iter->p[f->start / 32]
directly as printf formatter %08x expects uint32_t (Ken)

v2: Make the cleanup much more crispier (Ken)

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-13 16:32:24 -07:00
Jason Ekstrand 1eebb60917 anv/image: Set correct base_array_layer and array_len for storage images
Since Vulkan doesn't allow single-slice 3D storage images, we need to just
set the base_array_layer and array_len to the full size of the 3-D LOD.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-13 14:45:49 -07:00
Jason Ekstrand 106709db7b Revert "intel/isl: Ignore base_array_layer and array_len for 3D storage..."
This reverts commit 3943888c94.  It turns out
that commit was pretty-much bogus since it breaks binding a 3-D texture as a
2-D storage image.  The correct fix for the Vulkan CTS tests needs to be in
the Vulkan driver itself rather than ISL.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-13 14:45:15 -07:00
Jason Ekstrand 330104464f anv: Use blorp for doing MSAA resolves
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-13 12:40:13 -07:00
Jason Ekstrand 6bcb1f753e anv: Use blorp for ClearColorImage
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-13 12:40:13 -07:00
Jason Ekstrand 57e87862eb anv: Delete meta_blit2d
Everything that we were once using the blit2d framework for is now done
with blorp.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-13 12:40:13 -07:00
Jason Ekstrand 36286ccb96 anv/blorp: Add a gcd_pow2_u64 helper and use it for buffer alignments
This is a lot cleaner and easier to read than the old piles of if
statements.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-09-13 12:40:13 -07:00
Jason Ekstrand af5d30de55 anv: Use blorp for CopyBuffer and UpdateBuffer
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-09-13 12:40:13 -07:00
Jason Ekstrand 0f1ca5407a anv: Use blorp for CopyImage
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 58593f24cb anv: Use blorp for CopyBufferToImage
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand f07f44a5bc anv: Use blorp for CopyImageToBuffer
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 9f44745eca anv: Use blorp to implement VkBlitImage
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 52fa3e8347 anv: Make image_get_surface_for_aspect_mask const
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 8f780af968 anv: Add initial blorp support
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 1fe8bf82b2 intel/anv: Use #defines for all __gen_ helpers
This allows us to #undef them later if we don't want them to persist

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 4a6c9e20b8 anv: Generalize emit_urb_setup
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 8cb144bd93 anv/pipeline: Roll compute_urb_partition into emit_urb_setup
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 823ab83432 intel/blorp: Use #defines for all __gen_ helpers
This allows us to #undef them later if we don't want them to persist

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand c0b9776cd6 intel/isl: Divide QPitch by 2 for 3-D stencil textures on SKL+
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-09-13 12:40:12 -07:00
Jason Ekstrand 00e79cec99 isl/state: Don't set QPitch for GEN4_3D surfaces
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-09-13 12:40:12 -07:00
Jason Ekstrand cb780c9ccf intel/blorp: Rework alloc_binding_table
The original blorp_alloc_binding_table helper was supposed to return the
binding table offset and map along with the surface state maps.  This isn't
quite what we want, however.  What we really want is the binding table
offsets, surface state offsets, and surface state maps.  In the GL driver,
the binding table map *is* an array of surface state offsets.  However, in
Vulkan, this isn't quite true as the entries in the binding table are
surface state offsets combined with another binding table block offset.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:11 -07:00
Jason Ekstrand 6ac469a6c3 anv/allocator: Use VG_NOACCESS_WRITE in anv_bo_pool_free
Previously, we were relying on the fact that VALGRIND_MEMPOOL_FREE came
later on in the function to prevent "link->bo = bo" from causing an invalid
write.  However, in the case where the size requested by the user is very
small (less than sizeof(struct anv_bo)), this isn't sufficient.  Instead,
we should call VALGRIND_MEMPOOL_FREE early and then use VG_NOACCESS_WRITE.
We do, however, have to call VALGRIND_MEMPOOL_FREE after reading bo_in
because it may be stored in the bo itself.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-13 10:44:03 -07:00
Jason Ekstrand 3943888c94 intel/isl: Ignore base_array_layer and array_len for 3D storage surfaces
The time we want to restrict the Z range of a 3-D surface is when rendering
to it.  For storage surfaces, we always want he full range.  However, we
still need to set MinimumArrayElement and RenderTargetViewExtent to
sensible values so we'll just set them to the reasonable defaults we used
before we started respecting the base_array_layer and array_len.

This fixes a bunch of Vulkan CTS regressions caused by 48f195d7c6.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97790
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-09-13 10:43:21 -07:00
Jason Ekstrand d038adca0e intel/isl: Add support for RGB formats in X and Y-tiled memory
Normally, using a non-linear tiling format helps improve cache locality by
ensuring that neighboring pixels are usually close-by in memory.  For RGB
formats, this still sort-of holds, but it can also lead to rather terrible
memory access patterns where a single RGB pixel value crosses a tile
boundary and gets split into two pieces in different 4K pages.  It also
makes for some rather awkward calculations because your tile size is no
longer an even multiple of surface element size.  For these reasons, we
chose to simply never create tiled RGB images in the Vulkan driver.

The GL driver, however, is not so kind so we need to support it somehow.  I
briefly toyed with a couple of different schemes but this is the best one I
could come up with.  The fundamental problem is that a tile no longer
contains an integer number of surface elements.  I briefly considered a
couple other options but found them wanting:

 1) Using floats for the logical tile size.  This leads to potential
    rounding error problems.

 2) When presented with a RGB format, just make the tile 3-times as wide.
    This isn't so nice because now our tiles are no longer power-of-two
    size.  Also, it can force the row_pitch to be larger than needed which,
    while not strictly a problem for ISL, causes incompatibility problems
    with the way the GL driver chooses surface pitches.

The chosen method requires that you pay attention and not just assume that
your tile_info is in the units you think it is.  However, it's nice because
it provides a nice "these are the units" declaration in isl_tile_info
itself.  Previously, the tile_info wasn't usable as a stand-alone structure
because you had to also know the format.  It also forces figuring out how
to deal with inconsistencies between tiling and format back to the caller
which is good because the two different consumers of isl_tile_info really
want to deal with it differently:  Computation of the surface size wants
the fewest number of horizontal tiles possible while get_intratile_offset
is far more concerned with things aligning nicely.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Chad Versace <chadversary@chromium.org>
2016-09-12 19:44:05 -07:00
Jason Ekstrand 883086500b intel/isl: Allow valign2 for texture-only Y-tiled surfaces on gen7
The restriction that Y-tiled surfaces must have valign == 4 only aplies to
render targets but we were applying it universally.  This causes problems
if ISL_FORMAT_R32G32B32_FLOAT is used because it requires valign == 2; this
should be okay because you can't render to that format.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-09-12 19:44:05 -07:00
Jason Ekstrand 54db5afd2c intel/blorp: Work in terms of logical array layers
When Ivy Bridge introduced array multisampling, someone made the decision
to do lots of stuff throughout the driver in terms of physical array layers
rather than logical array layers.  In ISL, we use logical array layers most
of the time and it really makes no sense to use physical array layers in
the blorp API.  Every time someone passes physical array layers into blorp
for an array multisampled surface, they're always divisible by the number
of samples and we divide right away.

Eventually, I'd like to rework most of the GL driver internals to use
logical array layers but that's going to be a big project and will probably
happen as part of the ISL conversion.  For now, we'll do the conversion in
brw_blorp and let blorp just use the logical layers.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00