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Author SHA1 Message Date
José Fonseca 70fe7c6d3e mesa,gallium,egl,mapi: One definition of C99 inline/__func__ to rule them all. 
We were in four already...

NOTE: Candidate for the stable branches.

Reviewed-by: Brian Paul <brianp@vmware.com>
 2013-03-12 22:06:27 +00:00
José Fonseca 96b3ca89b1 scons: Allows choosing VS 10 or 11. 
NOTE: Candidate for the stable branches.

Reviewed-by: Brian Paul <brianp@vmware.com>
 2013-03-12 22:04:04 +00:00
Michel Dänzer 4dca602521 radeonsi: Fix off-by-one for maximum vertex element index in some cases 
In cases where the vertex element size is smaller than the vertex buffer
stride, the previous calculation could end up 1 too low. This would result
in the GPU using index 0 instead of the maximum index for those elements,
which would be visible as intermittent distorted triangles.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2013-03-12 18:25:54 +01:00
Christoph Bumiller 8aa8b0539e nvc0: avoid crash on updating RASTERIZE_ENABLE state 
When doing a blit with the 3D engine, the rasterizer or zsa cso may
be NULL.
 2013-03-12 12:55:37 +01:00
Christoph Bumiller 4d28aff48f gallium/tests: check format in compute tests, make selectable 2013-03-12 12:55:37 +01:00
Christoph Bumiller e2dded78ea nvc0: add MP trap handler for nve4 2013-03-12 12:55:37 +01:00
Christoph Bumiller ae59a7d35d nvc0: they removed the NTID,NCTAID,GRIDID registers on nve4 2013-03-12 12:55:37 +01:00
Christoph Bumiller e066f2f62f nvc0: implement compute support for nve4 2013-03-12 12:55:37 +01:00
Christoph Bumiller 75f1f852b0 nvc0/ir: try to fix CAS (CompareAndSwap) 2013-03-12 12:55:37 +01:00
Christoph Bumiller 18fdfbdc32 nv50/ir: add CCTL (cache control) op 2013-03-12 12:55:37 +01:00
Christoph Bumiller 9db7e09cb4 nvc0/ir/emit: fix emission of large address offsets 2013-03-12 12:55:36 +01:00
Christoph Bumiller 175c185941 nvc0: add SHADER/COMPUTE_RESOURCE bind flags to format table 2013-03-12 12:55:36 +01:00
Christoph Bumiller 19ea0bd521 nouveau: align PIPE_BIND_SHADER,COMPUTE_RESOURCEs to 256 bytes 2013-03-12 12:55:36 +01:00
Christoph Bumiller 47f2179844 nv50,nvc0: copy writable flag on surface creation 2013-03-12 12:55:36 +01:00
Christoph Bumiller 7a91d3a2a4 nv50/ir: add support for different sampler and resource index on nve4 
And remove non-working code for indirect sampler/resource selection.
Will be added back later.

Includes code from "nv50/ir/tgsi: Resource indirect indexing" by
Francisco Jerez (when mixing the R and S handles we can only specify
them via a register, i.e. indirectly, unless we upload all the used
handle combinations to c[] space, which we don't for now).
 2013-03-12 12:55:36 +01:00
Christoph Bumiller 99e4eba669 nv50/ir: implement splitting of 64 bit ops after RA 2013-03-12 12:55:36 +01:00
Christoph Bumiller ac9f19e485 nvc0/ir: skip back edges when determining latest sched value 2013-03-12 12:55:36 +01:00
Christoph Bumiller f07c46a4f4 nvc0/ir: use large issue delay after RET, too 2013-03-12 12:55:36 +01:00
Christoph Bumiller b23ec3f8ba nv50/ir: fix size adjustment for sched info for multiple functions 2013-03-12 12:55:36 +01:00
Christoph Bumiller d39169cb6d nv50/ir: print function inputs and outputs 2013-03-12 12:55:36 +01:00
Christoph Bumiller 1b4faa2b17 nv50/ir/ssa: add a few comments regarding RenamePass 2013-03-12 12:55:36 +01:00
Francisco Jerez 1535b754fb nv50/ir/tgsi: Exclude local declarations from function prototypes. 2013-03-12 12:55:36 +01:00
Christoph Bumiller 9b563ef3f7 nv50/ir/opt: try to make use of SUCLAMP addend 2013-03-12 12:55:36 +01:00
Christoph Bumiller a788be19e5 nv50/ir: don't assert on type in Modifier.applyTo if it is 0 2013-03-12 12:55:35 +01:00
Christoph Bumiller c3a5bc0bdf nv50/ir: add support for barriers 
nv50 part by Francisco Jerez.
 2013-03-12 12:55:35 +01:00
Christoph Bumiller a0a25191f2 nv50/ir/tgsi: add support for atomics 2013-03-12 12:55:35 +01:00
Christoph Bumiller c2dfcd7f0e nv50/ir/tgsi: handle TGSI_OPCODE_LOAD,STORE 
Squashed and (heavily) modified original patches by Francisco Jerez:
nv50/ir/tgsi: Implement resource LOAD/STORE (wip).
nv50/ir/tgsi: Emit SUST/SULD for surface access, and add CB LOAD/STORE support
nv50/ir/tgsi: Fix/clean up the LOAD/STORE handling code.

Left out for now:
nv50/ir/tgsi: Resource indirect indexing

Treating raw, read-only surfaces as constant buffers (CBs) was removed
because CBs are limited to a size of 64 KiB which isn't desireable, and
because this decision should probably be made by the state tracker.
If we used a number of CB slots for surfaces, it might find that we
cannot accomodate the advertised limit.
 2013-03-12 12:55:35 +01:00
Christoph Bumiller d105b3df14 nvc0/ir: don't replace load from input in COMPUTE progs with VFETCH 2013-03-12 12:55:35 +01:00
Christoph Bumiller 4506ed28de nvc0/ir: implement lowering of surface ops for nve4 2013-03-12 12:55:35 +01:00
Christoph Bumiller 8ac68b071d nvc0/ir: add formatted surface load lib code, move to extra header 
OpenGL is nice and makes the user specify a format with an image unit.
OpenCL is evil and doesn't, and what's better than adding a huge load
of functions that we call indirectly to handle the conversion ?
 2013-03-12 12:55:35 +01:00
Christoph Bumiller ce1951daed nv50/ir: extend moveSources for delta < 0 2013-03-12 12:55:35 +01:00
Christoph Bumiller c0fc3463e9 nvc0/ir: lower atomics in s[] 2013-03-12 12:55:35 +01:00
Christoph Bumiller 9c196779bc nvc0/ir/emit: implement INSBF, EXTBF, PERMT and ATOM 2013-03-12 12:55:35 +01:00
Christoph Bumiller c8f0c43f7a nv50/ir/emit: handle OP_ATOM 2013-03-12 12:55:35 +01:00
Christoph Bumiller d6c95f6819 nvc0/ir/target: some ops can't be predicated, e.g. CALL 2013-03-12 12:55:35 +01:00
Christoph Bumiller 1ed507ca46 nv50/ir/opt: CALLs cannot load 2013-03-12 12:55:35 +01:00
Christoph Bumiller c893b94060 nv50/ir: add support for indirect BRA,CALL 2013-03-12 12:55:34 +01:00
Christoph Bumiller efe55075b5 nvc0/ir/emit: implement move to and logic ops on predicates 2013-03-12 12:55:34 +01:00
Christoph Bumiller ce7610f7d5 nvc0/ir/emit: implement surface related ops 2013-03-12 12:55:34 +01:00
Christoph Bumiller 3741b7d844 nv50/ir: initialize CodeEmitters' specialized target fields 2013-03-12 12:55:34 +01:00
Christoph Bumiller b0fc2f13ec nv50/ir/opt: make optimization aware of atomics, barriers, surface ops 2013-03-12 12:55:34 +01:00
Christoph Bumiller 22b762f9b4 nv50/ir: add various new OPs that will be needed for compute 2013-03-12 12:55:34 +01:00
Francisco Jerez c82714c593 nv50/ir: Rename "mkLoad" to "mkLoadv" for consistency. 2013-03-12 12:55:34 +01:00
Christoph Bumiller cc30ce8160 nv50/ir: fix comparison of system values 2013-03-12 12:55:34 +01:00
Francisco Jerez 4ddfdcea04 nv50/ir/tgsi: Translate grid-related system parameters. 2013-03-12 12:55:34 +01:00
Francisco Jerez 8446c31d0e nv50/ir/tgsi: Accept COMPUTE programs. 2013-03-12 12:55:34 +01:00
Christoph Bumiller e9294e11b4 nv50/ir/ra: make sure all used function inputs get assigned a reg 
A live range [0, 0) counts as empty. For function inputs this can
be a problem, so insert a nop at the beginning to make it [0, 1).
This is a bit of a hack but also the most simple solution.
 2013-03-12 12:55:34 +01:00
Christoph Bumiller ee431b12ec nv50/ir/ra: also add pre-existing MERGE,SPLIT to constraint list 2013-03-12 12:55:34 +01:00
Christoph Bumiller f1dfa414f4 nv50/ir/ra: fix confusion with conditional RegisterSet::occupy 2013-03-12 12:55:34 +01:00
Christoph Bumiller d995f44f0b nv50/ir/ra: swap copyCompound args if src is compound and dst isn't 2013-03-12 12:55:33 +01:00