Commit Graph

118955 Commits

Author SHA1 Message Date
Vasily Khoruzhick 4f5bfe2a5e lima: don't reload and redraw tiles that were not updated
We don't need to reload and redraw some tiles if framebuffer was not
cleared and scissor test was enabled for some of draws. This simple
optimization fixes cursor lag in X11

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2020-01-05 00:16:36 -08:00
Vasily Khoruzhick 83abdf8e45 lima: postpone PP stream generation
This commit postpones PP stream generation till job is submitted.
Doing that this late allows us to skip reloading and redrawing tiles
that were not updated.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2020-01-05 00:16:33 -08:00
Andreas Baierl 7ad1896ab8 lima/parser: Fix VS cmd stream parser
prefetch is int, not bool.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
2020-01-05 03:08:01 +00:00
Andreas Baierl af7dc4675d lima/parser: Fix rsw parser
Drop assert as it is not necessary and used wrong anyway.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
2020-01-05 03:08:01 +00:00
Kenneth Graunke defb3a9465 anv: Only enable EWA LOD algorithm when doing anisotropic filtering.
Updated documentation renames "Anisotropic Algorithm" to "LOD Algorithm"
and adds a note for Gen9+ saying "The EWA Algorithm should only be
enabled for Anisotropic Filtering modes." and indicating that the extra
accuracy shouldn't be necessary for other modes, and comes at a cost.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2020-01-04 14:27:22 -08:00
Kenneth Graunke c0c899cf78 iris: Allow HiZ for copy_region sources
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2020-01-04 12:25:55 -08:00
Jason Ekstrand 7d75bf4f3f i965: Allow HiZ for glCopyImageSubData sources
v2 (Ken): Handle platforms without sampler support for HiZ

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v2 changes]
2020-01-04 12:25:55 -08:00
Jason Ekstrand 52ad1712ed anv: Allow HiZ in TRANSFER_SRC_OPTIMAL on Gen8-9
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-01-04 12:25:54 -08:00
Jason Ekstrand b274469daa intel/blorp: Use the source format when using blorp_copy with HiZ
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-01-04 12:25:54 -08:00
Jason Ekstrand ea7446ba82 i965/blorp: Don't resolve HiZ unless we're reinterpreting
This eliminates 50% of pixels (2M) rendered for a blit in GS:GO.  This
accounts for 3% of pixels rendered in the game.  Total GPU clocks for
the first 900 frames of CSGO improves by 1%.

Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-01-04 12:25:54 -08:00
Jason Ekstrand 95cc5438eb blorp: Allow reading with HiZ
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-01-04 12:25:54 -08:00
Jason Ekstrand 4a1093005c blorp: Stop whacking Z24 depth to BGRA8
The shader code required to do this is int(sat(x) * UINT24_MAX) which
isn't really worth all the effort to avoid.  Doing the format
conversion, on the other hand, prevents us from sampling with HiZ which
is something that we very much want on gen8-9 where we can.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-01-04 12:25:54 -08:00
Christian Gmeiner a597a64ae2 etnaviv: move descriptor based texture structs
This moves the descriptor based texture structs and their helpers
into the only user.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
2020-01-04 20:44:36 +01:00
Christian Gmeiner 7c687d221d etnaviv: move state based texture structs
This moves the state based texture structs and their helpers
into the only user.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
2020-01-04 20:44:36 +01:00
Roman Stratiienko ed0fa78b46 panfrost: Fix Android build
Include missing `encoder/pan_props.c` into the build.

Signed-off-by: Roman Stratiienko <roman.stratiienko@globallogic.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2020-01-04 16:54:38 +00:00
Gert Wollny 9162e2f03f mesa/st: glsl_to_nir: don't lower atomics to SSBOs if driver supports HW atomics
At least on r600 HW atomic operations are way less expensive than SSBO atomic
operations.

v2: use st->has_hw_atomics (Erik Anholt)

v3: remove second invocation of atomic to ssbo lowering (Erik Anholt)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny b119f8b4a0 r600: Delete vertex buffer only if there is actually a shader state
Fixes: gl-2.0-vertexattribpointer
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny 32bb5f2941 r600: Make SID and unsigned value
The value is never negative, and makeing it unsigned fixes some
warnings

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny e8559ae448 r600: Fix maximum line width
There are only 13 bits available to store the line width, hence
it can't be larger than 8191

v2: Add Fixes tag

v3: - Unify value since for all r600 archs (Konstantin Kharlamov)
    - Correct the value the line width value is emitted as a 12.4
      fixed point value of 1/2 line width on r600-r700 and as
      8 * line width on Evergreen and newer.

Fixes: 06bfb2d28f
    r600: fork and import gallium/radeon

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny 829107819d r600/sb: Correct SB disassambler for better debugging
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny bfbdaf9a46 r600: Make it possible to include r600_asm.h in a C++ file
Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny 23c5ba8baa r600: Add functions to dump the shader info
This will be helpful to compare TGSI and NIR code path,

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny 570a6c6c79 gallium: tgsi_from_mesa - handle VARYING_SLOT_FACE
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny 6c9495b392 nir: make nir_get_texture_size/lod available outside nir_lower_tex
This functions can be useful in other places.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Gert Wollny f69bf7fe8c gallium/tgsi_from_mesa: Add 'extern "C"' to be able to include from C++
The r600/nir backend is in C++ and needs to include this file.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
2020-01-04 16:22:40 +00:00
Bas Nieuwenhuizen 96c9483ccf spirv: Fix glsl type assert in spir2nir.
Fixes: 624789e370 "compiler/glsl: handle case where we have multiple users for types"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-01-04 15:53:24 +00:00
Christian Gmeiner b178262cb9 etnaviv: use a better name for FE_VERTEX_STREAM_UNK14680
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2020-01-04 14:15:36 +01:00
Bas Nieuwenhuizen 17741a0a05 radv: Only use the gfx mipmap level offset/pitch for linear textures.
The tiled-case is non-sensical for non-base mips, but Vulkan requires
that this function handles it but at the same time does not require
returning anything useful. So we can basically return anything.

Correct tiled pitch and offset are still required for our own WSI and
in the future getting the layouts of images with DRM format modifiers.
Both don't have to deal with images with more than 1 level though.

Fixes: 824bd0830e "radv: return the correct pitch for linear mipmaps on GFX10"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2301
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2304
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-01-04 13:04:40 +01:00
Bas Nieuwenhuizen f0ed67b770 Revert "amd/common: Always initialize gfx9 mipmap offset/pitch."
This reverts commit 973181c06c.

Requested by Marek.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-01-04 13:04:40 +01:00
Kenneth Graunke 645b195312 iris: Delete remnants of the unimplemented ASTC 5x5 workaround
I copy and pasted some of the boilerplate but never the implementation.
For now, ASTC 5x5 is disabled and faked via uncompressed RGBA; let's
delete these remnants until such a time when we implement it properly.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2020-01-03 18:06:38 -08:00
Kenneth Graunke e858321f09 iris: Disable ASTC 5x5 support on Gen9 for now.
Intel Gen9 hardware has some nasty restrictions where ASTC 5x5 formats
and color compression can't both live in the sampler cache at the same
time.  To properly support it, we have to track which of those exist
in the cache and flush ASTC out or resolve away compression.

As far as I'm aware, very little uses ASTC 5x5 textures, so instead
of replicating all that for iris, we simply turn it off and rely on
the Gallium fallback mechanism to fake it via uncompressed RGBA.

This should avoid GPU hangs any time people use ASTC 5x5 with CCS.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2020-01-03 18:06:38 -08:00
Kenneth Graunke 8e6308363b st/mesa: Allow ASTC5x5 fallbacks separately from other ASTC LDR formats.
This patch allows us to fake ASTC 5x5 specifically, while leaving the
other ASTC LDR formats with native support.  I plan to use this in iris,
at least for the time being.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-01-03 18:06:35 -08:00
Erik Faye-Lund 56fc791b31 etnaviv: use nir_lower_clip_halfz instead of open-coding
We already have a helper for this, so let's use that instead of rolling
our own version.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Paul Cercueil <paul@crapouillou.net>
2020-01-03 22:48:19 +00:00
Erik Faye-Lund d9ff5f0414 nir/zink: move clip_halfz-lowering to common code
Etnaviv also does the same thing, so let's try to avoid repetition here,
and use the same for it code as well.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Paul Cercueil <paul@crapouillou.net>
2020-01-03 22:48:19 +00:00
Erik Faye-Lund 5c2376af63 zink: remove unused code-path in lower_pos_write
This code is never reached, because we don't call nir_lower_io before
lowering this. So let's get rid of it.
2020-01-03 22:48:19 +00:00
Erik Faye-Lund 87b3d8dce5 zink: use nir_fmul_imm
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Paul Cercueil <paul@crapouillou.net>
2020-01-03 22:48:19 +00:00
Erik Faye-Lund e51bf4914c zink: implement load_vertex_id
Not 100% sure if this matches the semantics, but it seems to pass the
tests, so it seems like an improvement.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2020-01-03 22:20:12 +00:00
Erik Faye-Lund 1b2731f268 zink: factor out builtin-var creation
This is useful so we can reuse it for the next patch

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2020-01-03 22:20:12 +00:00
Erik Faye-Lund ce1ea6e9c2 zink: simplify front-face type
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2020-01-03 22:20:12 +00:00
Caio Marcelo de Oliveira Filho 75a19186b2 anv: Ignore some CreateInfo structs when rasterization is disabled
According to the description of VkGraphicsPipelineCreateInfo(),
pViewportState, pMultisampleState, pDepthStencilState and
pColorBlendState must be ignored when rasterization is not enabled.

This avoids potentially invalid pointers being dereferenced when
rasterization is disabled.  Tested with `demos_x64 VK_Parameter_Zoo`
from Renderdoc repository.

v2: Don't store the `raster_enabled` as part of anv_pipeline, just
    query it from the create info.  This avoids storing a state that's
    only used during pipeline creation. (Jason)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2258
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch> [v1]
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2020-01-03 13:57:31 -08:00
Caio Marcelo de Oliveira Filho 6755b6315b anv: Drop unused function parameter
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2020-01-03 13:29:49 -08:00
Marek Olšák 66483ee017 radeonsi: remove the "display_dcc_offset == 0" assertion
I think it's not needed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-03 15:07:19 -05:00
Marek Olšák bfddfd12b6 radeonsi: ignore PIPE_BIND_SCANOUT for imported textures
It's obtained from the BO metadata.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-03 15:07:17 -05:00
Marek Olšák ba10fb3f7f radeonsi: preserve the scanout flag for shared resources on gfx9 and gfx10
Closes: #2195
Closes: #2294

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-03 15:07:11 -05:00
Vasily Khoruzhick 1de06e540a lima: fix allocation of GP outputs storage for indexed draw
For indexed draw number of VS invocations is (ctx->max_index - ctx->min_index + 1),
so we have to use this number when calculating space for varyings, gl_Position and
gl_PointSize.

Fixes dEQP-GLES2.functional.buffer.write.use.index_array.array and
dEQP-GLES2.functional.buffer.write.use.index_array.element_array

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2020-01-03 18:57:36 +00:00
Jason Ekstrand 9bd8000c6c anv: Drop unneeded struct keywords
All VkFoo structs are typedef'd to not need the struct keyword.  Leaving
it in there is just extra characters and breaks Vulkan's aliasing when
stuff gets promoted to core versions.  It's better to just never use
struct for VkFoo.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2020-01-03 11:32:34 -06:00
Thong Thai 8dc7c467e6 r600: Remove HEVC related code since HEVC is not supported
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
2020-01-03 16:30:22 +00:00
Thong Thai 466001a226 radeon: Use P010 for decoding of 10-bit videos
Previously, P016 was used for the decoding of 10-bit HEVC/H.265 encoded
videos, which worked fine for mpv and ffmpeg. GStreamer specifically looks
for P010, so this patch sets the default buffer type to P010 for HEVC
decoding.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
2020-01-03 16:30:22 +00:00
Thong Thai 68881af435 st/va: Add support for P010, used for 10-bit videos
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
2020-01-03 16:30:22 +00:00
Thong Thai f3569f215d gallium: Add PIPE_FORMAT_P010 support
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
2020-01-03 16:30:22 +00:00