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anv: Ignore some CreateInfo structs when rasterization is disabled 

According to the description of VkGraphicsPipelineCreateInfo(),
pViewportState, pMultisampleState, pDepthStencilState and
pColorBlendState must be ignored when rasterization is not enabled.

This avoids potentially invalid pointers being dereferenced when
rasterization is disabled.  Tested with `demos_x64 VK_Parameter_Zoo`
from Renderdoc repository.

v2: Don't store the `raster_enabled` as part of anv_pipeline, just
    query it from the create info.  This avoids storing a state that's
    only used during pipeline creation. (Jason)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2258
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch> [v1]
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Caio Marcelo de Oliveira Filho 2020-01-03 13:23:32 -08:00
parent 6755b6315b
commit 75a19186b2
2 changed files with 38 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
src/intel/vulkan/anv_pipeline.c
View File

@ -1155,12 +1155,15 @@ anv_pipeline_compile_graphics(struct anv_pipeline *pipeline,
case MESA_SHADER_GEOMETRY:
populate_gs_prog_key(devinfo, sinfo->flags, &stages[stage].key.gs);
break;
case MESA_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT: {
const bool raster_enabled =
!info->pRasterizationState->rasterizerDiscardEnable;
populate_wm_prog_key(devinfo, sinfo->flags,
pipeline->subpass,
info->pMultisampleState,
raster_enabled ? info->pMultisampleState : NULL,
&stages[stage].key.wm);
break;
}
default:
unreachable("Invalid graphics shader stage");
}
@ -1861,9 +1864,10 @@ anv_pipeline_init(struct anv_pipeline *pipeline,
pipeline->mem_ctx = ralloc_context(NULL);
pipeline->flags = pCreateInfo->flags;
assert(pCreateInfo->pRasterizationState);
copy_non_dynamic_state(pipeline, pCreateInfo);
pipeline->depth_clamp_enable = pCreateInfo->pRasterizationState &&
pCreateInfo->pRasterizationState->depthClampEnable;
pipeline->depth_clamp_enable = pCreateInfo->pRasterizationState->depthClampEnable;
/* Previously we enabled depth clipping when !depthClampEnable.
* DepthClipStateCreateInfo now makes depth clipping explicit so if the
@ -1875,8 +1879,10 @@ anv_pipeline_init(struct anv_pipeline *pipeline,
PIPELINE_RASTERIZATION_DEPTH_CLIP_STATE_CREATE_INFO_EXT);
pipeline->depth_clip_enable = clip_info ? clip_info->depthClipEnable : !pipeline->depth_clamp_enable;
pipeline->sample_shading_enable = pCreateInfo->pMultisampleState &&
pCreateInfo->pMultisampleState->sampleShadingEnable;
pipeline->sample_shading_enable =
!pCreateInfo->pRasterizationState->rasterizerDiscardEnable &&
pCreateInfo->pMultisampleState &&
pCreateInfo->pMultisampleState->sampleShadingEnable;
pipeline->needs_data_cache = false;

38
src/intel/vulkan/genX_pipeline.c
View File

@ -2103,6 +2103,24 @@ genX(graphics_pipeline_create)(
return result;
}
/* If rasterization is not enabled, various CreateInfo structs must be
* ignored.
*/
const bool raster_enabled =
!pCreateInfo->pRasterizationState->rasterizerDiscardEnable;
const VkPipelineViewportStateCreateInfo *vp_info =
raster_enabled ? pCreateInfo->pViewportState : NULL;
const VkPipelineMultisampleStateCreateInfo *ms_info =
raster_enabled ? pCreateInfo->pMultisampleState : NULL;
const VkPipelineDepthStencilStateCreateInfo *ds_info =
raster_enabled ? pCreateInfo->pDepthStencilState : NULL;
const VkPipelineColorBlendStateCreateInfo *cb_info =
raster_enabled ? pCreateInfo->pColorBlendState : NULL;
const VkPipelineRasterizationLineStateCreateInfoEXT *line_info =
vk_find_struct_const(pCreateInfo->pRasterizationState->pNext,
PIPELINE_RASTERIZATION_LINE_STATE_CREATE_INFO_EXT);
@ -2112,19 +2130,17 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pInputAssemblyState,
pCreateInfo->pRasterizationState,
pCreateInfo->pMultisampleState,
line_info, pass, subpass);
emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
pCreateInfo->pMultisampleState);
compute_kill_pixel(pipeline, pCreateInfo->pMultisampleState, subpass);
ms_info, line_info, pass, subpass);
emit_ms_state(pipeline, ms_info);
emit_ds_state(pipeline, ds_info, pass, subpass);
emit_cb_state(pipeline, cb_info, ms_info);
compute_kill_pixel(pipeline, ms_info, subpass);
emit_urb_setup(pipeline);
emit_3dstate_clip(pipeline,
pCreateInfo->pInputAssemblyState,
pCreateInfo->pViewportState,
vp_info,
pCreateInfo->pRasterizationState);
emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState);
@ -2154,10 +2170,8 @@ genX(graphics_pipeline_create)(
emit_3dstate_wm(pipeline, subpass,
pCreateInfo->pInputAssemblyState,
pCreateInfo->pRasterizationState,
pCreateInfo->pColorBlendState,
pCreateInfo->pMultisampleState, line_info);
emit_3dstate_ps(pipeline, pCreateInfo->pColorBlendState,
pCreateInfo->pMultisampleState);
cb_info, ms_info, line_info);
emit_3dstate_ps(pipeline, cb_info, ms_info);
#if GEN_GEN >= 8
emit_3dstate_ps_extra(pipeline, subpass);
emit_3dstate_vf_topology(pipeline);