Commit Graph

55655 Commits

Author SHA1 Message Date
Chad Versace e34fe8bd20 android: Define PACKAGE_VERSION/BUGREPORT in CFLAGS
This fixes the Android build. Commit 439c3d4 broke it.

CC: Adrian M Negreanu <adrian.m.negreanu@intel.com>
CC: Matt Turner <mattst@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2013-03-20 15:11:41 -07:00
Kenneth Graunke d24819dce8 i965/vs: Add IR dumping for immediates.
This makes dump_instructions more useful.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-20 10:40:44 -07:00
Kenneth Graunke 095c3755ee glsl: Add built-in functions for GLSL 1.50.
This makes basic built-in functions work in GLSL 1.50.  It supports
everything except the new Geometry Shader functions.

The new 150.glsl file is 140.glsl plus ARB_texture_multisample.glsl;
150.frag is identical to 140.frag except for the #version bump.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2013-03-20 10:38:40 -07:00
Kenneth Graunke bcdda04349 glsl: Add sampler2DMS/sampler2DMSArray types to GLSL 1.50.
GLSL 1.50 includes support for the new sampler types introduced by
the ARB_texture_multisample extension.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2013-03-20 10:38:38 -07:00
Kenneth Graunke f1ca2ed538 glsl: Bump standalone compiler versions to 1.50.
The version bumps are necessary in order to compile built-ins for 1.50.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2013-03-20 10:38:20 -07:00
Kenneth Graunke d86efc075e i965: Don't use texture swizzling to force alpha to 1.0 if unnecessary.
Commit 33599433c7 began setting the texture swizzle mode to XYZ1 for
RED, RG, and RGB textures in order to force alpha to 1.0 in case we
actually stored the texture as RGBA.

This had a unforseen performance implication: the shader precompile
assumes that the texture swizzle mode will be XYZW for non-shadow
sampler types.  By setting it to XYZ1, this means every shader used with
a RED, RG, or RGB texture has to be recompiled.  This is a very common
case.

Unfortunately, there's no way to improve the precompile, since RGBA
textures still need XYZW, and there's no way to know by looking at
the shader source what texture formats might be used.

However, we only need to smash alpha to 1.0 if the texture's memory
format actually has alpha bits.  If not, the sampler already returns 1.0
for us without any special swizzling.  XRGB8888, for example, is a very
common case where this occurs.

This partially fixes a performance regression since commit 33599433c7.
More work is required to fully fix it in all cases.  This at least helps
Warsow.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Carl Worth <cworth@cworth.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2013-03-20 10:37:34 -07:00
Kenneth Graunke 2dd22130cd i965: Don't print a fatal-looking message if intelCreateContext fails.
With the old context creation mechanism, an application asked the GL to
give it a context.  Failing to produce a context was a fatal error.

Now, with GLX_ARB_create_context, the application can request a specific
version.  If it's higher than the maximum version we support, context
creation will fail.  But this is a normal error that applications
recover from.

In particular, the new glxinfo tries to create OpenGL 4.3, 4.2, 4.1,
4.0, 3.3, and 3.2 contexts before finally succeeding at creating a 3.1
context.  This led to it printing the following message 6 times:
"brwCreateContext: failed to init intel context"

There's no need to alarm users (and developers) with such a message.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-20 10:37:34 -07:00
Eric Anholt 1f112ccf02 i965/gen7: Align all depth miplevels to 8 in the X direction.
On an INTEL_DEBUG=perf piglit run on IVB, reduces the instances of "HW
workaround: blit" (the printouts from the misaligned-depth workaround
blits) from 725 to 675.

It doesn't totally eliminate the workaround blit, because we still have
problems with Y offsets that we can't fix (since texturing can only align
miplevels up to 2 or 4, not 8).

No regressions on piglit/es3conform on IVB.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-03-20 10:18:44 -07:00
Christoph Bumiller 529dbbfcf7 nvc0: fix max varying count, move CLIPVERTEX,FOG out of the way
The card spews an error if I use all 128 generic slots.
Apparently the real limit isn't just dictated by the address space
layout.
2013-03-20 12:25:21 +01:00
Christoph Bumiller 8acaf862df gallium: add TGSI_SEMANTIC_TEXCOORD,PCOORD v3
This makes it possible to identify gl_TexCoord and gl_PointCoord
for drivers where sprite coordinate replacement is restricted.

The new PIPE_CAP_TGSI_TEXCOORD decides whether these varyings
should be hidden behind the GENERIC semantic or not.

With this patch only nvc0 and nv30 will request that they be used.

v2: introduce a CAP so other drivers don't have to bother with
the new semantic

v3: adapt to introduction gl_varying_slot enum
2013-03-20 12:25:21 +01:00
Ian Romanick 3eaf823b90 docs: import release notes for 9.1.1, add news item
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2013-03-19 17:46:30 -07:00
Kristian Høgsberg 939789e48d gallium-egl: Fix compile errors introduced in de315f76a
The commit changed API in a helper library shared by both egl_dri2 and
the gallium egl state tracker, but only egl_dri2 was updated to use the
new interface.

Tested-by: Giulio Camuffo <giuliocamuffo@gmail.com>
2013-03-19 20:17:47 -04:00
Paul Berry 995bbc2256 i965/fs: Avoid unnecessary recompiles due to POS bit of proj_attrib_mask.
Previous to this patch, when using fixed function fragment shading,
bit VARYING_BIT_POS of brw_wm_prog_key::proj_attrib_mask was being set
differently during precompiles and normal usage.  During precompiles
it was being set only if the fragment shader reads from window
position (which it never does), so it was always being set to 0.
During normal usage it was being set if the vertex shader writes to
all 4 components of gl_Position (which it usually does), so it was
usually being set to 1.  As a result, we were almost always doing an
extra recompile for the fixed function fragment shader.

The recompile was totally unnecessary, though, because
brw_wm_prog_key::proj_attrib_mask is only consulted for
fs_visitor::emit_general_interpolation(), which isn't used for
VARYING_SLOT_POS.

This patch avoids the unnecessary recompile by always setting bit
VARYING_BIT_POS of brw_wm_prog_key::proj_attrib_mask to 1.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-03-19 16:56:58 -07:00
Paul Berry db81d3b8f7 ff_fragment_shader: Don't do unnecessary (and dangerous) uniform setup.
Previously, right after calling _mesa_glsl_link_shader(), the fixed
function fragment shader code made several calls with the ostensible
purpose of setting up uniforms for the fragment shader it just
created.

These calls are unnecessary, since _mesa_glsl_link_shader() calls
driver->LinkShader(), which takes care of calling these functions (or
their equivalent).  Also, they are dangerous to call after
_mesa_glsl_link_shader() has returned, because on back-ends such as
i965 which do precompilation, _mesa_glsl_link_shader() may have
already cached pointers to the existing uniform structures; attempting
to set up the uniforms again invalidates those cached pointers.

It was only by sheer coincidence that this wasn't manifesting itself
as a bug.  It turns out that i965's precompile mechanism was always
setting bit 0 of brw_wm_prog_key::proj_attrib_mask to 0 for fixed
function fragment shaders, but during normal usage this bit usually
gets set to 1.  As a result, the precompiled shader (with its invalid
uniform pointers) was not being used.

I'm about to introduce some changes that cause bit 0 of
proj_attrib_mask to be set consistently between precompilation and
normal usage, so to avoid regressions I need to get rid of the
dangerous duplicate uniform setup code first.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-03-19 16:56:56 -07:00
Paul Berry 0af56c9d53 i965: Avoid unnecessary copy when depthstencil workaround invoked by clear.
Since apps typically begin rendering with a call to glClear(), it is
likely that when brw_workaround_depthstencil_alignment() moves a
miplevel to a temporary buffer, it can avoid doing a blit, since the
contents of the miplevel are about to be erased.

This patch adds the necessary plumbing to determine when
brw_workaround_depthstencil_alignment() is being called as a
consequence of glClear(), and avoids the unnecessary blit when it is
safe to do so.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

v2: Eliminate unnecessary call to _mesa_is_depthstencil_format().  Fix
handling of depth buffer in depth/stencil format.

v3: Use correct bitfields for clear_mask.  Fix handling of depth
buffer in depth/stencil format when hardware uses separate stencil.
When invalidating, make sure we still reassociate the image to the new
miptree.

Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-19 16:56:51 -07:00
Alex Deucher 49c1fc7044 r600g: don't emit SQ_DYN_GPR_RESOURCE_LIMIT_1 on cayman
Doesn't exist on the asic and will cause a CS rejection
if VM is disabled.

Note: this is a candidate for the 9.1 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-19 18:13:27 -04:00
Alex Deucher a9914117ea r600g: emit DB_SRESULTS_COMPARE_STATE0 on r6xx/r7xx
Not using HiS yet, but matches what we do on evergreen+.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-19 18:13:26 -04:00
Brian Paul c45d22e26a winsys/svga: improve error/debug message output
Use vmw_printf() just for extra debugging info (off by default).
Use vmw_error() for real errors/failures/etc that we definitely
want to report.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2013-03-19 15:18:38 -06:00
Brian Paul 460a4444e8 tgsi: fix uninitialized declaration array fields
Fixes a few regressions since the TGSI array changes.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2013-03-19 15:15:37 -06:00
Kristian Høgsberg 1670737436 egl_dri2: Lower __DRI_IMAGE version requirement back to 1
We check the extension version manually instead and verify that we have
the createImageFromFds function before enabling prime fd passing.
2013-03-19 16:13:38 -04:00
Maarten Lankhorst 7c3d8301af radeon/llvm: Do not link against libgallium when building statically.
NOTE: This is a candidate for the 9.1 branch.

Tested-by: Vincent Lejeune <vljn@ovi.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-03-19 20:20:33 +01:00
Matt Turner 322c840bea gles2: Add an ABI-check test
Checks that no functions are exported that are not part of the ABI.

Note that currently we are exporting functions that are aliased to
functions that are part of the ABI. They shouldn't be exported, but the
XML descriptions don't adequately describe this case.
2013-03-19 12:04:32 -07:00
Matt Turner 569bd281c1 gles1: Add an ABI-check test
Checks that no functions are exported that are not part of the ABI.

Note that currently we are exporting functions that are aliased to
functions that are part of the ABI. They shouldn't be exported, but the
XML descriptions don't adequately describe this case.
2013-03-19 12:04:31 -07:00
Andreas Boll 182895c4e6 gallium/egl: fix out-of-tree build
Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/15-fix-oot-build.diff;h=7040999a22d3937d0578cfd85ee2c71d7dc614bb;hb=refs/heads/ubuntu%2B1

NOTE: This is a candidate for the 9.1 branch.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-03-19 18:12:38 +01:00
Andreas Boll 92e6260c19 osmesa: fix out-of-tree build
Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/14-fix-osmesa-build.diff;h=00581d0e1833c5492d9050e1bf3d5e658cad782e;hb=refs/heads/ubuntu%2B1

v2: Move the added line immediately after -I$(top_srcdir)/src/mapi

NOTE: This is a candidate for the 9.1 and 9.0 branches.

Acked-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-03-19 18:12:38 +01:00
Andreas Boll 06fff296e9 build: Enable x86 assembler on Hurd.
Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/10-hurd-configure-tweaks.diff;h=984e17df1b8afdf8e4b36bee96aa5ab6a5691021;hb=refs/heads/ubuntu%2B1

Thanks to Pino Toscano.

v2: Don't bother with x86_64. AFAICT GNU/Hurd doesn't support it so far.

NOTE: This is a candidate for stable branches.

Acked-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Acked-by: Matt Turner <mattst88@gmail.com>
2013-03-19 18:12:38 +01:00
Andreas Boll 7962f28c43 mesa: use ieee fp on s390 and m68k
Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/02_use-ieee-fp-on-s390-and-m68k.patch;h=d3d6c1d7fec3c72ecf320706167deb61c52636c3;hb=refs/heads/ubuntu%2B1

Fixes Debian bug #349437.

Patch written by David Nusinow.

NOTE: This is a candidate for stable branches.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Matt Turner <mattst88@gmail.com>
2013-03-19 18:12:37 +01:00
Roland Scheidegger 5af7b45986 gallivm: fix return opcode handling in main function of a shader
If we're in some conditional or loop we must not return, or the code
after the condition is never executed.
(v2): And, we also can't just continue as nothing happened, since the
mask update code would later check if we actually have a mask, so we
need to remember that there was a return in main where we didn't exit
(to illustrate this, a ret in a if clause would cause a mask update
which is still ok as we're in a conditional, but after the endif the
mask update code would drop the mask hence bringing execution back to
pixels which should have their execution mask set to zero by the ret).
Thanks to Christoph Bumiller for figuring this out.

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=62357.

Note: This is a candidate for the stable branches.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-03-19 18:04:05 +01:00
Rob Clark afc1b7c21f freedreno: clear fixes
Some fixes for clearing only depth or only stencil.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-03-19 10:49:30 -04:00
Christian König 90862c8507 radeonsi: enable indirect adressing
Fixing 16 piglit tests.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Christian König 5e616cf2c5 radeonsi: implement indirect adressing of constants
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Christian König f5298b0a65 radeonsi: switch to using resource destribtors for constants v2
v2: remove superfluous mask, use buffer_size instead of constant

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Christian König c05483fc00 radeon/llvm: rework input fetch and output store
Cleanup the code and implement indirect addressing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Brian Paul b51f8593d8 tgsi: add initializer data to fix MSVC compile error 2013-03-19 07:55:48 -06:00
Christian König 897303f8ff tgsi: add ArrayID documentation v2
v2: further improve the text with comments from Christoph Bumiller.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König 21190fbd56 tgsi: use separate structure for indirect address v2
To further improve the optimization of source and destination
indirect addressing we need the ability to store a reference
to the declaration of the addressed operands.

Since most of the fields in tgsi_src_register doesn't apply for
an indirect addressing operand replace it with a separate
tgsi_ind_register structure and so make room for extra information.

v2: rename Declaration to ArrayID, put the ArrayID into () instead of []

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König 16caeff2a5 tgsi: add ArrayID to declarations
Remember which declarations are declared as "arrays" and so
can be indirectly addressed. ArrayIDs start at 1, cause for
compatibility reasons zero is treaded as no array present.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König d3e07bed90 tgsi: remove TGSI_FILE_(IMMEDIATE|TEMP)_ARRAY
Nobody seems to be using it, and only nv50 had a partial implementation.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König affdff230b glsl_to_tgsi: remove indirect addressing limitations
They shouldn't be necessary any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König 3f67251e3d glsl_to_tgsi: allocate arrays separately v2
Instead of allocating everything as temporaries, use the
new array allocation functions.

v2: fix bug in simplify_cmp, declare arrays on demand

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König 433b2ca46b glsl_to_tgsi: use get_temp for all allocations
Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König 506d400275 tgsi/ureg: implement support for array temporaries
Don't bother with free temporaries, just allocate them at
the end and also emit them in their own declaration.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König 52947b93b2 tgsi/ureg: cleanup local temporary emission v2
Instead of emitting each temporary separately, emit them in a chunk.

v2: keep separate function for emitting temps

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:31 +01:00
Andreas Boll 36320bfa54 radeon/llvm: Link against libgallium.la to fix an undefined symbol
Ported from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/119-libllvmradeon-link.patch;h=ee47f8a07dbf33c32f8b57faed923680ed6648fb;hb=refs/heads/ubuntu%2B1

Fixes a regression introduced with
f70c385351

NOTE: This is a candidate for the 9.1 branch.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62434
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-03-19 12:07:51 +01:00
Kristian Høgsberg de315f76a2 wayland: Add prime fd passing as a buffer sharing mechanism
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
2013-03-18 21:15:41 -04:00
Kristian Høgsberg 2356e28452 Add dri image entry point for creating image from fd
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
2013-03-18 21:03:54 -04:00
Kristian Høgsberg 664fe6dc84 wayland: allocate a __DRIimage for the color buffer
No functional change here, but this will let us query the image
for an fd handle later.

Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
2013-03-18 21:03:46 -04:00
Rob Clark 4e8f5c52bb DRI2: HACK: no GLX_INTEL_swap_event if no ScheduleSwap
If ddx does not support swap, don't advertise it.  This is a hack to
work around current xservers which advertise this extension even when it
is clearly not supported.  When:

http://lists.x.org/archives/xorg-devel/2013-February/035449.html

is merged in upstream xserver and makes it's way into most distros then
this hack can be removed.  In the mean time, it is required to allow
gnome-shell/clutter/etc to work properly with a DDX driver which does
not support ScheduleSwap.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-03-18 14:16:43 -04:00
Paul Berry 5a13e051d9 i965/blorp: Add INTEL_DEBUG=blorp flag.
This debug flag prints out the native GEN assembly for a blitting
shader produced using BLORP.  Hopefully this should be useful in
developing additional BLORP features.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2013-03-18 09:27:25 -07:00
Alex Deucher 2da8ee16a8 r600g: properly set non_disp tiling mode for DMA (v2)
Needs to be set for depth, stencil, and fmask just
like other blocks.

v2: drop additional cayman bits for now

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-17 13:32:48 -04:00