freedreno: clear fixes
Some fixes for clearing only depth or only stencil. Signed-off-by: Rob Clark <robdclark@gmail.com>
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90862c8507
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@ -105,16 +105,27 @@ fd_clear(struct pipe_context *pctx, unsigned buffers,
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OUT_PKT3(ring, CP_SET_CONSTANT, 2);
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OUT_RING(ring, CP_REG(REG_RB_COPY_CONTROL));
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reg = 0;
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if (buffers & PIPE_CLEAR_DEPTH) {
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reg |= RB_COPY_CONTROL_CLEAR_MASK(0xf) |
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RB_COPY_CONTROL_DEPTH_CLEAR_ENABLE;
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if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
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reg |= RB_COPY_CONTROL_DEPTH_CLEAR_ENABLE;
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switch (fd_pipe2depth(fb->zsbuf->format)) {
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case DEPTHX_24_8:
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if (buffers & PIPE_CLEAR_DEPTH)
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reg |= RB_COPY_CONTROL_CLEAR_MASK(0xe);
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if (buffers & PIPE_CLEAR_STENCIL)
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reg |= RB_COPY_CONTROL_CLEAR_MASK(0x1);
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break;
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case DEPTHX_16:
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if (buffers & PIPE_CLEAR_DEPTH)
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reg |= RB_COPY_CONTROL_CLEAR_MASK(0xf);
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break;
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}
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}
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OUT_RING(ring, reg);
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OUT_PKT3(ring, CP_SET_CONSTANT, 2);
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OUT_RING(ring, CP_REG(REG_RB_DEPTH_CLEAR));
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reg = 0;
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if (fb->zsbuf) {
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if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
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switch (fd_pipe2depth(fb->zsbuf->format)) {
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case DEPTHX_24_8:
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reg = (((uint32_t)(0xffffff * depth)) << 8) |
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@ -322,7 +322,7 @@ emit_mem2gmem(struct fd_context *ctx, struct fd_ringbuffer *ring,
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if (ctx->restore & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL))
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emit_mem2gmem_surf(ring, 0, bin_w * bin_h, pfb->zsbuf);
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if (ctx->resolve & FD_BUFFER_COLOR)
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if (ctx->restore & FD_BUFFER_COLOR)
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emit_mem2gmem_surf(ring, 1, 0, pfb->cbufs[0]);
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/* TODO blob driver seems to toss in a CACHE_FLUSH after each DRAW_INDX.. */
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