Commit Graph

113134 Commits

Author SHA1 Message Date
Samuel Pitoiset d8844533af radv: remove unused code in radv_export_param()
It was hack for geometry shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-16 08:12:20 +02:00
Dave Airlie 6d50dcd80f radv/gfx10: don't set array pitch field on images
Setting this seems to be broken, amdvlk only sets it for quilted
textures which I'm not sure what those are.

Fixes dEQP-VK.glsl.texture_functions.query.texturesize*3d*

Fixes: bf11f1c3a4 ("radv/gfx10: add gfx10_make_texture_descriptor")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-16 10:41:27 +10:00
Vinson Lee d1a55d9559 lima/ppir: Fix assert condition in ppir_codegen_encode_branch.
Fixes: af0de6b91c ("lima/ppir: implement discard and discard_if")
Reported-by: Coverity Scan
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
2019-07-15 23:48:34 +00:00
Eric Anholt 82dc168f51 docs: Tell people how to easily generate the Fixes lines.
v2: Include '-s' to suppress the diff.
v3: use the git config command (Ken), use &lt; (Eric)

Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-07-15 16:29:31 -07:00
Caio Marcelo de Oliveira Filho 1210e8caaf spirv: Ignore ArrayStride for storage classes that should not use it
The stride was already overriden when using
lower_workgroup_access_to_offsets, so elaborate a bit the commentary
there.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-15 16:18:57 -07:00
Caio Marcelo de Oliveira Filho 026cfa1099 spirv: Fix stride calculation when lowering Workgroup to offsets
Use alignment to calculate the stride associated with the pointer
types.  That stride is used when the pointers are casted to arrays.

Note that size alone is not sufficient, e.g. struct { vec2 a; vec1 b;
} will have element an element size of 12 bytes, but the stride needs
to be 16 bytes to respect the 8 byte alignment.

Fixes: 050eb6389a "spirv: Ignore ArrayStride in OpPtrAccessChain for Workgroup"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-15 16:18:46 -07:00
Alyssa Rosenzweig 329799257b panfrost/ci: Blacklist flush finish tests
We don't implement batch splitting quite yet which is necessary for the
ludicrous number of draw calls these tests invoke. Blacklist them for
now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:16:19 -07:00
Alyssa Rosenzweig c1125d0935 panfrost: Don't leak oversized transient allocations
When we allocate them, we allocate with two references accidentally,
causing them to leak uncontrollably.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig 48f51e9dbb panfrost: Implement panfrost_bo_cache_evict_all
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig f02278ae87 panfrost: Implement panfrost_bo_cache_get
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig 525e5dc4ed panfrost: Implement panfrost_bo_cache_put
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig 9034b5586c panfrost: Add pan_bucket helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig eb398683d7 panfrost: Implement pan_bucket_index helper
We'll use this whenever we need to lookup a bucket.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig 270733fe6a panfrost: Add BO cache data structure
Linked list of panfrost_bo* nested inside an array of buckets.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig f3464f7987 panfrost: Describe BO cache architecture
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig f3b7e1ddc7 panfrost: Stub out panfrost_bo_cache_evict
This destructor will be used to legitimately free the BOs, now that a BO
free with cacheable=0 is only a "fake" free.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig 74ad5f89f8 panfrost: Stub out panfrost_bo_cache_put
..so we can intercept the BO free.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:56 -07:00
Alyssa Rosenzweig b5a28f61ae panfrost: Stub out panfrost_bo_cache_get
We will use this function to fetch cached BOs instead of freshly
allocating them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:55 -07:00
Alyssa Rosenzweig fea953e6c2 panfrost: Don't leak the blend CSO hash table
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:55 -07:00
Alyssa Rosenzweig 07a1f3d120 panfrost: Cleanup after scoreboarding
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:55 -07:00
Alyssa Rosenzweig fae790ecfc panfrost: Allocate UBOs on the stack, not the heap
Saves a call to calloc (the maximum size is small and known at
compile-time) and fixes a leak.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 16:12:55 -07:00
Jason Ekstrand 0ba508d7a3 nir,intel: Add support for lowering 64-bit nir_opt_extract_*
We need this when doing full software 64-bit emulation.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110309
Fixes: cbad201c2b "nir/algebraic: Add missing 64-bit extract_[iu]8..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2019-07-15 16:08:37 -05:00
Jason Ekstrand 7a19e05e8c nir/opt_if: Clean up single-src phis in opt_if_loop_terminator
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111071
Fixes: 2a74296f24 "nir: add opt_if_loop_terminator()"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-07-15 19:58:51 +00:00
Pierre-Eric Pelloux-Prayer ed98f8a63a radeonsi: verify buffer_offset value before using it
This buffer_ofset can come directly from the application (e.g: when using
glVertexAttribPointer) and can contain an invalid value.

st_atom_array already makes sure that if it's not negative so all that's left
is to verify that it's smaller that the buffer size.

Bugs related to this issue:

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105251#c52
Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=109693
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-07-15 15:22:28 -04:00
Pierre-Eric Pelloux-Prayer a9655f36fe st/mesa: verify that vertex buffer offset isn't negative
For drivers supporting PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET the buffer_offset value
will be interpreted as an signed int.

An example of application code causing a negative offset:

            float b[] = { ... }; // 3 float for pos, 3 for color
            glBufferData(GL_ARRAY_BUFFER, ..., b, ...);
            glVertexAttribPointer(0, 3, GL_FLOAT, GL_FALSE, 6 * sizeof(float), 0);
            glVertexAttribPointer(1, 3, GL_FLOAT, GL_FALSE, 6 * sizeof(float), &b[3]);
                                                                                ^
                                                                    should be 3 * sizeof(float)

The offset is a ptr so when interpreted as a signed int it can be negative.

This commit adds a verification that (int) buffer_offset is not negative - this would
indicate an application bug. Since it's too late to emit a GL_INVALID_VALUE error,
we replace the negative offset by 0 and emit a debug message.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-07-15 15:22:25 -04:00
Marek Olšák ce04fbf67c st/mesa: don't invalidate a buffer range that is mapped
This is needed to fix an issue with OpenGL when a buffer is mapped and
BufferSubData is called. In this case, we can't invalidate the buffer range.
2019-07-15 14:58:23 -04:00
Marek Olšák fc4302d1df gallium: use MAP_DIRECTLY to mean supression of DISCARD in buffer_subdata
This is needed to fix an issue with OpenGL when a buffer is mapped and
BufferSubData is called. In this case, we can't invalidate the buffer range.
2019-07-15 14:58:23 -04:00
Kenneth Graunke 5e76c99923 iris: Better handle decoder base addresses
It can be useful to call the decoder on a single batch.  But, that batch
may not contain STATE_BASE_ADDRESS, at which point the decoder will have
no idea how to find any buffers.  We can initialize the two static bases
at the beginning of time, so it has them even if it never sees SBA.

Surface base address changes dynamically, possibly in the middle of a
batch.  So we update it at the start of each batch, making it always
start at the value we inherited from the previous one.  SBA commands
inside the batch can update it to a proper value.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-07-15 11:49:19 -07:00
Samuel Pitoiset ed12be1b8f radv/gfx10: enable OC_LDS_EN for NGG GS if the ES stage is TES
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-15 20:05:21 +02:00
Bas Nieuwenhuizen d4f0f1a6e2 anv: Add android dependencies on android.
Specifically needed for nativewindow for some VK_EXT_external_memory_android_hardware_buffers
functions, where we call into some AHardwareBuffer functions.

The legacy Android ext did not have us call into any Android function
at all and hence it was not noticed.

Fixes: 755c633b8d "anv: Fix vulkan build in meson."
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2019-07-15 15:23:43 +00:00
Alyssa Rosenzweig 0b83005807 panfrost: Advertise more depth/stencil formats
Fixes a regression in glmark's shadow/refract scenes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:35 -07:00
Alyssa Rosenzweig 1aaf68d120 panfrost/mfbd: Add Z32 rendering support
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:35 -07:00
Alyssa Rosenzweig f8e2219b08 panfrost: Fix blend_cso if nr_cbufs == 0
Fixes: 46396af1ec ("panfrost: Refactor blend infrastructure")

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:35 -07:00
Alyssa Rosenzweig 318d641cd9 panfrost: Cleanup shader upload code
The old algorithm is still used (and the same issue -- namely, leaking
all shaders -- applies) but we're way more concise about it since we're
*only* using the routine for shaders nowadays; everything else is a
BO-proper or transient.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Alyssa Rosenzweig 1ffca961ab panfrost: Remove all old allocators
With the new refactor, this all becomes dead code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Alyssa Rosenzweig 9981b6ef0f panfrost: Use transient memory for occlusion queries
These only last a frame anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Alyssa Rosenzweig 594b47d917 panfrost: Remove bizarre hack
I don't think this is still necessary, and if it is, we'll have to
figure out how to fix it the right way.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Alyssa Rosenzweig d375d127a9 panfrost: Upload vertex descriptors to *transient* memory
It's not legal to reuse the vertex shader descriptor across frames now
that we patch it at draw-time, so upload to transient memory.

Ideally, we could be smarter about this such that subsequent draws with
the same vertex shader and same patched state would reuse the
descriptor, but for now, let's simply achieve correctness.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Alyssa Rosenzweig c6b59db5b4 panfrost: Delay resource mmaps
We use the new PAN_ALLOCATE_DELAY_MMAP flag to only map resources
on-demand, which should avoid mapping FBOs.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Alyssa Rosenzweig bd4986bafa panfrost: Cleanup PAN_ALLOCATE_*
While we're at it, prompted by a semantics issue around INVISIBLE, also
add a separate DELAY_MMAP flag.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Alyssa Rosenzweig 2f783ede02 panfrost/drm: Don't mmap INVISIBLE buffers
On the new kernel, mmaping doesn't *hurt* per se, but it's still
wasteful for buffers explicitly marked as not needing an mmap.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-15 08:03:34 -07:00
Lionel Landwerlin c9c8c2f7d7 anv: fix crash in vkCmdClearAttachments with unused attachment
anv_render_pass_compile() turns an unused attachment into a NULL
depth_stencil_attachment pointer so check that pointer before
accessing it.

Found with updates to existing CTS tests.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 208be8eafa ("anv: Make subpass::depth_stencil_attachment a pointer")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2019-07-15 16:47:41 +03:00
Samuel Pitoiset b650f3d197 radv/gfx10: export the PrimitiveID for ES stages (VS or TES)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-15 11:30:10 +02:00
Samuel Pitoiset 8175f6269b radv/gfx10: declare an external symbol for the ESGS ring
It will be used for stream output but for now only declares it
if VS and if the PrimitiveID needs to be exported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-15 11:30:08 +02:00
Samuel Pitoiset f0a90eddb6 radv/gfx10: allocate ESGS ring space for exporting PrimitiveID
Only VS needs that. We shouldn't hardcode these values but
that's complicated to not do that for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-15 11:30:05 +02:00
Samuel Pitoiset 4478f14327 radv/gfx10: fix crash when emitting NGG GS prologue
ac_nir_context is initialized after the driver emits the NGG GS
prologue so it's likely to crash.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-15 08:51:53 +02:00
Vasily Khoruzhick eb862c2365 lima/ppir: Fix branch codegen
"unknown_2" field is actually a size of instruction that branch
points to. If it's set to a smaller size than actual instruction
branch behavior is not defined (and it usually wedges the GPU).

Fix it by setting this field correctly.

Fixes: af0de6b91c ("lima/ppir: implement discard and discard_if")
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2019-07-14 19:49:14 -07:00
Vasily Khoruzhick 8f0160ca24 lima/ppir: Fix assert condition in ppir_codegen_encode_discard
Fixes: af0de6b91c ("lima/ppir: implement discard and discard_if")
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2019-07-14 19:48:55 -07:00
Jonathan Marek 4e102a6de7 etnaviv: fix incorrect varying interpolation
This corresponds to what the GC3000 blob does. The USED / UNUSED enums are
wrong, at least for GC2000/GC3000.

Without this the 3rd texture component is not interpolated correctly (flat?)
in the following test (and others):

dEQP-GLES2.functional.texture.mipmap.cube.generate.rgba8888_nicest

Strangely, when the texture is sampled from OpenGL it works correctly,
the problem only shows up for sampling by gallium/blitter. This fixes other
cube map tests which use util_blitter_blit.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-07-14 10:34:17 -04:00
Jonathan Marek a9e78a44d1 etnaviv: reduce rs alignment requirement for two pixel pipes GPU
The rs alignment doesn't have to be multiplied by # of pixel pipes.

This works on GC2000 which doesn't have the SINGLE_BUFFER feature.

This fixes some cubemaps (NPOT / small mipmap levels) because aligning by 8
breaks the expected alignment of 4 for tiled format. We don't want to mess
with the alignment of tiled formats.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-07-14 10:34:17 -04:00