Commit Graph

97527 Commits

Author SHA1 Message Date
Jason Ekstrand e8c9e65185 intel/fs: Use a pure vertical stride for large register strides
Register strides higher than 4 are uncommon but they can happen.  For
instance, if you have a 64-bit extract_u8 operation, we turn that into
UB -> UQ MOV with a source stride of 8.  Our previous calculation would
try to generate a stride of <32;8,8>:ub which is invalid because the
maximum horizontal stride is 4.  To solve this problem, we instead use a
stride of <8;1,0>.  As noted in the comment, this does not work as a
destination but that's ok as very few things actually generate that
stride.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
2017-11-07 10:37:52 -08:00
Eric Anholt bd24f4890f broadcom/vc5: Skip emitting textures that aren't used.
Fixes crashes when ARB_fp uses texture[1] but not 0, as in piglit's
fp-fragment-position.
2017-11-07 09:40:25 -08:00
Eric Anholt 3d5e62dcfa broadcom/vc5: Add missing SRGBA8 ETC2 support.
Fixes piglit oes_compressed_etc2_texture-miptree srgb8-alpha8.
2017-11-07 09:40:25 -08:00
Eric Anholt 6079f7c3c3 broadcom/vc5: Disable early Z test when the FS writes Z.
Fixes piglit early-z.
2017-11-07 09:40:25 -08:00
Eric Anholt eeb9e80272 broadcom/vc5: Shift the min/max lod fields by the BASE_LEVEL.
The lod clamping is what limits you between base and last level, and the
base level field is just there to help decide where the min/mag change
happens.

Fixes tex-miplevel-selection GL2:texture()
2017-11-07 09:40:25 -08:00
Eric Anholt 521e1d0275 broadcom/vc5: Add support for anisotropic filtering. 2017-11-07 09:40:25 -08:00
Eric Anholt a266f78741 broadcom/vc5: Fix mipmap filtering enums.
The ordering of the values was even less obvious than I thought, with both
the mip filter and the min filter being in different bits depending on
whether the mip filter is none.

Fixes piglit fs-textureLod-miplevels.shader_test
2017-11-07 09:40:25 -08:00
Eric Anholt 73ec70bf13 broadcom/vc5: Fix height padding of small UIF slices.
The HW doesn't pad the slice's height to make a full 4x4 group of UIF
blocks.  We just need to pad to columns, and the start of the next column
appears in the bottom of the previous column's last block.

Fixes piglit fs-textureOffset-2D.
2017-11-07 09:40:24 -08:00
Eric Anholt e23c6991be broadcom/vc5: Print the actual offsets in HW for our resource layout debug.
The alignment of level 0 is non-obvious, so it's hard to turn a faulting
address into a slice without this.
2017-11-07 09:40:24 -08:00
Eric Anholt 426c352336 broadcom/vc5: Set the available VS outputs to match the FS inputs.
Fixes piglit glsl-es-3.00/minimum-maximums.txt.
2017-11-07 09:40:24 -08:00
Eric Anholt f1797928fd broadcom/vc5: Set the max texture LOD bias.
The field is signed 8.8, so the usual 16.0f fits.  Fixes piglit
gl-2.1-minmax.
2017-11-07 09:40:24 -08:00
Eric Anholt 47bd9dac19 broadcom/vc5: Fix translation of stencil ops.
They aren't quite in the same order as the gallium defines.  Fixes piglit
gl-2.0-two-sided-stencil.
2017-11-07 09:40:24 -08:00
Eric Anholt 3be820477f broadcom/vc5: Move stencil state packing to the CSO.
Only the stencil ref comes in as dynamic state at emit time.
2017-11-07 09:19:48 -08:00
Eric Anholt 3da39f2297 broadcom/vc5: Introduce a helper for pre-packing our V3DXX structs.
This is so much more pleasant to write than the manual
V3D33_whatever_pack() calls, and will be useful for when we start doing
actual per-V3D compiles.
2017-11-07 09:19:48 -08:00
Eric Anholt 078b163a9c broadcom/vc5: Add a cl_emit() variant for merging with a pre-packed struct.
Cleans up the hand-written code, at the cost of another ugly macro.
2017-11-07 09:19:48 -08:00
Eric Anholt 735b844b1b broadcom/vc5: Skip emitting depth offset while disabled.
The enable flag is also in the rasterizer state, so it will be emitted
once it's needed.
2017-11-07 09:19:48 -08:00
Eric Anholt 386e9362a5 broadcom/vc5: Don't emit stencil config if not doing stencil test.
As with blending, we'll have the bit flagged again when it gets reenabled
in CONFIGURATION_BITS, so there's no need to emit test state if we're not
testing.
2017-11-07 09:19:48 -08:00
Eric Anholt f90ee6eb2b broadcom/vc5: Don't emit updated blend factors/funcs while disabled.
The dirty bit will be flagged again when re-enbaled.  Keeps us from
emitting blend state in CLs that never do blending.
2017-11-07 09:19:48 -08:00
Eric Anholt dd429cb2db broadcom/vc5: Fix missing enum decode for indexed primitives. 2017-11-07 09:19:48 -08:00
Eric Anholt bb6997e6a3 broadcom/vc5: Drop padding bits from the bottom of the TSDA address.
Fixes misaligned-looking addresses in decode.
2017-11-07 09:19:48 -08:00
Eric Anholt 949ac638bc broadcom/vc5: Make sure the TMU indirect struct is appropriately aligned.
I was hoping that this would help with fbo-generatemipmap hangs, but no
luck.
2017-11-07 09:19:48 -08:00
Kenneth Graunke cb47de4ff0 broadcom/genxml: Fix decoding of groups with small fields.
Groups containing fields smaller than a byte probably not being decoded
correctly.  For example:

    <group count="32" start="32" size="4">
      <field name="Vertex Element Enables" start="0" end="3" type="uint"/>
    </group>

gen_field_iterator_next would properly walk over each element of the
array, incrementing group_iter.  However, the code to print the actual
values only considered iter->field->start/end, which are 0 and 3 in the
above example.  So it would always fetch bits 3:0 of the current byte,
printing the same value over and over.

Cc: Eric Anholt <eric@anholt.net>
2017-11-07 09:19:48 -08:00
Eric Anholt 47dac5d2bc broadcom/vc5: Use DEPTH24_STENCIL8 for rendering to depth-only textures.
The HW puts the pad bits at the top for DEPTH_COMPONENT24, but we need it
at the bottom for texturing.  Using the format with stencil probably means
we won't be able to do Z24 and separate S8, but I wasn't planning on
supporting that anyway.

Fixes hiz-depth-read-fbo-d24-s0
2017-11-07 09:19:48 -08:00
Chad Versace 3ea37d0a2a anv: Suffix anv-private 'VK' tokens with 'ANV'
I saw VK_IMAGE_ASPECT_ANY_COLOR_BIT while hacking anv_formats.c and got
confused. "Huh? What extension added that?". No extension defines it;
anv_private.h defines it.

To remove confusion, rename the anv-private VK tokens as if they were
extension tokens with the ANV vendor suffix.

I found only two such tokens:

    VK_IMAGE_ASPECT_ANY_COLOR_BIT
    VK_IMAGE_ASPECT_PLANES_BITS

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-11-07 09:06:41 -08:00
Chad Versace 012b54c6b1 anv: Remove unused variable 'gen'
In anv_physical_device_get_format_properties().

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-11-07 09:06:30 -08:00
Marek Olšák 33000e7c43 radeonsi: add si_screen::has_ls_vgpr_init_bug
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:40 +01:00
Marek Olšák cde664ab81 radeonsi: use ac_create_target_machine
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:38 +01:00
Marek Olšák 81f81fdb54 radeonsi: use ac_get_llvm_processor_name
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:36 +01:00
Marek Olšák c29f5fe41c radeonsi/gfx9: don't set gs_table_depth
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:58:33 +01:00
Marek Olšák e616743dab radeonsi/gfx9: limit the scissor bug workaround to Vega10 and Raven only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-07 17:26:36 +01:00
Marek Olšák 24e9004708 radeonsi: remove unused field in the PCI ID table
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-11-07 17:26:36 +01:00
Miklós Máté cf47dfe8f1 mesa: fix deleting the dummy ATI_fs
The DummyShader is used by GenFragmentShadersATI() as a placeholder to
mark IDs as allocated. Context cleanup wants to delete everything in
ctx->Shared->ATIShaders, and crashes on these placeholders with this
backtrace:
==15060== Invalid free() / delete / delete[] / realloc()
==15060==    at 0x482F478: free (vg_replace_malloc.c:530)
==15060==    by 0x57694F4: _mesa_delete_ati_fragment_shader (atifragshader.c:68)
==15060==    by 0x58B33AB: delete_fragshader_cb (shared.c:208)
==15060==    by 0x5838836: _mesa_HashDeleteAll (hash.c:295)
==15060==    by 0x58B365F: free_shared_state (shared.c:377)
==15060==    by 0x58B3BC2: _mesa_reference_shared_state (shared.c:469)
==15060==    by 0x578687F: _mesa_free_context_data (context.c:1366)
==15060==    by 0x595E9EC: st_destroy_context (st_context.c:642)
==15060==    by 0x5987057: st_context_destroy (st_manager.c:772)
==15060==    by 0x5B018B6: dri_destroy_context (dri_context.c:217)
==15060==    by 0x5B006D3: driDestroyContext (dri_util.c:511)
==15060==    by 0x4A1CBE6: dri3_destroy_context (dri3_glx.c:170)
==15060==  Address 0x7b5dae0 is 0 bytes inside data symbol "DummyShader"

Also, DeleteFragmentShadersATI() should not assert on DummyShader, just
remove the hash entry.

Normally one would define a shader after GenFragmentShadersATI(), and
BindFragmentShaderATI() replaces the placeholder with a real object.
However, the specification doesn't say that one has to define a shader
for each allocated ID.

Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-11-07 17:26:36 +01:00
Michel Dänzer cd3b55ad07 gallium: Guard assertions by NDEBUG instead of DEBUG
This matches the standard assert.h header.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-11-07 16:47:15 +01:00
Eric Engestrom 1e6f9ea212 meson: only turn on Mesa's DEBUG for buildtype==debug
As discussed in this thread:
https://lists.freedesktop.org/archives/mesa-dev/2017-November/175104.html

Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Chad Versace <chadversary@chromium.org>
2017-11-07 11:01:32 +00:00
Eric Engestrom d5597f09c6 meson: switch default build type to debugoptimized
As discussed in this thread:
https://lists.freedesktop.org/archives/mesa-dev/2017-November/175104.html

Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Michel Dänzer <michel@daenzer.net>
Cc: Christian Schmidbauer <ch.schmidbauer@gmail.com>
Cc: Eero Tamminen <eero.t.tamminen@intel.com>
Cc: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Chad Versace <chadversary@chromium.org>
2017-11-07 11:00:03 +00:00
Eric Engestrom cc15460e18 meson: drop GLESv1 .so version back to 1.0.0
autotools generates libGLESv1_CM.so.1.0.0, so let's make sure meson
does the same.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-07 10:47:20 +00:00
Eric Engestrom 5be1b1a8ce meson: standardize .so version to major.minor.patch
This `version` field defines the filename for the .so.
The plan .so as well as .so.$major are always symlinks to this.

Unless I'm mistaken, only the major is ever used, so this shouldn't
matter, but for consistency with autotools (and in case it does matter),
let's always have all 3 major.minor.patch components.

(The soname isn't affected, and is always .so.$major)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-07 10:47:20 +00:00
Dave Airlie 0084f4a422 ac/nir: for ubo load use correct num_components
I was hacking something stupid in doom, and hit an assert for the bitcast
following this, it definitely looks like this should be the number of 32-bit
components, not the instr level ones.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-07 14:54:19 +10:00
Gwan-gyeong Mun fb87c40a58 nir: fix a typo
Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-11-06 18:11:24 -08:00
Tomasz Figa 0886be093f glsl: Allow precision mismatch on dead data with GLSL ES 1.00
Commit 259fc50545 added linker error for
mismatching uniform precision, as required by GLES 3.0 specification and
conformance test-suite.

Several Android applications, including Forge of Empires, have shaders
which violate this rule, on a dead varying that will be eliminated.
The problem affects a big number of applications using Cocos2D engine
and other GLES implementations accept this, this poses a serious
application compatibility issue.

Starting from GLSL ES 3.0, declarations with conflicting precision
qualifiers are explicitly prohibited. However GLSL ES 1.00 does not
clearly specify the behavior, except that

  "Uniforms are defined to behave as if they are using the same storage in
  the vertex and fragment processors and may be implemented this way.
  If uniforms are used in both the vertex and fragment shaders, developers
  should be warned if the precisions are different. Conversion of
  precision should never be implicit."

The word "used" is not clear in this context and might refer to
 1) declared (same as GLES 3.x)
 2) referred after post-processing, or
 3) linked after all optimizations are done.

Looking at existing applications, 2) or 3) seems to be widely adopted.
To avoid compatibility issues, turn the error into a warning if GLSL ES
version is lower than 3.0 and the data is dead in at least one of the
shaders.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97532
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-11-06 15:16:03 -08:00
Timothy Arceri a9000cb860 i965: disable NIR linking on HSW and below
Fixes: 379b24a40d "i965: make use of nir linking"

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103537
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-11-07 09:14:05 +11:00
Dave Airlie 201b3b8d0d radv: move is_local up to the winsys level.
We can avoid adding the buffer in the non-local case, this will
avoid all the overhead of the indirect call.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:45:59 +00:00
Dave Airlie 25660499b6 radv: wrap cs_add_buffer in an inline. (v2)
The next patch will try and avoid calling the indirect function.

v2: add a missing conversion.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:45:59 +00:00
Dave Airlie 31b5da7958 radv: when loading regs no need to add buffer
The function that calls us has just added the buffer to the
list already, no need to try and add it again.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:44:49 +00:00
Dave Airlie 3bf8be41b8 radv: pre-calculate user_data_0 registers and store in pipeline
There's no point recalculating these the whole time on descriptor
emission, just store them at pipeline creation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:44:49 +00:00
Adam Jackson d547e18184 docs: Mark GLX_ARB_context_flush_control done
Requires an unreleased X server, but from the client GLX side this is as
done as it gets.

Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:21:57 -05:00
Neil Roberts 6ce9006d76 i965: Enable flush control
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-06 16:09:03 -05:00
Adam Jackson 791d06b23b drisw: Enable flush control for llvmpipe and softpipe
Hilariously this is a fairly big win.  Neil's multi-context-test
improves from ~24 to ~36 fps with llvmpipe on a Core i5-3317U.  softpipe
also improves, from about 2.25 to 3.09 fps (when it's that slow, you're
allowed to be that precise).

I'd have added it to swrast classic, but the testcase wants GL 3.0 and
shaders, and that's not a thing classic has, so I figured making it work
on softpipe was crime enough.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00
Adam Jackson 5cc06bec19 gallium: Wire up flush control
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00
Adam Jackson c0be3aae6c egl: Implement EGL_KHR_context_flush_control
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-06 16:09:03 -05:00