Commit Graph

86506 Commits

Author SHA1 Message Date
Marek Olšák a6ff2a3378 util/disk_cache: use unambiguous naming
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 20:22:28 +01:00
Marek Olšák 31727300e1 util: import cache.c/h from glsl
It's not dependent on GLSL and it can be useful for shader caches that don't
deal with GLSL.

v2: address review comments
v3: keep the other 3 lines in configure.ac

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 20:22:28 +01:00
Marek Olšák 5b8876609e gallivm: limit use of setFastMathFlags to LLVM 3.8 and later
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-11-15 20:22:28 +01:00
Kenneth Graunke 341fc0073a intel: Set min_ds_entries on Broxton.
This was missing.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
2016-11-15 10:45:47 -08:00
Christian Gmeiner 0c73a3b7d0 dri: make use of loader_get_extensions_name(..) helper
Changes since v1:
 - removed not needed includes
 - use the loader version of the helper

v2 [Emil Velikov]
 - Keep the includes - they are required.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 18:15:16 +00:00
Emil Velikov fb10c89877 Revert "dri: make use of dri_get_extensions_name(..) helper"
This reverts commit 1a21d21580.

Pushed the wrong version of the patch.
2016-11-15 18:15:15 +00:00
Marek Olšák 358079da2d radeonsi: set unsafe fpmath on FP instructions when allowed by R600_DEBUG
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-15 19:17:56 +01:00
Marek Olšák 41d20d4920 gallivm: add lp_create_builder with an unsafe_fpmath option
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-15 19:17:56 +01:00
Marek Olšák 171e349782 radeonsi: fold some shader context initialization to si_llvm_context_init
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-15 19:17:56 +01:00
Christian Gmeiner e4b01c97c4 loader: fixup driver names if needed
This makes it possible to 'use' the imx-drm driver. Remeber that it
is not possible to have sysmbol names in C/C++ with a '-' in it.

Changes since v1:
 - move the fix to loader.c

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 15:59:23 +00:00
Christian Gmeiner 1a21d21580 dri: make use of dri_get_extensions_name(..) helper
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 15:56:52 +00:00
Christian Gmeiner 0890aa6f7f loader: add loader_get_extensions_name(..) helper
Changes since v1:
 - renamed function to loader_get_extensions_name
 - moved function into loader

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

V2: [Emil Velikov]
 - Use local define.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 15:55:33 +00:00
Gurchetan Singh 0639e253a5 egl: Use pkg-config for Android NDK build
It's possible to build Mesa for Android using the traditional
autotools workflow [1]. ChromiumOS fetches Android prebuilts and
puts them in a sysroot. We now want to use pkg-config to specify
the location of system headers and libraries [2].

To enable this, let's add the required pkg-config checks and link
against them.

[1] https://developer.android.com/ndk/guides/standalone_toolchain.html
[2] https://chromium-review.googlesource.com/#/c/403237/

v2: Bundle pkg-config checks together (Emil)
v3: Provide further context on standalone NDK Mesa build (Emil)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 15:49:20 +00:00
Gurchetan Singh e23608db1c configure.ac: Don't look for pthreads in Android platform
In Android, the pthreads libs are in bionic.  When building
Mesa for Android with the autotools workflow, we shouldn't
set -lpthread or -pthread.

[Emil Velikov]
Other platforms could use a similar fix, although that is left as
separate exercise.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-15 15:48:02 +00:00
Eduardo Lima Mitev e73513f3c8 meta/GetTexSubImage: Account for GL_PACK_SKIP_IMAGES on compressed textures
This option was being ignored when packing compressed 3D and cube textures.

Fixes CTS test (on gen8+):
* GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore

v2: Drop API checks.
v3 (Ken): Just apply the existing code in more cases.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-11-15 12:26:13 +01:00
Iago Toral Quiroga 277f868e66 anv/format: handle unsupported formats earlier
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-15 08:50:48 +01:00
Samuel Iglesias Gonsálvez 308b06d471 main: return error if asking for GL_TEXTURE_BORDER_COLOR in TEXTURE_2D_MULTISAMPLE{_ARRAY} through TexParameter{i,Ii,Iui}v()
OpenGL ES 3.2 says in section 8.10. "TEXTURE PARAMETERS", at the end of
the section:

"An INVALID_ENUM error is generated if target is TEXTURE_2D_-
MULTISAMPLE or TEXTURE_2D_MULTISAMPLE_ARRAY , and pname is any
sampler state from table 21.12."

GL_TEXTURE_BORDER_COLOR is present in that table.

v2:
- Add check to _mesa_texture_parameteriv() (Kenneth)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98250

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-11-15 07:44:12 +01:00
Lionel Landwerlin a46bc3f70a anv: fix multi level clears with VK_REMAINING_MIP_LEVELS
A commit from the CTS suite on the 1.0-dev branch started using
VK_REMAINING_MIP_LEVELS, we're not dealing with it properly for clears.

Fixes:
   dEQP-VK.api.image_clearing.clear_color_image.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-14 17:40:58 +00:00
Andres Gomez 5923088d75 dir-locals.el: Adds White Space support
Trailing white spaces will be now always highlighted, not just in
prog-mode.

Also, the White Space package, which is available since GNU Emacs 22,
is loaded and activated locally in prog-mode.

Additionally, using White Space variables, we set highlighting through
faces on wrong indentation and the maximum length of a coding line.

Notice that:
 - The highlighting for the characters beyond the set length of a
   coding line is not activated by default, only for wrong
   indentations.
 - If the White Space package is not available, errors on loading or
   activation are ignored.
 - If the White Space mode is not activated the set variables would
   not have any effect.

v2: Removed too long lines trail highlighting, as suggested by Ilia
    Mirkin.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-11-14 19:17:49 +02:00
Iago Toral Quiroga 9730f2734b anv/format: support VK_FORMAT_R8G8B8_SRGB
Fixes dEQP-VK.api.image_clearing.clear_color_image.1d_r8g8b8_srgb

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-11-14 17:13:42 +01:00
Iago Toral Quiroga 35deeda66f anv/format: handle unsupported formats properly
According to the spec for vkGetPhysicalDeviceImageFormatProperties:

"If format is not a supported image format, or if the combination of format,
 type, tiling, usage, and flags is not supported for images, then
 vkGetPhysicalDeviceImageFormatProperties returns VK_ERROR_FORMAT_NOT_SUPPORTED."

Makes the following Vulkan CTS tests report 'Not Supported' instead of crashing:

dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_unorm
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_snorm
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_uscaled
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_sscaled
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_uint
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_sint
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_srgb
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_unorm
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_snorm
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_uscaled
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_sscaled
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_uint
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_sint
dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_srgb
dEQP-VK.api.image_clearing.clear_color_image.1d_r4g4_unorm_pack8
dEQP-VK.api.image_clearing.clear_color_image.1d_r8_srgb
dEQP-VK.api.image_clearing.clear_color_image.1d_r8g8_srgb
dEQP-VK.api.image_clearing.clear_color_image.1d_r8g8b8_srgb
dEQP-VK.api.image_clearing.clear_color_image.1d_b5g5r5a1_unorm_pack16

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-11-14 17:13:42 +01:00
Vedran Miletić 8e430ff8b0 clover: adapt to new error API since LLVM r286752
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2016-11-14 15:50:29 +00:00
Tim Rowley c8a51fa75d swr: [rasterizer core] remove driverType
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:03:10 -06:00
Tim Rowley ddc898aaf3 swr: [rasterizer archrast] move to pass by value
Move to pass by value since most events are very small in size.

We can look at pass by reference but will need to create multiple
versions to handle temp objects.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:03:04 -06:00
Tim Rowley 23e459b606 swr: [rasterizer core] add mode for aux buffer in the SWR_SURFACE_STATE
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:59 -06:00
Tim Rowley e9a3ad164d swr: [rasterizer common] don't bleed NOMINMAX definition after <windows.h>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:53 -06:00
Tim Rowley cd8d840ce1 swr: [rasterizer archrast] add events
Added events for tracking early/late Depth and stencil events,
TE patch info, GS prim info, and FrontEnd/BackEnd DrawEnd events.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:48 -06:00
Tim Rowley 7c3ca2e704 swr: [rasterizer core] fix culling issues
- Do proper culling of wireframe triangles (including non-culling of
  degenerates)
- Fix degenerate culling of CCW front-facing triangles in wireframe and
  conservative rast

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:42 -06:00
Tim Rowley cee66dd2aa swr: [rasterizer core/jitter] fix alpha test bug
Alpha from render target 0 should always be used for alpha test for all
render targets, according to GL and DX9 specs. Previously we were using
alpha from the current render target.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:36 -06:00
Tim Rowley 5912552947 swr: [rasterizer core] various code style changes
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:31 -06:00
Tim Rowley 584b65ad44 swr: [rasterizer archrast] don't generate empty files
Don't generate files when no events have been generated outside
the header events.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:25 -06:00
Tim Rowley e6f7d8a094 swr: [rasterizer archrast] fix open file handle limit issue
Buffer events ourselves and then when that's full or we're destroying
the context then write the contents to file. Previously, we're relying
ofstream to buffer for us.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:17 -06:00
Tim Rowley 2c697754a9 swr: [rasterizer archrast] fix double free issue
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:11 -06:00
Tim Rowley dc8408920c swr: [rasterizer core] separate frontend/backend stats enables
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:02:04 -06:00
Tim Rowley 937b7d8e5a swr: [rasterizer core] 16-wide tile store nearly completed
* All format combinations coded
* Fully emulated on AVX2 and AVX
* Known issue: the MSAA sample locations need to be adjusted for 8x2

Set ENABLE_AVX512_SIMD16 and USD_8x2_TILE_BACKEND to 1 in knobs.h to enable

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-14 09:00:59 -06:00
Emil Velikov f233bcda89 docs: add news item and link release notes for 13.0.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-14 11:39:01 +00:00
Emil Velikov 0a2b7c16c4 docs: add sha256 checksums for 13.0.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b47ce6ddb8be51d72d40ea0abc3d77b667c8552f)
2016-11-14 11:37:52 +00:00
Emil Velikov eeedb52f75 docs: add release notes for 13.0.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit f2f487ebbb808010528edd69000694bfe525f87b)
2016-11-14 11:37:51 +00:00
Juan A. Suarez Romero 7b9a9a0c5d i965/vec4: skip registers already marked as no_spill
Do not evaluate spill costs for registers that were already marked as
no_spill.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-11-14 10:09:30 +01:00
Kenneth Graunke 151aecabe4 glsl: Don't crash on function names with invalid identifiers.
Karol Herbst's fuzzing efforts noticed that we would segfault on:

   void bug() {
      2(0);
   }

We just need to bail if the function name isn't an identifier.

Based on a bug fix by Karol Herbst.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97422
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-11-12 22:08:15 -08:00
Kenneth Graunke 9c676a6427 glsl: Fix assert fails when assignment expressions are in array sizes.
Karol Herbst's fuzzing efforts discovered that we would hit the
following assert:

   assert(dummy_instructions.is_empty());

when processing an illegal array size expression of

   float[(1=1)?1:1] t;

In do_assignment, we realized we needed an rvalue for (1 = 1), and
generated a temporary variable and assignment from the RHS.  We've
already flagged an error (non-lvalue in assignment), and return a bogus
value as the rvalue.  But process_array_size sees the bogus value, which
happened to be a constant expression, and rightly assumes that
processing a constant expression shouldn't have generated any code.
instructions.

To handle this, make do_assignment not generate any temps or assignments
when it's already raised an error - just return an error value directly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98694
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-11-12 22:08:15 -08:00
Jonas Pfeil 5debfeb86f vc4: Add simulator kernel validation for multithreaded fragment shaders.
This is Jonas Pfeil's code from the kernel, brought back to Mesa by
anholt.
2016-11-12 19:21:46 -08:00
Eric Anholt 96ffee2d02 vc4: Mark threaded FSes as non-singlethread in the CL. 2016-11-12 19:21:46 -08:00
Eric Anholt ace0d810e5 vc4: Flag the last thread switch in the program as the last.
We don't allow the last thread switch to be inside control flow, to be
sure that we hit the last state exactly once.  If the last texturing was
in control flow, fall back to single threaded.
2016-11-12 19:21:46 -08:00
Eric Anholt 67f72c5f5d vc4: Add THRSW nodes after each tex sample setup in multithreaded mode.
This is a suboptimal implementation, but Jonas Pfeil found that it was
still a massive performance gain.
2016-11-12 19:21:46 -08:00
Eric Anholt e3c620e868 vc4: Add some spec citations about texture fifo management. 2016-11-12 18:46:35 -08:00
Eric Anholt fd2aff858b vc4: Use ra14/rb14 as the spilling registers.
This makes the raddr fixups compatible with FS threading.
2016-11-12 18:46:35 -08:00
Eric Anholt 755037173d vc4: Add support for register allocation for threaded shaders.
We have two major requirements: Make sure that only the bottom half of the
physical reg space is used, and make sure that none of our values are live
in an accumulator across a switch.
2016-11-12 18:46:35 -08:00
Eric Anholt fdad4d2402 vc4: Split register class setup for physical files from accumulators. 2016-11-12 18:46:35 -08:00
Eric Anholt 8e704dca7f vc4: Use register allocator CLASS_BIT_R0_R3 to clean up CLASS_B.
We have had no reason to separate ability to store in an accumulator from
ability to store in B, but with FS threading, we need to be able to force
values to be stored only in the physical regfiles.
2016-11-12 18:46:35 -08:00