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vc4: Use ra14/rb14 as the spilling registers. 

This makes the raddr fixups compatible with FS threading.
This commit is contained in:
Eric Anholt 2016-11-11 13:26:00 -08:00
parent 755037173d
commit fd2aff858b
2 changed files with 8 additions and 8 deletions
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12
src/gallium/drivers/vc4/vc4_qpu_emit.c
View File

@ -157,7 +157,7 @@ setup_for_vpm_read(struct vc4_compile *c, struct qblock *block)
* address.
*
* In that case, we need to move one to a temporary that can be used in the
* instruction, instead. We reserve ra31/rb31 for this purpose.
* instruction, instead. We reserve ra14/rb14 for this purpose.
*/
static void
fixup_raddr_conflict(struct qblock *block,
@ -183,9 +183,9 @@ fixup_raddr_conflict(struct qblock *block,
* in case of unpacks.
*/
if (qir_is_float_input(inst))
queue(block, qpu_a_FMAX(qpu_rb(31), *src0, *src0));
queue(block, qpu_a_FMAX(qpu_rb(14), *src0, *src0));
else
queue(block, qpu_a_MOV(qpu_rb(31), *src0));
queue(block, qpu_a_MOV(qpu_rb(14), *src0));
/* If we had an unpack on this A-file source, we need to put
* it into this MOV, not into the later move from regfile B.
@ -194,10 +194,10 @@ fixup_raddr_conflict(struct qblock *block,
*last_inst(block) |= *unpack;
*unpack = 0;
}
*src0 = qpu_rb(31);
*src0 = qpu_rb(14);
} else {
queue(block, qpu_a_MOV(qpu_ra(31), *src0));
*src0 = qpu_ra(31);
queue(block, qpu_a_MOV(qpu_ra(14), *src0));
*src0 = qpu_ra(14);
}
}

4
src/gallium/drivers/vc4/vc4_register_allocate.c
View File

@ -145,10 +145,10 @@ vc4_alloc_reg_set(struct vc4_context *vc4)
/* A/B */
for (uint32_t i = AB_INDEX; i < AB_INDEX + 64; i ++) {
/* Reserve ra31/rb31 for spilling fixup_raddr_conflict() in
/* Reserve ra14/rb14 for spilling fixup_raddr_conflict() in
* vc4_qpu_emit.c
*/
if (vc4_regs[i].addr == 31)
if (vc4_regs[i].addr == 14)
continue;
ra_class_add_reg(vc4->regs, vc4->reg_class_any[0], i);