Commit Graph

75869 Commits

Author SHA1 Message Date
Samuel Pitoiset 3029d60de7 nvc0: remove useless goto in nvc0_launch_grid()
Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-12 00:19:34 +01:00
Ian Romanick 5318bd351e mesa: Mark Identity as const
I was going to send this as review for dce1e1a8, but I missed that
window.  This saves 64 bytes of unshared data and prelaces it with 96
bytes shared text.  My guess is that some of the calls to memcpy get
optimized to something else.

   text	   data	    bss	    dec	    hex	filename
7847613	 220208	  27432	8095253	 7b8615	i965_dri.so before
7847709	 220144	  27432	8095285	 7b8635	i965_dri.so after

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Brian Paul <brianp@vmware.com>
2016-01-11 14:34:38 -08:00
Oded Gabbay 647d8e95d1 configure.ac: always define __STDC_CONSTANT_MACROS
The ISO C99 standard (7.18.4) specifies that C++
implementations should define UINT64_C only when
__STDC_CONSTANT_MACROS is defined.

Because we now use UINT64_C in our cpp files (since commit
208bfc493d), we need to add this define.

This also solves compilation errors with GCC 4.8.x on ppc64le machines.

v2: add this define to SCons build system

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-11 23:28:23 +02:00
Kenneth Graunke aa6aa39a8f i965: Upload 3DSTATE_BINDING_TABLE_POINTERS_HS when !TCS on Gen9+.
Gen9+ requires us to emit 3DSTATE_BINDING_TABLE_POINTERS_HS for the
hull shader push constants to take effect.  The passthrough TCS uses
push constants for the default tessellation levels.  So, when those
change, we need to re-upload the binding table as well.

Fixes five Piglit tests on Skylake:
- spec/arb_tessellation_shader/vs-tes-vertex
- spec/arb_tessellation_shader/vs-tes-tessinner-tessouter-inputs-quads
- spec/arb_tessellation_shader/vs-tes-tessinner-tessouter-inputs-tris
- spec/arb_tessellation_shader/tes-read-texture
- spec/arb_tessellation_shader/tess_with_geometry

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-01-11 12:10:00 -08:00
Mark Janes f2c8913536 Add missing platform information for KBL
In testing KBL, I found:

 - urb size was not set for slices gt1.5, gt2, and gt3.  The value I
   used for these slices (384) was taken from an earlier patch authored
   by Ben Widawsky.

 - slice count was missing.  This field was added by
   a403ad4f5a

With this commit, KBL passes piglit at parity with SKL.

Note: As requested by Kristian, Sarah modified this patch to drop
setting urb size for gt1.5, gt2, and gt3, since the correct default is
set in the GEN9 macro by commit c1e38ad370
"i965/skl: Use larger URB size where available."

Signed-off-by: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
2016-01-11 11:24:20 -08:00
Ilia Mirkin f21df5c513 nv50/ir: the whole point of data array is to hand out regular registers
Fixes: 0d3051f75a (nv50/ir: Fix scratch allocation size and file)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-11 13:01:11 -05:00
Dave Airlie a9eace326e mesa/uniform_query: add IROUNDD and use for doubles->ints (v2)
For the case where we convert a double to an int, we should
round the same as we do for floats.

This fixes GL41-CTS.gpu_shader_fp64.state_query

v2: add IROUNDD (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-01-11 02:27:51 +00:00
Timothy Arceri 124c9c2b97 glsl: replace unreachable code path with assert
The lower_named_interface_blocks() pass is called before we try
assign locations to varyings so this shouldn't be reachable.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-11 09:24:05 +11:00
Timothy Arceri cf757f48ea Revert "glsl: replace unreachable code path with assert"
This reverts commit 98270fd20d.

Something went terribly wrong the commit is not what the commit
message says.
2016-01-11 09:20:39 +11:00
Timothy Arceri 98270fd20d glsl: replace unreachable code path with assert
The lower_named_interface_blocks() pass is called before we try
assign locations to varyings so this shouldn't be reachable.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-11 09:18:51 +11:00
Timothy Arceri e4c5ace6a9 glsl: combine if blocks
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-11 09:18:45 +11:00
Rhys Kidd 7b4f8c827d mesa: Update todo regarding StencilOp and StencilOpSeparate.
OpenGL 2.0 function StencilOp() is in part internally implemented via
StencilOpSeparate(). This change happened some time ago, however the
accompanying doxygen todo comment was not accordingly updated.

Replace the outdated portion of this doxygen todo comment, leaving the
remainder unchanged.

Also better respect the 80 character suggested line length in this file.

v2: Fully remove comment, following code review by t_arceri@yahoo.com.au

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-01-11 09:10:17 +11:00
Kenneth Graunke 5e3edd4b28 glsl: Make bitfield_insert/extract and bfi/bfm non-vectorizable.
Currently, opt_vectorize() tries to combine:

    result.x = bitfieldInsert(src0.x, src1.x, src2.x, src3.x);
    result.y = bitfieldInsert(src0.y, src1.y, src2.y, src3.y);
    result.z = bitfieldInsert(src0.z, src1.z, src2.z, src3.z);
    result.w = bitfieldInsert(src0.w, src1.w, src2.w, src3.w);

into a single ir_quadop_bitfield_insert opcode, which operates on
ivec4s.  However, GLSL IR's opcodes currently require the bits and
offset parameters to be scalar integers.  So, this breaks.

We want to be able to vectorize this eventually, but for now, just
chicken out and make opt_vectorize() bail by marking all the bitfield
insert/extract related opcodes as horizontal.  This is a relatively
uncommon case today, so we'll do the simple fix for stable branches,
and fix it properly on master.

Fixes assertion failures when compiling Shadow of Mordor vertex shaders
on i965 in vec4 mode (where OptimizeForAOS enables opt_vectorize()).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2016-01-09 15:46:37 -08:00
Pierre Moreau 0d3051f75a nv50/ir: Fix scratch allocation size and file
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-09 12:58:21 -05:00
Nicolai Hähnle da5d4583e5 mesa: merge bind_atomic_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:38 -05:00
Nicolai Hähnle 5eb104d6ab mesa: merge bind_shader_storage_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:38 -05:00
Nicolai Hähnle e8dd7cc303 mesa: merge bind_uniform_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:37 -05:00
Nicolai Hähnle b3ca26cded mesa: merge bind_xfb_buffers_{base|range}
Reduced code duplication should make the code more maintainable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 19:37:37 -05:00
Kristian Høgsberg Kristensen 81f7fd3c54 glsl: Don't add nir files to libglsl_la_SOURCES
SCons doesn't understand nir yet and doesn't want to compile the glsl to
nir pass. Move the files to their own variable so we can add it only for
automake.

Tested-by: Brian Paul <brianp@vmware.com>
2016-01-08 16:15:49 -08:00
Ilia Mirkin e3706a7118 nv50,nvc0: use a face sysval to avoid the useless back-and-forth conversion
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-08 17:40:52 -05:00
Kristian Høgsberg Kristensen 82ad571abf glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.c
These are used by code that doesn't necessarily link to libglsl.la. Move
them to shader_enums.[ch] where we keep similar helpers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:20 -08:00
Kristian Høgsberg Kristensen 1d25ef6ae7 i965: Move GLSL lowering passes out of libi965_compiler.la
The scope of libi965_compiler.la is to be able to take nir shaders and
generate i965 EU code.  As such, we don't want the GLSL IR lowering
passes in the library. With this change, libi965_compiler.la no longer
needs to link to libglsl.la.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:16 -08:00
Kristian Høgsberg Kristensen e97caba1f6 glsl: Move glsl_to_nir files to LIBGLSL_FILES
libglsl_la_SOURCES includes both NIR_FILES and LIBGLSL_FILES, so for
libglsl.la consumers, this is a no-op. libnir.la however no longer uses
any GLSL IR infrastructure and can be used without also linking to
libglsl.la.

Acked-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:12 -08:00
Jordan Justen 1d54ac6c9f mesa: Use separate indices for UBO & SSBO during binding
Previously we were treating the binding index for Uniform Buffer
Objects and Shader Storage Buffer Objects as being part of the
combined BufferInterfaceBlocks array.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93322
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-01-08 13:11:31 -08:00
Jordan Justen cf66a8ffb7 mesa: Map program UBOs and SSBOs to Interface Blocks
v2:
 * Fill UboInterfaceBlockIndex and SsboInterfaceBlockIndex in
   split_ubos_and_ssbos (Iago)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-01-08 13:10:28 -08:00
Sarah Sharp 5d349fab46 mesa: docs: Add link to planet.freedesktop.org
The freedesktop.org blog feeds aren't mentioned on either mesa3d.org or
any of the graphics project wikis (including the DRI wiki) on
freedeskop.org.  Fix that by linking to it from the sidebar.

Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 12:18:12 -08:00
Ilia Mirkin dff1caccac freedreno: add ir3_compiler to gitignore
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-08 15:16:37 -05:00
Ilia Mirkin 90ba06618e gallium: add a RESQ opcode to query info about a resource
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin ebfb5446c7 gallium: add PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin 266d001261 gallium: add PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin 8cb493acc7 tgsi: update atomic op docs
Specify that the operation only applies to the x component, not
per-component as previously specified. This is unnecessary for GL and
creates additional complications for images which need to support these
operations as well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin bdef02ff26 tgsi: add a is_store property
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin 50b8488926 tgsi: provide a way to encode memory qualifiers for SSBO
Each load/store on most hardware can specify what caching to do. Since
SSBO allows individual variables to also have separate caching modes,
allow loads/stores to have the qualifiers instead of attempting to
encode them in declarations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Ilia Mirkin 888ddd632d ureg: add buffer support to ureg
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Ilia Mirkin 8cc9a8aa2a tgsi: add ureg support for image decls
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Jose Fonseca 208bfc493d glsl: Ensure 64bits shift is used.
I believe that `1u << x`, where x >= 32 yields undefined results
according to the C standard.

Particularly MSVC says `warning C4334: '<<' : result of 32-bit shift
implicitly converted to 64 bits (was 64-bit shift intended?)`.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:59 +00:00
Jose Fonseca e378184d9c mesa/main: Avoid `void function returning a value` warning.
Trivial.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:59 +00:00
Oded Gabbay 6613042c4e configure.ac: add --enable-profile
For profiling mesa's code, especially llvmpipe, PROFILE should be
defined. Currently, this define can only be generated if mesa is
built using scons.
This patch makes it possible to generate this define also when building
mesa through automake tools.

v2:

- Change --enable-llvmpipe-profile to --enable-profile
- Add -fno-omit-frame-pointer to CFLAGS and CXXFLAGS when enabling profile

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-08 21:59:47 +02:00
Marek Olšák 1e463d20ba nine: allow fragment shader POSITION and FACE to be system values
Reported-by: Axel Davy <axel.davy@ens.fr>
2016-01-08 20:07:16 +01:00
Marek Olšák d0cf66d835 vl: allow fragment shader POSITION to be a system value
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:16 +01:00
Marek Olšák 69f43c2cc9 util/pstipple: allow fragment shader POSITION to be a system value
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:16 +01:00
Marek Olšák 8a13ce14fd st/mesa: add support for POSITION and FACE system values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák c00e534283 tgsi/scan: update for POSITION and FACE sytem values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák 34738a92de gallium: add caps for POSITION and FACE system values
v2: document the integer behavior

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák 24737f2298 program: add a helper for rewriting FP position input to sysval
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:23 +01:00
Marek Olšák 4191c1a57c glsl: optionally declare gl_FragCoord & gl_FrontFacing as system values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:23 +01:00
Marek Olšák c07cf5f5a9 tgsi/ureg: handle redundant declarations in ureg_DECL_system_value
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Marek Olšák c886422656 tgsi/ureg: remove index parameter from ureg_DECL_system_value
It can be trivially derived from the number of already declared system
values. This allows ureg users not to worry about which index to choose.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Marek Olšák 91e8f2b0a5 st/mesa: remove dead code from mesa_to_tgsi
These aren't part of ARB_fragment_program.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Edward O'Callaghan cb513485a0 radeon, si: Use TGSI chan name defines in lp_build_emit_fetch() calls
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-01-08 12:18:36 -05:00