Marek Olšák
4ef1c8d60b
radeonsi/gfx10: fix the wave size for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
b4a0087a1c
radeonsi/gfx10: user correct ACQUIRE_MEM packet for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
acc5bdf887
radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
ee4d797d8b
radeonsi/gfx10: don't use NGG culling if compute-based culling is used
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
65e9239977
radeonsi: add num_vbos_in_user_sgprs into the shader cache key
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
be9455bdf7
radeonsi: always create wait_mem_scratch for compute-based culling
...
used by the primitive restart emulation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
42ce52b904
radeonsi: set amdgpu-gds-size for mode == 2 of compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
3381f2fa06
radeonsi: fix incorrect ordered_wave_id initilization for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Marek Olšák
d89b19cfe1
radeonsi: remove obsolete TODO comment related to compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
Vasily Khoruzhick
5d45ffbfb6
lima: Implement lima_texture_subdata
...
We can avoid intermediate copy if we implement it ourselves.
Improves x11perf -shmput500 from 199.0/s to 283.0/s
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4281 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4281 >
2020-03-28 00:17:40 +00:00
Rob Clark
6a10397a01
gitlab-ci: disable vs2019 build
...
Seems to be broken atm and blocking merging anything.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 16:34:27 -07:00
Rob Clark
f7d53275fb
freedreno/ir3/ra: re-work a6xx merged register file conflicts
...
In particular setup the full/half conflicts first. This avoids spurious
conflicts that where causing RA to place vecN half-regs poorly.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
faf276b4c8
freedreno/ir3/ra: split building regs/classes and conflicts
...
Split out the construction of registers and classes (which is the same
on all gens) from setting up conflicts. Prep to re-work how we setup
conflicts on a6xx+ which merged half/full register file.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
90f7d12236
freedreno/ir3/ra: pick higher numbered scalars in first pass
...
Since we are re-assigning the scalars anyways in the second pass, assign
them to the highest free reg in the first pass (rather than lowest) to
allow packing vecN regs as low as possible.
Note this required some changes specifically for tex instructions with a
single component writemask that is not necessarily .x, as previously
these would get assigned in the first RA pass, and since they are still
scalar, we'd end up w/ some r47.* and other similarly way-to-high
assignments after the 2nd pass.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
1da90ca9bf
freedreno/ir3/ra: compute register target from liveranges
...
Using the output of the first pass isn't ideal, as it can bake in the
losses from fragmentation which the scalar pass is intended to fill in.
This gets worse when we start using "vectorish" instructions, due to
higher use of vecN values.
Instead, we can just use the outputs of the liveness analysis to get a
more accurate # of maximum live values at any point.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
d2cc92c747
freedreno/ir3/ra: fix array liveranges
...
Fixes: 1b658533e1
("freedreno/ir3: extend liverange of arrays")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
6347c2ea89
freedreno/ir3/ra: add def/use iterators
...
Decouple the messy logic of figuring out vreg names defined/used by an
instruction from the logic of what to do about it by introducing
iterators. There is still *some* array vs ssa special casing in
ra_block_compute_live_ranges(), but less than before. And this will
avoid introducing a second copy of the def/use logic in a following
patch which uses the liveranges to calculate the maximum # of live
values (which is the optimal target for max physical register window
to round-robin within).
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
bf0aa7ed90
freedreno/ir3/ra: drop extending output live-ranges
...
This is no longer needed as we create meta:collect instructions in the
end block, which achieves the same result.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
0e7d24b532
freedreno/ir3/ra: add helper to map name to array
...
For vreg names that refer to arrays rather than SSA values, this is the
counterpart to name_to_instr().
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
d99d358389
freedreno/ir3/ra: fix target register calculation
...
Account for the # of regs an instruction writes, and fix an off-by-one.
(We are about to replace this with calculating the register target using
the live-ranges, but in debugging that it was useful to assert() if it
chose a higher target.)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
d20a06e401
freedreno/ir3/ra: add helper to map name to instruction
...
Extract out a helper from the select_reg callback. And include all the
instructions in the hashtable, not just SFU. This will be useful in the
following commits.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
29992a039e
freedreno/ir3/ra: split-up
...
Split out regset and shared header, since the RA pass is already getting
large-ish.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
6da53911c1
freedreno/ir3/ra: add debug option for RA debug msgs
...
Similar to the debug switch for sched debug msgs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
142f2d4551
freedreno/ir3: convert debug bitfield to BITFIELD_BIT()
...
(Little more verbose than the kernel's BIT())
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
3d0905582a
freedreno/ir3: reformat disasm output
...
In particular, make sure we see all the shader-db stats. The format
(order) is the sameish, except split across multiple lines to make it
easier to read.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
afdb8e3907
freedreno/ir3: fix bogus register footprint with tess/gs
...
When we have a tess or gs stage, VS outputs aren't normal varyings, so
regid is r63.x.. we shouldn't extend our registerfootprint to 64!
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
1b4b455739
freedreno/ir3: remove unused helper
...
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
c6a8792753
freedreno/ir3: add bary_ij as src for meta:tex_prefetch
...
This way RA doesn't have to special case it in use/def accounting..
This gets rid of an extra level of split/collect, which shouldn't be
needed. And interferes with scheduler trying to put tex-prefetches
after inputs but before other instructions. (Otherwise it would have
to figure out which split/collects need to go before the tex-prefetch)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
a0de0db0e4
freedreno/ir3: small cleanup and comments
...
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Rob Clark
7d9a794f35
freedreno/a6xx: register update
...
No functional change, and this register isn't used in userspace. Just
syncing from envytools tree to eliminate the delta.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272 >
2020-03-27 22:41:36 +00:00
Daniel Stone
46a32f0b6b
CI: Disable Panfrost Mali-T820 jobs
...
The BayLibre T820 runners appear to be unhealthy.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4359 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4359 >
2020-03-27 21:32:01 +00:00
Marek Olšák
871bd2819d
util: remove duplicated MALLOC_STRUCT and CALLOC_STRUCT
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324 >
2020-03-27 21:00:10 +00:00
Marek Olšák
7164674500
util: don't include p_defines.h and u_pointer.h from gallium
...
It's a mess, but this is what I arrived at.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324 >
2020-03-27 21:00:10 +00:00
Marek Olšák
013b65635f
radv: stop including files from mesa/main
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324 >
2020-03-27 21:00:10 +00:00
Marek Olšák
76f79db3f5
util: stop including files from mesa/main
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324 >
2020-03-27 21:00:09 +00:00
Marek Olšák
c42fa40a51
mesa: don't use <> for including internal headers
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324 >
2020-03-27 21:00:09 +00:00
Marek Olšák
e5339fe4a4
Move compiler.h and imports.h/c from src/mesa/main into src/util
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324 >
2020-03-27 21:00:09 +00:00
Jesse Natalie
6cfe074b86
wgl: use gldrv.h instead of stw_icd.h
...
Now that we have the official header, let's use that instead of
stw_icd.h.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305 >
2020-03-27 19:50:24 +00:00
Jesse Natalie
ec20169264
wgl: add official gldrv.h header-file
...
This is the official, Microsoft-provided gldrv.h that describes the
driver-interface for OpenGL drivers on Windows.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4305 >
2020-03-27 19:50:24 +00:00
Karol Herbst
c9091f1f24
nv50, nvc0: fix must_check warning of util_dynarray_resize_bytes
...
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330 >
2020-03-27 18:20:20 +00:00
Erik Faye-Lund
f4a4d4607e
nv50: remove unused variable
...
This isn't used anymore, so let's get rid of it to silence a warning.
Fixes: c574cda3c6
("util: Make helper functions for pack/unpacking pixel rows.")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4330 >
2020-03-27 18:20:20 +00:00
Lionel Landwerlin
aad0e6f810
intel/perf: store the probed i915-perf version
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344 >
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
8e7202d45f
intel/perf: document meaning of query field
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344 >
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
dde96d31b7
intel/perf: move mdapi query definitions to their own file
...
Where they belong.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344 >
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
33b9c7a7f6
intel/perf: break GL query stuff away
...
This stuff is somewhat specific to the GL extension & drivers. On
Vulkan we won't use this, it also made a rather large file.
v2: Fix Android build (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344 >
2020-03-27 14:14:49 +00:00
Lionel Landwerlin
f5c5574f42
intel/perf: move register definition to special file
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344 >
2020-03-27 14:14:49 +00:00
Andres Gomez
b9d2b5dcec
gitlab-ci/traces: Add D3D11 sample entry for POLARIS10
...
v2:
- Updated traces-db commit.
- Changed the reference DXVK trace.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238 >
2020-03-27 13:48:17 +00:00
Andres Gomez
07e5b3ad50
gitlab-ci: add Wine and DXVK env variables to Vulkan's tracie runner
...
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238 >
2020-03-27 13:48:17 +00:00
Andres Gomez
6bae042b3d
gitlab-ci: replay apitrace traces in headless mode
...
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238 >
2020-03-27 13:48:17 +00:00
Andres Gomez
9f4acd465e
gitlab-ci: add apitrace's DXGI traces support
...
v2:
- Pass the whole retrace command for apitrace traces (Alexandros).
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238 >
2020-03-27 13:48:17 +00:00